arch/powerpc/boot/dts/mpc8377_rdb.dts

   1 /*
   2  * MPC8377E RDB Device Tree Source
   3  *
   4  * Copyright 2007, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         compatible = "fsl,mpc8377rdb";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 ethernet0 = &enet0;
  21                 ethernet1 = &enet1;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25                 pci1 = &pci1;
  26                 pci2 = &pci2;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8377@0 {
  34                         device_type = "cpu";
  35                         reg = <0x0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <32768>;
  39                         i-cache-size = <32768>;
  40                         timebase-frequency = <0>;
  41                         bus-frequency = <0>;
  42                         clock-frequency = <0>;
  43                 };
  44         };
  45
  46         memory {
  47                 device_type = "memory";
  48                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  49         };
  50
  51         localbus@e0005000 {
  52                 #address-cells = <2>;
  53                 #size-cells = <1>;
  54                 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
  55                 reg = <0xe0005000 0x1000>;
  56                 interrupts = <77 0x8>;
  57                 interrupt-parent = <&ipic>;
  58
  59                 // CS0 and CS1 are swapped when
  60                 // booting from nand, but the
  61                 // addresses are the same.
  62                 ranges = <0x0 0x0 0xfe000000 0x00800000
  63                           0x1 0x0 0xe0600000 0x00008000
  64                           0x2 0x0 0xf0000000 0x00020000
  65                           0x3 0x0 0xfa000000 0x00008000>;
  66
  67                 flash@0,0 {
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70                         compatible = "cfi-flash";
  71                         reg = <0x0 0x0 0x800000>;
  72                         bank-width = <2>;
  73                         device-width = <1>;
  74                 };
  75
  76                 nand@1,0 {
  77                         #address-cells = <1>;
  78                         #size-cells = <1>;
  79                         compatible = "fsl,mpc8377-fcm-nand",
  80                                      "fsl,elbc-fcm-nand";
  81                         reg = <0x1 0x0 0x8000>;
  82
  83                         u-boot@0 {
  84                                 reg = <0x0 0x100000>;
  85                                 read-only;
  86                         };
  87
  88                         kernel@100000 {
  89                                 reg = <0x100000 0x300000>;
  90                         };
  91                         fs@400000 {
  92                                 reg = <0x400000 0x1c00000>;
  93                         };
  94                 };
  95         };
  96
  97         immr@e0000000 {
  98                 #address-cells = <1>;
  99                 #size-cells = <1>;
 100                 device_type = "soc";
 101                 compatible = "simple-bus";
 102                 ranges = <0x0 0xe0000000 0x00100000>;
 103                 reg = <0xe0000000 0x00000200>;
 104                 bus-frequency = <0>;
 105
 106                 wdt@200 {
 107                         device_type = "watchdog";
 108                         compatible = "mpc83xx_wdt";
 109                         reg = <0x200 0x100>;
 110                 };
 111
 112                 gpio1: gpio-controller@c00 {
 113                         #gpio-cells = <2>;
 114                         compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
 115                         reg = <0xc00 0x100>;
 116                         interrupts = <74 0x8>;
 117                         interrupt-parent = <&ipic>;
 118                         gpio-controller;
 119                 };
 120
 121                 gpio2: gpio-controller@d00 {
 122                         #gpio-cells = <2>;
 123                         compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
 124                         reg = <0xd00 0x100>;
 125                         interrupts = <75 0x8>;
 126                         interrupt-parent = <&ipic>;
 127                         gpio-controller;
 128                 };
 129
 130                 sleep-nexus {
 131                         #address-cells = <1>;
 132                         #size-cells = <1>;
 133                         compatible = "simple-bus";
 134                         sleep = <&pmc 0x0c000000>;
 135                         ranges;
 136
 137                         i2c@3000 {
 138                                 #address-cells = <1>;
 139                                 #size-cells = <0>;
 140                                 cell-index = <0>;
 141                                 compatible = "fsl-i2c";
 142                                 reg = <0x3000 0x100>;
 143                                 interrupts = <14 0x8>;
 144                                 interrupt-parent = <&ipic>;
 145                                 dfsrr;
 146
 147                                 dtt@48 {
 148                                         compatible = "national,lm75";
 149                                         reg = <0x48>;
 150                                 };
 151
 152                                 at24@50 {
 153                                         compatible = "at24,24c256";
 154                                         reg = <0x50>;
 155                                 };
 156
 157                                 rtc@68 {
 158                                         compatible = "dallas,ds1339";
 159                                         reg = <0x68>;
 160                                 };
 161
 162                                 mcu_pio: mcu@a {
 163                                         #gpio-cells = <2>;
 164                                         compatible = "fsl,mc9s08qg8-mpc8377erdb",
 165                                                      "fsl,mcu-mpc8349emitx";
 166                                         reg = <0x0a>;
 167                                         gpio-controller;
 168                                 };
 169                         };
 170
 171                         sdhci@2e000 {
 172                                 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
 173                                 reg = <0x2e000 0x1000>;
 174                                 interrupts = <42 0x8>;
 175                                 interrupt-parent = <&ipic>;
 176                                 sdhci,wp-inverted;
 177                                 /* Filled in by U-Boot */
 178                                 clock-frequency = <111111111>;
 179                         };
 180                 };
 181
 182                 i2c@3100 {
 183                         #address-cells = <1>;
 184                         #size-cells = <0>;
 185                         cell-index = <1>;
 186                         compatible = "fsl-i2c";
 187                         reg = <0x3100 0x100>;
 188                         interrupts = <15 0x8>;
 189                         interrupt-parent = <&ipic>;
 190                         dfsrr;
 191                 };
 192
 193                 spi@7000 {
 194                         cell-index = <0>;
 195                         compatible = "fsl,spi";
 196                         reg = <0x7000 0x1000>;
 197                         interrupts = <16 0x8>;
 198                         interrupt-parent = <&ipic>;
 199                         mode = "cpu";
 200                 };
 201
 202                 dma@82a8 {
 203                         #address-cells = <1>;
 204                         #size-cells = <1>;
 205                         compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
 206                         reg = <0x82a8 4>;
 207                         ranges = <0 0x8100 0x1a8>;
 208                         interrupt-parent = <&ipic>;
 209                         interrupts = <71 8>;
 210                         cell-index = <0>;
 211                         dma-channel@0 {
 212                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 213                                 reg = <0 0x80>;
 214                                 cell-index = <0>;
 215                                 interrupt-parent = <&ipic>;
 216                                 interrupts = <71 8>;
 217                         };
 218                         dma-channel@80 {
 219                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 220                                 reg = <0x80 0x80>;
 221                                 cell-index = <1>;
 222                                 interrupt-parent = <&ipic>;
 223                                 interrupts = <71 8>;
 224                         };
 225                         dma-channel@100 {
 226                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 227                                 reg = <0x100 0x80>;
 228                                 cell-index = <2>;
 229                                 interrupt-parent = <&ipic>;
 230                                 interrupts = <71 8>;
 231                         };
 232                         dma-channel@180 {
 233                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 234                                 reg = <0x180 0x28>;
 235                                 cell-index = <3>;
 236                                 interrupt-parent = <&ipic>;
 237                                 interrupts = <71 8>;
 238                         };
 239                 };
 240
 241                 usb@23000 {
 242                         compatible = "fsl-usb2-dr";
 243                         reg = <0x23000 0x1000>;
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         interrupt-parent = <&ipic>;
 247                         interrupts = <38 0x8>;
 248                         phy_type = "ulpi";
 249                         sleep = <&pmc 0x00c00000>;
 250                 };
 251
 252                 enet0: ethernet@24000 {
 253                         #address-cells = <1>;
 254                         #size-cells = <1>;
 255                         cell-index = <0>;
 256                         device_type = "network";
 257                         model = "eTSEC";
 258                         compatible = "gianfar";
 259                         reg = <0x24000 0x1000>;
 260                         ranges = <0x0 0x24000 0x1000>;
 261                         local-mac-address = [ 00 00 00 00 00 00 ];
 262                         interrupts = <32 0x8 33 0x8 34 0x8>;
 263                         phy-connection-type = "mii";
 264                         interrupt-parent = <&ipic>;
 265                         tbi-handle = <&tbi0>;
 266                         phy-handle = <&phy2>;
 267                         sleep = <&pmc 0xc0000000>;
 268                         fsl,magic-packet;
 269
 270                         mdio@520 {
 271                                 #address-cells = <1>;
 272                                 #size-cells = <0>;
 273                                 compatible = "fsl,gianfar-mdio";
 274                                 reg = <0x520 0x20>;
 275
 276                                 phy2: ethernet-phy@2 {
 277                                         interrupt-parent = <&ipic>;
 278                                         interrupts = <17 0x8>;
 279                                         reg = <0x2>;
 280                                 };
 281
 282                                 tbi0: tbi-phy@11 {
 283                                         reg = <0x11>;
 284                                         device_type = "tbi-phy";
 285                                 };
 286                         };
 287                 };
 288
 289                 enet1: ethernet@25000 {
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292                         cell-index = <1>;
 293                         device_type = "network";
 294                         model = "eTSEC";
 295                         compatible = "gianfar";
 296                         reg = <0x25000 0x1000>;
 297                         ranges = <0x0 0x25000 0x1000>;
 298                         local-mac-address = [ 00 00 00 00 00 00 ];
 299                         interrupts = <35 0x8 36 0x8 37 0x8>;
 300                         phy-connection-type = "mii";
 301                         interrupt-parent = <&ipic>;
 302                         fixed-link = <1 1 1000 0 0>;
 303                         tbi-handle = <&tbi1>;
 304                         sleep = <&pmc 0x30000000>;
 305                         fsl,magic-packet;
 306
 307                         mdio@520 {
 308                                 #address-cells = <1>;
 309                                 #size-cells = <0>;
 310                                 compatible = "fsl,gianfar-tbi";
 311                                 reg = <0x520 0x20>;
 312
 313                                 tbi1: tbi-phy@11 {
 314                                         reg = <0x11>;
 315                                         device_type = "tbi-phy";
 316                                 };
 317                         };
 318                 };
 319
 320                 serial0: serial@4500 {
 321                         cell-index = <0>;
 322                         device_type = "serial";
 323                         compatible = "fsl,ns16550", "ns16550";
 324                         reg = <0x4500 0x100>;
 325                         clock-frequency = <0>;
 326                         interrupts = <9 0x8>;
 327                         interrupt-parent = <&ipic>;
 328                 };
 329
 330                 serial1: serial@4600 {
 331                         cell-index = <1>;
 332                         device_type = "serial";
 333                         compatible = "fsl,ns16550", "ns16550";
 334                         reg = <0x4600 0x100>;
 335                         clock-frequency = <0>;
 336                         interrupts = <10 0x8>;
 337                         interrupt-parent = <&ipic>;
 338                 };
 339
 340                 crypto@30000 {
 341                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 342                                      "fsl,sec2.1", "fsl,sec2.0";
 343                         reg = <0x30000 0x10000>;
 344                         interrupts = <11 0x8>;
 345                         interrupt-parent = <&ipic>;
 346                         fsl,num-channels = <4>;
 347                         fsl,channel-fifo-len = <24>;
 348                         fsl,exec-units-mask = <0x9fe>;
 349                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 350                         sleep = <&pmc 0x03000000>;
 351                 };
 352
 353                 sata@18000 {
 354                         compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
 355                         reg = <0x18000 0x1000>;
 356                         interrupts = <44 0x8>;
 357                         interrupt-parent = <&ipic>;
 358                         sleep = <&pmc 0x000000c0>;
 359                 };
 360
 361                 sata@19000 {
 362                         compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
 363                         reg = <0x19000 0x1000>;
 364                         interrupts = <45 0x8>;
 365                         interrupt-parent = <&ipic>;
 366                         sleep = <&pmc 0x00000030>;
 367                 };
 368
 369                 /* IPIC
 370                  * interrupts cell = <intr #, sense>
 371                  * sense values match linux IORESOURCE_IRQ_* defines:
 372                  * sense == 8: Level, low assertion
 373                  * sense == 2: Edge, high-to-low change
 374                  */
 375                 ipic: interrupt-controller@700 {
 376                         compatible = "fsl,ipic";
 377                         interrupt-controller;
 378                         #address-cells = <0>;
 379                         #interrupt-cells = <2>;
 380                         reg = <0x700 0x100>;
 381                 };
 382
 383                 pmc: power@b00 {
 384                         compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
 385                         reg = <0xb00 0x100 0xa00 0x100>;
 386                         interrupts = <80 0x8>;
 387                         interrupt-parent = <&ipic>;
 388                 };
 389         };
 390
 391         pci0: pci@e0008500 {
 392                 interrupt-map-mask = <0xf800 0 0 7>;
 393                 interrupt-map = <
 394                                 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
 395
 396                                 /* IDSEL AD14 IRQ6 inta */
 397                                  0x7000 0x0 0x0 0x1 &ipic 22 0x8
 398
 399                                 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
 400                                  0x7800 0x0 0x0 0x1 &ipic 21 0x8
 401                                  0x7800 0x0 0x0 0x2 &ipic 22 0x8
 402                                  0x7800 0x0 0x0 0x4 &ipic 23 0x8
 403
 404                                 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
 405                                  0xE000 0x0 0x0 0x1 &ipic 23 0x8
 406                                  0xE000 0x0 0x0 0x2 &ipic 21 0x8
 407                                  0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
 408                 interrupt-parent = <&ipic>;
 409                 interrupts = <66 0x8>;
 410                 bus-range = <0 0>;
 411                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 412                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 413                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
 414                 sleep = <&pmc 0x00010000>;
 415                 clock-frequency = <66666666>;
 416                 #interrupt-cells = <1>;
 417                 #size-cells = <2>;
 418                 #address-cells = <3>;
 419                 reg = <0xe0008500 0x100         /* internal registers */
 420                        0xe0008300 0x8>;         /* config space access registers */
 421                 compatible = "fsl,mpc8349-pci";
 422                 device_type = "pci";
 423         };
 424
 425         pci1: pcie@e0009000 {
 426                 #address-cells = <3>;
 427                 #size-cells = <2>;
 428                 #interrupt-cells = <1>;
 429                 device_type = "pci";
 430                 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
 431                 reg = <0xe0009000 0x00001000>;
 432                 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
 433                           0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
 434                 bus-range = <0 255>;
 435                 interrupt-map-mask = <0xf800 0 0 7>;
 436                 interrupt-map = <0 0 0 1 &ipic 1 8
 437                                  0 0 0 2 &ipic 1 8
 438                                  0 0 0 3 &ipic 1 8
 439                                  0 0 0 4 &ipic 1 8>;
 440                 sleep = <&pmc 0x00300000>;
 441                 clock-frequency = <0>;
 442
 443                 pcie@0 {
 444                         #address-cells = <3>;
 445                         #size-cells = <2>;
 446                         device_type = "pci";
 447                         reg = <0 0 0 0 0>;
 448                         ranges = <0x02000000 0 0xa8000000
 449                                   0x02000000 0 0xa8000000
 450                                   0 0x10000000
 451                                   0x01000000 0 0x00000000
 452                                   0x01000000 0 0x00000000
 453                                   0 0x00800000>;
 454                 };
 455         };
 456
 457         pci2: pcie@e000a000 {
 458                 #address-cells = <3>;
 459                 #size-cells = <2>;
 460                 #interrupt-cells = <1>;
 461                 device_type = "pci";
 462                 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
 463                 reg = <0xe000a000 0x00001000>;
 464                 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
 465                           0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
 466                 bus-range = <0 255>;
 467                 interrupt-map-mask = <0xf800 0 0 7>;
 468                 interrupt-map = <0 0 0 1 &ipic 2 8
 469                                  0 0 0 2 &ipic 2 8
 470                                  0 0 0 3 &ipic 2 8
 471                                  0 0 0 4 &ipic 2 8>;
 472                 sleep = <&pmc 0x000c0000>;
 473                 clock-frequency = <0>;
 474
 475                 pcie@0 {
 476                         #address-cells = <3>;
 477                         #size-cells = <2>;
 478                         device_type = "pci";
 479                         reg = <0 0 0 0 0>;
 480                         ranges = <0x02000000 0 0xc8000000
 481                                   0x02000000 0 0xc8000000
 482                                   0 0x10000000
 483                                   0x01000000 0 0x00000000
 484                                   0x01000000 0 0x00000000
 485                                   0 0x00800000>;
 486                 };
 487         };
 488
 489         leds {
 490                 compatible = "gpio-leds";
 491
 492                 pwr {
 493                         gpios = <&mcu_pio 0 0>;
 494                         default-state = "on";
 495                 };
 496
 497                 hdd {
 498                         gpios = <&mcu_pio 1 0>;
 499                         linux,default-trigger = "disk-activity";
 500                 };
 501         };
 502 };