arch/powerpc/boot/dts/ebony.dts

   1 /*
   2  * Device Tree Source for IBM Ebony
   3  *
   4  * Copyright (c) 2006, 2007 IBM Corp.
   5  * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
   6  *
   7  * FIXME: Draft only!
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without
  11  * any warranty of any kind, whether express or implied.
  12  */
  13
  14 / {
  15         #address-cells = <2>;
  16         #size-cells = <1>;
  17         model = "ibm,ebony";
  18         compatible = "ibm,ebony";
  19         dcr-parent = <&/cpus/cpu@0>;
  20
  21         aliases {
  22                 ethernet0 = &EMAC0;
  23                 ethernet1 = &EMAC1;
  24                 serial0 = &UART0;
  25                 serial1 = &UART1;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 cpu@0 {
  33                         device_type = "cpu";
  34                         model = "PowerPC,440GP";
  35                         reg = <0>;
  36                         clock-frequency = <0>; // Filled in by zImage
  37                         timebase-frequency = <0>; // Filled in by zImage
  38                         i-cache-line-size = <20>;
  39                         d-cache-line-size = <20>;
  40                         i-cache-size = <8000>; /* 32 kB */
  41                         d-cache-size = <8000>; /* 32 kB */
  42                         dcr-controller;
  43                         dcr-access-method = "native";
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0 0 0>; // Filled in by zImage
  50         };
  51
  52         UIC0: interrupt-controller0 {
  53                 compatible = "ibm,uic-440gp", "ibm,uic";
  54                 interrupt-controller;
  55                 cell-index = <0>;
  56                 dcr-reg = <0c0 009>;
  57                 #address-cells = <0>;
  58                 #size-cells = <0>;
  59                 #interrupt-cells = <2>;
  60
  61         };
  62
  63         UIC1: interrupt-controller1 {
  64                 compatible = "ibm,uic-440gp", "ibm,uic";
  65                 interrupt-controller;
  66                 cell-index = <1>;
  67                 dcr-reg = <0d0 009>;
  68                 #address-cells = <0>;
  69                 #size-cells = <0>;
  70                 #interrupt-cells = <2>;
  71                 interrupts = <1e 4 1f 4>; /* cascade */
  72                 interrupt-parent = <&UIC0>;
  73         };
  74
  75         CPC0: cpc {
  76                 compatible = "ibm,cpc-440gp";
  77                 dcr-reg = <0b0 003 0e0 010>;
  78                 // FIXME: anything else?
  79         };
  80
  81         plb {
  82                 compatible = "ibm,plb-440gp", "ibm,plb4";
  83                 #address-cells = <2>;
  84                 #size-cells = <1>;
  85                 ranges;
  86                 clock-frequency = <0>; // Filled in by zImage
  87
  88                 SDRAM0: memory-controller {
  89                         compatible = "ibm,sdram-440gp";
  90                         dcr-reg = <010 2>;
  91                         // FIXME: anything else?
  92                 };
  93
  94                 SRAM0: sram {
  95                         compatible = "ibm,sram-440gp";
  96                         dcr-reg = <020 8 00a 1>;
  97                 };
  98
  99                 DMA0: dma {
 100                         // FIXME: ???
 101                         compatible = "ibm,dma-440gp";
 102                         dcr-reg = <100 027>;
 103                 };
 104
 105                 MAL0: mcmal {
 106                         compatible = "ibm,mcmal-440gp", "ibm,mcmal";
 107                         dcr-reg = <180 62>;
 108                         num-tx-chans = <4>;
 109                         num-rx-chans = <4>;
 110                         interrupt-parent = <&MAL0>;
 111                         interrupts = <0 1 2 3 4>;
 112                         #interrupt-cells = <1>;
 113                         #address-cells = <0>;
 114                         #size-cells = <0>;
 115                         interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
 116                                          /*RXEOB*/ 1 &UIC0 b 4
 117                                          /*SERR*/  2 &UIC1 0 4
 118                                          /*TXDE*/  3 &UIC1 1 4
 119                                          /*RXDE*/  4 &UIC1 2 4>;
 120                         interrupt-map-mask = <ffffffff>;
 121                 };
 122
 123                 POB0: opb {
 124                         compatible = "ibm,opb-440gp", "ibm,opb";
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         /* Wish there was a nicer way of specifying a full 32-bit
 128                            range */
 129                         ranges = <00000000 1 00000000 80000000
 130                                   80000000 1 80000000 80000000>;
 131                         dcr-reg = <090 00b>;
 132                         interrupt-parent = <&UIC1>;
 133                         interrupts = <7 4>;
 134                         clock-frequency = <0>; // Filled in by zImage
 135
 136                         EBC0: ebc {
 137                                 compatible = "ibm,ebc-440gp", "ibm,ebc";
 138                                 dcr-reg = <012 2>;
 139                                 #address-cells = <2>;
 140                                 #size-cells = <1>;
 141                                 clock-frequency = <0>; // Filled in by zImage
 142                                 // ranges property is supplied by zImage
 143                                 // based on firmware's configuration of the
 144                                 // EBC bridge
 145                                 interrupts = <5 4>;
 146                                 interrupt-parent = <&UIC1>;
 147
 148                                 small-flash@0,80000 {
 149                                         compatible = "jedec-flash";
 150                                         bank-width = <1>;
 151                                         reg = <0 80000 80000>;
 152                                         #address-cells = <1>;
 153                                         #size-cells = <1>;
 154                                         partition@0 {
 155                                                 label = "OpenBIOS";
 156                                                 reg = <0 80000>;
 157                                                 read-only;
 158                                         };
 159                                 };
 160
 161                                 nvram@1,0 {
 162                                         /* NVRAM & RTC */
 163                                         compatible = "ds1743-nvram";
 164                                         #bytes = <2000>;
 165                                         reg = <1 0 2000>;
 166                                 };
 167
 168                                 large-flash@2,0 {
 169                                         compatible = "jedec-flash";
 170                                         bank-width = <1>;
 171                                         reg = <2 0 400000>;
 172                                         #address-cells = <1>;
 173                                         #size-cells = <1>;
 174                                         partition@0 {
 175                                                 label = "fs";
 176                                                 reg = <0 380000>;
 177                                         };
 178                                         partition@380000 {
 179                                                 label = "firmware";
 180                                                 reg = <380000 80000>;
 181                                         };
 182                                 };
 183
 184                                 ir@3,0 {
 185                                         reg = <3 0 10>;
 186                                 };
 187
 188                                 fpga@7,0 {
 189                                         compatible = "Ebony-FPGA";
 190                                         reg = <7 0 10>;
 191                                         virtual-reg = <e8300000>;
 192                                 };
 193                         };
 194
 195                         UART0: serial@40000200 {
 196                                 device_type = "serial";
 197                                 compatible = "ns16550";
 198                                 reg = <40000200 8>;
 199                                 virtual-reg = <e0000200>;
 200                                 clock-frequency = <A8C000>;
 201                                 current-speed = <2580>;
 202                                 interrupt-parent = <&UIC0>;
 203                                 interrupts = <0 4>;
 204                         };
 205
 206                         UART1: serial@40000300 {
 207                                 device_type = "serial";
 208                                 compatible = "ns16550";
 209                                 reg = <40000300 8>;
 210                                 virtual-reg = <e0000300>;
 211                                 clock-frequency = <A8C000>;
 212                                 current-speed = <2580>;
 213                                 interrupt-parent = <&UIC0>;
 214                                 interrupts = <1 4>;
 215                         };
 216
 217                         IIC0: i2c@40000400 {
 218                                 /* FIXME */
 219                                 compatible = "ibm,iic-440gp", "ibm,iic";
 220                                 reg = <40000400 14>;
 221                                 interrupt-parent = <&UIC0>;
 222                                 interrupts = <2 4>;
 223                         };
 224                         IIC1: i2c@40000500 {
 225                                 /* FIXME */
 226                                 compatible = "ibm,iic-440gp", "ibm,iic";
 227                                 reg = <40000500 14>;
 228                                 interrupt-parent = <&UIC0>;
 229                                 interrupts = <3 4>;
 230                         };
 231
 232                         GPIO0: gpio@40000700 {
 233                                 /* FIXME */
 234                                 compatible = "ibm,gpio-440gp";
 235                                 reg = <40000700 20>;
 236                         };
 237
 238                         ZMII0: emac-zmii@40000780 {
 239                                 compatible = "ibm,zmii-440gp", "ibm,zmii";
 240                                 reg = <40000780 c>;
 241                         };
 242
 243                         EMAC0: ethernet@40000800 {
 244                                 device_type = "network";
 245                                 compatible = "ibm,emac-440gp", "ibm,emac";
 246                                 interrupt-parent = <&UIC1>;
 247                                 interrupts = <1c 4 1d 4>;
 248                                 reg = <40000800 70>;
 249                                 local-mac-address = [000000000000]; // Filled in by zImage
 250                                 mal-device = <&MAL0>;
 251                                 mal-tx-channel = <0 1>;
 252                                 mal-rx-channel = <0>;
 253                                 cell-index = <0>;
 254                                 max-frame-size = <5dc>;
 255                                 rx-fifo-size = <1000>;
 256                                 tx-fifo-size = <800>;
 257                                 phy-mode = "rmii";
 258                                 phy-map = <00000001>;
 259                                 zmii-device = <&ZMII0>;
 260                                 zmii-channel = <0>;
 261                         };
 262                         EMAC1: ethernet@40000900 {
 263                                 device_type = "network";
 264                                 compatible = "ibm,emac-440gp", "ibm,emac";
 265                                 interrupt-parent = <&UIC1>;
 266                                 interrupts = <1e 4 1f 4>;
 267                                 reg = <40000900 70>;
 268                                 local-mac-address = [000000000000]; // Filled in by zImage
 269                                 mal-device = <&MAL0>;
 270                                 mal-tx-channel = <2 3>;
 271                                 mal-rx-channel = <1>;
 272                                 cell-index = <1>;
 273                                 max-frame-size = <5dc>;
 274                                 rx-fifo-size = <1000>;
 275                                 tx-fifo-size = <800>;
 276                                 phy-mode = "rmii";
 277                                 phy-map = <00000001>;
 278                                 zmii-device = <&ZMII0>;
 279                                 zmii-channel = <1>;
 280                         };
 281
 282
 283                         GPT0: gpt@40000a00 {
 284                                 /* FIXME */
 285                                 reg = <40000a00 d4>;
 286                                 interrupt-parent = <&UIC0>;
 287                                 interrupts = <12 4 13 4 14 4 15 4 16 4>;
 288                         };
 289
 290                 };
 291
 292                 PCIX0: pci@20ec00000 {
 293                         device_type = "pci";
 294                         #interrupt-cells = <1>;
 295                         #size-cells = <2>;
 296                         #address-cells = <3>;
 297                         compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
 298                         primary;
 299                         reg = <2 0ec00000 8     /* Config space access */
 300                                0 0 0            /* no IACK cycles */
 301                                2 0ed00000 4     /* Special cycles */
 302                                2 0ec80000 f0    /* Internal registers */
 303                                2 0ec80100 fc>;  /* Internal messaging registers */
 304
 305                         /* Outbound ranges, one memory and one IO,
 306                          * later cannot be changed
 307                          */
 308                         ranges = <02000000 0 80000000 00000003 80000000 0 80000000
 309                                   01000000 0 00000000 00000002 08000000 0 00010000>;
 310
 311                         /* Inbound 2GB range starting at 0 */
 312                         dma-ranges = <42000000 0 0 0 0 0 80000000>;
 313
 314                         /* Ebony has all 4 IRQ pins tied together per slot */
 315                         interrupt-map-mask = <f800 0 0 0>;
 316                         interrupt-map = <
 317                                 /* IDSEL 1 */
 318                                 0800 0 0 0 &UIC0 17 8
 319
 320                                 /* IDSEL 2 */
 321                                 1000 0 0 0 &UIC0 18 8
 322
 323                                 /* IDSEL 3 */
 324                                 1800 0 0 0 &UIC0 19 8
 325
 326                                 /* IDSEL 4 */
 327                                 2000 0 0 0 &UIC0 1a 8
 328                         >;
 329                 };
 330         };
 331
 332         chosen {
 333                 linux,stdout-path = "/plb/opb/serial@40000200";
 334         };
 335 };