arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/export.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched/mm.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36 #include <linux/irqdomain.h>
  37 #include <linux/of.h>
  38 #include <linux/of_irq.h>
  39
  40 #include <linux/atomic.h>
  41 #include <asm/cpu.h>
  42 #include <asm/processor.h>
  43 #include <asm/idle.h>
  44 #include <asm/r4k-timer.h>
  45 #include <asm/mips-cpc.h>
  46 #include <asm/mmu_context.h>
  47 #include <asm/time.h>
  48 #include <asm/setup.h>
  49 #include <asm/maar.h>
  50
  51 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  52 EXPORT_SYMBOL(__cpu_number_map);
  53
  54 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  55 EXPORT_SYMBOL(__cpu_logical_map);
  56
  57 /* Number of TCs (or siblings in Intel speak) per CPU core */
  58 int smp_num_siblings = 1;
  59 EXPORT_SYMBOL(smp_num_siblings);
  60
  61 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  62 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  63 EXPORT_SYMBOL(cpu_sibling_map);
  64
  65 /* representing the core map of multi-core chips of each logical CPU */
  66 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
  67 EXPORT_SYMBOL(cpu_core_map);
  68
  69 static DECLARE_COMPLETION(cpu_running);
  70
  71 /*
  72  * A logcal cpu mask containing only one VPE per core to
  73  * reduce the number of IPIs on large MT systems.
  74  */
  75 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
  76 EXPORT_SYMBOL(cpu_foreign_map);
  77
  78 /* representing cpus for which sibling maps can be computed */
  79 static cpumask_t cpu_sibling_setup_map;
  80
  81 /* representing cpus for which core maps can be computed */
  82 static cpumask_t cpu_core_setup_map;
  83
  84 cpumask_t cpu_coherent_mask;
  85
  86 #ifdef CONFIG_GENERIC_IRQ_IPI
  87 static struct irq_desc *call_desc;
  88 static struct irq_desc *sched_desc;
  89 #endif
  90
  91 static inline void set_cpu_sibling_map(int cpu)
  92 {
  93         int i;
  94
  95         cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
  96
  97         if (smp_num_siblings > 1) {
  98                 for_each_cpu(i, &cpu_sibling_setup_map) {
  99                         if (cpu_data[cpu].package == cpu_data[i].package &&
 100                                     cpu_data[cpu].core == cpu_data[i].core) {
 101                                 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
 102                                 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
 103                         }
 104                 }
 105         } else
 106                 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
 107 }
 108
 109 static inline void set_cpu_core_map(int cpu)
 110 {
 111         int i;
 112
 113         cpumask_set_cpu(cpu, &cpu_core_setup_map);
 114
 115         for_each_cpu(i, &cpu_core_setup_map) {
 116                 if (cpu_data[cpu].package == cpu_data[i].package) {
 117                         cpumask_set_cpu(i, &cpu_core_map[cpu]);
 118                         cpumask_set_cpu(cpu, &cpu_core_map[i]);
 119                 }
 120         }
 121 }
 122
 123 /*
 124  * Calculate a new cpu_foreign_map mask whenever a
 125  * new cpu appears or disappears.
 126  */
 127 void calculate_cpu_foreign_map(void)
 128 {
 129         int i, k, core_present;
 130         cpumask_t temp_foreign_map;
 131
 132         /* Re-calculate the mask */
 133         cpumask_clear(&temp_foreign_map);
 134         for_each_online_cpu(i) {
 135                 core_present = 0;
 136                 for_each_cpu(k, &temp_foreign_map)
 137                         if (cpu_data[i].package == cpu_data[k].package &&
 138                             cpu_data[i].core == cpu_data[k].core)
 139                                 core_present = 1;
 140                 if (!core_present)
 141                         cpumask_set_cpu(i, &temp_foreign_map);
 142         }
 143
 144         for_each_online_cpu(i)
 145                 cpumask_andnot(&cpu_foreign_map[i],
 146                                &temp_foreign_map, &cpu_sibling_map[i]);
 147 }
 148
 149 struct plat_smp_ops *mp_ops;
 150 EXPORT_SYMBOL(mp_ops);
 151
 152 void register_smp_ops(struct plat_smp_ops *ops)
 153 {
 154         if (mp_ops)
 155                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
 156
 157         mp_ops = ops;
 158 }
 159
 160 #ifdef CONFIG_GENERIC_IRQ_IPI
 161 void mips_smp_send_ipi_single(int cpu, unsigned int action)
 162 {
 163         mips_smp_send_ipi_mask(cpumask_of(cpu), action);
 164 }
 165
 166 void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 167 {
 168         unsigned long flags;
 169         unsigned int core;
 170         int cpu;
 171
 172         local_irq_save(flags);
 173
 174         switch (action) {
 175         case SMP_CALL_FUNCTION:
 176                 __ipi_send_mask(call_desc, mask);
 177                 break;
 178
 179         case SMP_RESCHEDULE_YOURSELF:
 180                 __ipi_send_mask(sched_desc, mask);
 181                 break;
 182
 183         default:
 184                 BUG();
 185         }
 186
 187         if (mips_cpc_present()) {
 188                 for_each_cpu(cpu, mask) {
 189                         core = cpu_data[cpu].core;
 190
 191                         if (core == current_cpu_data.core)
 192                                 continue;
 193
 194                         while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
 195                                 mips_cm_lock_other(core, 0);
 196                                 mips_cpc_lock_other(core);
 197                                 write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
 198                                 mips_cpc_unlock_other();
 199                                 mips_cm_unlock_other();
 200                         }
 201                 }
 202         }
 203
 204         local_irq_restore(flags);
 205 }
 206
 207
 208 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
 209 {
 210         scheduler_ipi();
 211
 212         return IRQ_HANDLED;
 213 }
 214
 215 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 216 {
 217         generic_smp_call_function_interrupt();
 218
 219         return IRQ_HANDLED;
 220 }
 221
 222 static struct irqaction irq_resched = {
 223         .handler        = ipi_resched_interrupt,
 224         .flags          = IRQF_PERCPU,
 225         .name           = "IPI resched"
 226 };
 227
 228 static struct irqaction irq_call = {
 229         .handler        = ipi_call_interrupt,
 230         .flags          = IRQF_PERCPU,
 231         .name           = "IPI call"
 232 };
 233
 234 static void smp_ipi_init_one(unsigned int virq,
 235                                     struct irqaction *action)
 236 {
 237         int ret;
 238
 239         irq_set_handler(virq, handle_percpu_irq);
 240         ret = setup_irq(virq, action);
 241         BUG_ON(ret);
 242 }
 243
 244 static unsigned int call_virq, sched_virq;
 245
 246 int mips_smp_ipi_allocate(const struct cpumask *mask)
 247 {
 248         int virq;
 249         struct irq_domain *ipidomain;
 250         struct device_node *node;
 251
 252         node = of_irq_find_parent(of_root);
 253         ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
 254
 255         /*
 256          * Some platforms have half DT setup. So if we found irq node but
 257          * didn't find an ipidomain, try to search for one that is not in the
 258          * DT.
 259          */
 260         if (node && !ipidomain)
 261                 ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
 262
 263         /*
 264          * There are systems which use IPI IRQ domains, but only have one
 265          * registered when some runtime condition is met. For example a Malta
 266          * kernel may include support for GIC & CPU interrupt controller IPI
 267          * IRQ domains, but if run on a system with no GIC & no MT ASE then
 268          * neither will be supported or registered.
 269          *
 270          * We only have a problem if we're actually using multiple CPUs so fail
 271          * loudly if that is the case. Otherwise simply return, skipping IPI
 272          * setup, if we're running with only a single CPU.
 273          */
 274         if (!ipidomain) {
 275                 BUG_ON(num_present_cpus() > 1);
 276                 return 0;
 277         }
 278
 279         virq = irq_reserve_ipi(ipidomain, mask);
 280         BUG_ON(!virq);
 281         if (!call_virq)
 282                 call_virq = virq;
 283
 284         virq = irq_reserve_ipi(ipidomain, mask);
 285         BUG_ON(!virq);
 286         if (!sched_virq)
 287                 sched_virq = virq;
 288
 289         if (irq_domain_is_ipi_per_cpu(ipidomain)) {
 290                 int cpu;
 291
 292                 for_each_cpu(cpu, mask) {
 293                         smp_ipi_init_one(call_virq + cpu, &irq_call);
 294                         smp_ipi_init_one(sched_virq + cpu, &irq_resched);
 295                 }
 296         } else {
 297                 smp_ipi_init_one(call_virq, &irq_call);
 298                 smp_ipi_init_one(sched_virq, &irq_resched);
 299         }
 300
 301         return 0;
 302 }
 303
 304 int mips_smp_ipi_free(const struct cpumask *mask)
 305 {
 306         struct irq_domain *ipidomain;
 307         struct device_node *node;
 308
 309         node = of_irq_find_parent(of_root);
 310         ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
 311
 312         /*
 313          * Some platforms have half DT setup. So if we found irq node but
 314          * didn't find an ipidomain, try to search for one that is not in the
 315          * DT.
 316          */
 317         if (node && !ipidomain)
 318                 ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
 319
 320         BUG_ON(!ipidomain);
 321
 322         if (irq_domain_is_ipi_per_cpu(ipidomain)) {
 323                 int cpu;
 324
 325                 for_each_cpu(cpu, mask) {
 326                         remove_irq(call_virq + cpu, &irq_call);
 327                         remove_irq(sched_virq + cpu, &irq_resched);
 328                 }
 329         }
 330         irq_destroy_ipi(call_virq, mask);
 331         irq_destroy_ipi(sched_virq, mask);
 332         return 0;
 333 }
 334
 335
 336 static int __init mips_smp_ipi_init(void)
 337 {
 338         if (num_possible_cpus() == 1)
 339                 return 0;
 340
 341         mips_smp_ipi_allocate(cpu_possible_mask);
 342
 343         call_desc = irq_to_desc(call_virq);
 344         sched_desc = irq_to_desc(sched_virq);
 345
 346         return 0;
 347 }
 348 early_initcall(mips_smp_ipi_init);
 349 #endif
 350
 351 /*
 352  * First C code run on the secondary CPUs after being started up by
 353  * the master.
 354  */
 355 asmlinkage void start_secondary(void)
 356 {
 357         unsigned int cpu;
 358
 359         cpu_probe();
 360         per_cpu_trap_init(false);
 361         mips_clockevent_init();
 362         mp_ops->init_secondary();
 363         cpu_report();
 364         maar_init();
 365
 366         /*
 367          * XXX parity protection should be folded in here when it's converted
 368          * to an option instead of something based on .cputype
 369          */
 370
 371         calibrate_delay();
 372         preempt_disable();
 373         cpu = smp_processor_id();
 374         cpu_data[cpu].udelay_val = loops_per_jiffy;
 375
 376         cpumask_set_cpu(cpu, &cpu_coherent_mask);
 377         notify_cpu_starting(cpu);
 378
 379         set_cpu_online(cpu, true);
 380
 381         set_cpu_sibling_map(cpu);
 382         set_cpu_core_map(cpu);
 383
 384         calculate_cpu_foreign_map();
 385
 386         complete(&cpu_running);
 387         synchronise_count_slave(cpu);
 388
 389         /*
 390          * irq will be enabled in ->smp_finish(), enabling it too early
 391          * is dangerous.
 392          */
 393         WARN_ON_ONCE(!irqs_disabled());
 394         mp_ops->smp_finish();
 395
 396         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 397 }
 398
 399 static void stop_this_cpu(void *dummy)
 400 {
 401         /*
 402          * Remove this CPU:
 403          */
 404
 405         set_cpu_online(smp_processor_id(), false);
 406         calculate_cpu_foreign_map();
 407         local_irq_disable();
 408         while (1);
 409 }
 410
 411 void smp_send_stop(void)
 412 {
 413         smp_call_function(stop_this_cpu, NULL, 0);
 414 }
 415
 416 void __init smp_cpus_done(unsigned int max_cpus)
 417 {
 418 }
 419
 420 /* called from main before smp_init() */
 421 void __init smp_prepare_cpus(unsigned int max_cpus)
 422 {
 423         init_new_context(current, &init_mm);
 424         current_thread_info()->cpu = 0;
 425         mp_ops->prepare_cpus(max_cpus);
 426         set_cpu_sibling_map(0);
 427         set_cpu_core_map(0);
 428         calculate_cpu_foreign_map();
 429 #ifndef CONFIG_HOTPLUG_CPU
 430         init_cpu_present(cpu_possible_mask);
 431 #endif
 432         cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);
 433 }
 434
 435 /* preload SMP state for boot cpu */
 436 void smp_prepare_boot_cpu(void)
 437 {
 438         set_cpu_possible(0, true);
 439         set_cpu_online(0, true);
 440 }
 441
 442 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 443 {
 444         mp_ops->boot_secondary(cpu, tidle);
 445
 446         /*
 447          * We must check for timeout here, as the CPU will not be marked
 448          * online until the counters are synchronised.
 449          */
 450         if (!wait_for_completion_timeout(&cpu_running,
 451                                          msecs_to_jiffies(1000))) {
 452                 pr_crit("CPU%u: failed to start\n", cpu);
 453                 return -EIO;
 454         }
 455
 456         synchronise_count_master(cpu);
 457         return 0;
 458 }
 459
 460 /* Not really SMP stuff ... */
 461 int setup_profiling_timer(unsigned int multiplier)
 462 {
 463         return 0;
 464 }
 465
 466 static void flush_tlb_all_ipi(void *info)
 467 {
 468         local_flush_tlb_all();
 469 }
 470
 471 void flush_tlb_all(void)
 472 {
 473         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 474 }
 475
 476 static void flush_tlb_mm_ipi(void *mm)
 477 {
 478         local_flush_tlb_mm((struct mm_struct *)mm);
 479 }
 480
 481 /*
 482  * Special Variant of smp_call_function for use by TLB functions:
 483  *
 484  *  o No return value
 485  *  o collapses to normal function call on UP kernels
 486  *  o collapses to normal function call on systems with a single shared
 487  *    primary cache.
 488  */
 489 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 490 {
 491         smp_call_function(func, info, 1);
 492 }
 493
 494 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 495 {
 496         preempt_disable();
 497
 498         smp_on_other_tlbs(func, info);
 499         func(info);
 500
 501         preempt_enable();
 502 }
 503
 504 /*
 505  * The following tlb flush calls are invoked when old translations are
 506  * being torn down, or pte attributes are changing. For single threaded
 507  * address spaces, a new context is obtained on the current cpu, and tlb
 508  * context on other cpus are invalidated to force a new context allocation
 509  * at switch_mm time, should the mm ever be used on other cpus. For
 510  * multithreaded address spaces, intercpu interrupts have to be sent.
 511  * Another case where intercpu interrupts are required is when the target
 512  * mm might be active on another cpu (eg debuggers doing the flushes on
 513  * behalf of debugees, kswapd stealing pages from another process etc).
 514  * Kanoj 07/00.
 515  */
 516
 517 void flush_tlb_mm(struct mm_struct *mm)
 518 {
 519         preempt_disable();
 520
 521         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 522                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 523         } else {
 524                 unsigned int cpu;
 525
 526                 for_each_online_cpu(cpu) {
 527                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 528                                 cpu_context(cpu, mm) = 0;
 529                 }
 530         }
 531         local_flush_tlb_mm(mm);
 532
 533         preempt_enable();
 534 }
 535
 536 struct flush_tlb_data {
 537         struct vm_area_struct *vma;
 538         unsigned long addr1;
 539         unsigned long addr2;
 540 };
 541
 542 static void flush_tlb_range_ipi(void *info)
 543 {
 544         struct flush_tlb_data *fd = info;
 545
 546         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 547 }
 548
 549 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 550 {
 551         struct mm_struct *mm = vma->vm_mm;
 552
 553         preempt_disable();
 554         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 555                 struct flush_tlb_data fd = {
 556                         .vma = vma,
 557                         .addr1 = start,
 558                         .addr2 = end,
 559                 };
 560
 561                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 562         } else {
 563                 unsigned int cpu;
 564                 int exec = vma->vm_flags & VM_EXEC;
 565
 566                 for_each_online_cpu(cpu) {
 567                         /*
 568                          * flush_cache_range() will only fully flush icache if
 569                          * the VMA is executable, otherwise we must invalidate
 570                          * ASID without it appearing to has_valid_asid() as if
 571                          * mm has been completely unused by that CPU.
 572                          */
 573                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 574                                 cpu_context(cpu, mm) = !exec;
 575                 }
 576         }
 577         local_flush_tlb_range(vma, start, end);
 578         preempt_enable();
 579 }
 580
 581 static void flush_tlb_kernel_range_ipi(void *info)
 582 {
 583         struct flush_tlb_data *fd = info;
 584
 585         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 586 }
 587
 588 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 589 {
 590         struct flush_tlb_data fd = {
 591                 .addr1 = start,
 592                 .addr2 = end,
 593         };
 594
 595         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 596 }
 597
 598 static void flush_tlb_page_ipi(void *info)
 599 {
 600         struct flush_tlb_data *fd = info;
 601
 602         local_flush_tlb_page(fd->vma, fd->addr1);
 603 }
 604
 605 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 606 {
 607         preempt_disable();
 608         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 609                 struct flush_tlb_data fd = {
 610                         .vma = vma,
 611                         .addr1 = page,
 612                 };
 613
 614                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 615         } else {
 616                 unsigned int cpu;
 617
 618                 for_each_online_cpu(cpu) {
 619                         /*
 620                          * flush_cache_page() only does partial flushes, so
 621                          * invalidate ASID without it appearing to
 622                          * has_valid_asid() as if mm has been completely unused
 623                          * by that CPU.
 624                          */
 625                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 626                                 cpu_context(cpu, vma->vm_mm) = 1;
 627                 }
 628         }
 629         local_flush_tlb_page(vma, page);
 630         preempt_enable();
 631 }
 632
 633 static void flush_tlb_one_ipi(void *info)
 634 {
 635         unsigned long vaddr = (unsigned long) info;
 636
 637         local_flush_tlb_one(vaddr);
 638 }
 639
 640 void flush_tlb_one(unsigned long vaddr)
 641 {
 642         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 643 }
 644
 645 EXPORT_SYMBOL(flush_tlb_page);
 646 EXPORT_SYMBOL(flush_tlb_one);
 647
 648 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 649
 650 static DEFINE_PER_CPU(atomic_t, tick_broadcast_count);
 651 static DEFINE_PER_CPU(call_single_data_t, tick_broadcast_csd);
 652
 653 void tick_broadcast(const struct cpumask *mask)
 654 {
 655         atomic_t *count;
 656         call_single_data_t *csd;
 657         int cpu;
 658
 659         for_each_cpu(cpu, mask) {
 660                 count = &per_cpu(tick_broadcast_count, cpu);
 661                 csd = &per_cpu(tick_broadcast_csd, cpu);
 662
 663                 if (atomic_inc_return(count) == 1)
 664                         smp_call_function_single_async(cpu, csd);
 665         }
 666 }
 667
 668 static void tick_broadcast_callee(void *info)
 669 {
 670         int cpu = smp_processor_id();
 671         tick_receive_broadcast();
 672         atomic_set(&per_cpu(tick_broadcast_count, cpu), 0);
 673 }
 674
 675 static int __init tick_broadcast_init(void)
 676 {
 677         call_single_data_t *csd;
 678         int cpu;
 679
 680         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 681                 csd = &per_cpu(tick_broadcast_csd, cpu);
 682                 csd->func = tick_broadcast_callee;
 683         }
 684
 685         return 0;
 686 }
 687 early_initcall(tick_broadcast_init);
 688
 689 #endif /* CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */