arch/mips/kernel/process.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
   7  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
   8  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   9  * Copyright (C) 2004 Thiemo Seufer
  10  * Copyright (C) 2013  Imagination Technologies Ltd.
  11  */
  12 #include <linux/errno.h>
  13 #include <linux/sched.h>
  14 #include <linux/sched/debug.h>
  15 #include <linux/sched/task.h>
  16 #include <linux/sched/task_stack.h>
  17 #include <linux/tick.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/export.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/mman.h>
  25 #include <linux/personality.h>
  26 #include <linux/sys.h>
  27 #include <linux/init.h>
  28 #include <linux/completion.h>
  29 #include <linux/kallsyms.h>
  30 #include <linux/random.h>
  31 #include <linux/prctl.h>
  32 #include <linux/nmi.h>
  33 #include <linux/cpu.h>
  34
  35 #include <asm/abi.h>
  36 #include <asm/asm.h>
  37 #include <asm/bootinfo.h>
  38 #include <asm/cpu.h>
  39 #include <asm/dsemul.h>
  40 #include <asm/dsp.h>
  41 #include <asm/fpu.h>
  42 #include <asm/irq.h>
  43 #include <asm/mips-cps.h>
  44 #include <asm/msa.h>
  45 #include <asm/pgtable.h>
  46 #include <asm/mipsregs.h>
  47 #include <asm/processor.h>
  48 #include <asm/reg.h>
  49 #include <linux/uaccess.h>
  50 #include <asm/io.h>
  51 #include <asm/elf.h>
  52 #include <asm/isadep.h>
  53 #include <asm/inst.h>
  54 #include <asm/stacktrace.h>
  55 #include <asm/irq_regs.h>
  56
  57 #ifdef CONFIG_HOTPLUG_CPU
  58 void arch_cpu_idle_dead(void)
  59 {
  60         play_dead();
  61 }
  62 #endif
  63
  64 asmlinkage void ret_from_fork(void);
  65 asmlinkage void ret_from_kernel_thread(void);
  66
  67 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
  68 {
  69         unsigned long status;
  70
  71         /* New thread loses kernel privileges. */
  72         status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
  73         status |= KU_USER;
  74         regs->cp0_status = status;
  75         lose_fpu(0);
  76         clear_thread_flag(TIF_MSA_CTX_LIVE);
  77         clear_used_math();
  78         atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
  79         init_dsp();
  80         regs->cp0_epc = pc;
  81         regs->regs[29] = sp;
  82 }
  83
  84 void exit_thread(struct task_struct *tsk)
  85 {
  86         /*
  87          * User threads may have allocated a delay slot emulation frame.
  88          * If so, clean up that allocation.
  89          */
  90         if (!(current->flags & PF_KTHREAD))
  91                 dsemul_thread_cleanup(tsk);
  92 }
  93
  94 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  95 {
  96         /*
  97          * Save any process state which is live in hardware registers to the
  98          * parent context prior to duplication. This prevents the new child
  99          * state becoming stale if the parent is preempted before copy_thread()
 100          * gets a chance to save the parent's live hardware registers to the
 101          * child context.
 102          */
 103         preempt_disable();
 104
 105         if (is_msa_enabled())
 106                 save_msa(current);
 107         else if (is_fpu_owner())
 108                 _save_fp(current);
 109
 110         save_dsp(current);
 111
 112         preempt_enable();
 113
 114         *dst = *src;
 115         return 0;
 116 }
 117
 118 /*
 119  * Copy architecture-specific thread state
 120  */
 121 int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
 122         unsigned long kthread_arg, struct task_struct *p, unsigned long tls)
 123 {
 124         struct thread_info *ti = task_thread_info(p);
 125         struct pt_regs *childregs, *regs = current_pt_regs();
 126         unsigned long childksp;
 127
 128         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
 129
 130         /* set up new TSS. */
 131         childregs = (struct pt_regs *) childksp - 1;
 132         /*  Put the stack after the struct pt_regs.  */
 133         childksp = (unsigned long) childregs;
 134         p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
 135         if (unlikely(p->flags & PF_KTHREAD)) {
 136                 /* kernel thread */
 137                 unsigned long status = p->thread.cp0_status;
 138                 memset(childregs, 0, sizeof(struct pt_regs));
 139                 ti->addr_limit = KERNEL_DS;
 140                 p->thread.reg16 = usp; /* fn */
 141                 p->thread.reg17 = kthread_arg;
 142                 p->thread.reg29 = childksp;
 143                 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
 144 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 145                 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
 146                          ((status & (ST0_KUC | ST0_IEC)) << 2);
 147 #else
 148                 status |= ST0_EXL;
 149 #endif
 150                 childregs->cp0_status = status;
 151                 return 0;
 152         }
 153
 154         /* user thread */
 155         *childregs = *regs;
 156         childregs->regs[7] = 0; /* Clear error flag */
 157         childregs->regs[2] = 0; /* Child gets zero as return value */
 158         if (usp)
 159                 childregs->regs[29] = usp;
 160         ti->addr_limit = USER_DS;
 161
 162         p->thread.reg29 = (unsigned long) childregs;
 163         p->thread.reg31 = (unsigned long) ret_from_fork;
 164
 165         /*
 166          * New tasks lose permission to use the fpu. This accelerates context
 167          * switching for most programs since they don't use the fpu.
 168          */
 169         childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
 170
 171         clear_tsk_thread_flag(p, TIF_USEDFPU);
 172         clear_tsk_thread_flag(p, TIF_USEDMSA);
 173         clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
 174
 175 #ifdef CONFIG_MIPS_MT_FPAFF
 176         clear_tsk_thread_flag(p, TIF_FPUBOUND);
 177 #endif /* CONFIG_MIPS_MT_FPAFF */
 178
 179         atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
 180
 181         if (clone_flags & CLONE_SETTLS)
 182                 ti->tp_value = tls;
 183
 184         return 0;
 185 }
 186
 187 #ifdef CONFIG_STACKPROTECTOR
 188 #include <linux/stackprotector.h>
 189 unsigned long __stack_chk_guard __read_mostly;
 190 EXPORT_SYMBOL(__stack_chk_guard);
 191 #endif
 192
 193 struct mips_frame_info {
 194         void            *func;
 195         unsigned long   func_size;
 196         int             frame_size;
 197         int             pc_offset;
 198 };
 199
 200 #define J_TARGET(pc,target)     \
 201                 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
 202
 203 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
 204 {
 205 #ifdef CONFIG_CPU_MICROMIPS
 206         /*
 207          * swsp ra,offset
 208          * swm16 reglist,offset(sp)
 209          * swm32 reglist,offset(sp)
 210          * sw32 ra,offset(sp)
 211          * jradiussp - NOT SUPPORTED
 212          *
 213          * microMIPS is way more fun...
 214          */
 215         if (mm_insn_16bit(ip->word >> 16)) {
 216                 switch (ip->mm16_r5_format.opcode) {
 217                 case mm_swsp16_op:
 218                         if (ip->mm16_r5_format.rt != 31)
 219                                 return 0;
 220
 221                         *poff = ip->mm16_r5_format.imm;
 222                         *poff = (*poff << 2) / sizeof(ulong);
 223                         return 1;
 224
 225                 case mm_pool16c_op:
 226                         switch (ip->mm16_m_format.func) {
 227                         case mm_swm16_op:
 228                                 *poff = ip->mm16_m_format.imm;
 229                                 *poff += 1 + ip->mm16_m_format.rlist;
 230                                 *poff = (*poff << 2) / sizeof(ulong);
 231                                 return 1;
 232
 233                         default:
 234                                 return 0;
 235                         }
 236
 237                 default:
 238                         return 0;
 239                 }
 240         }
 241
 242         switch (ip->i_format.opcode) {
 243         case mm_sw32_op:
 244                 if (ip->i_format.rs != 29)
 245                         return 0;
 246                 if (ip->i_format.rt != 31)
 247                         return 0;
 248
 249                 *poff = ip->i_format.simmediate / sizeof(ulong);
 250                 return 1;
 251
 252         case mm_pool32b_op:
 253                 switch (ip->mm_m_format.func) {
 254                 case mm_swm32_func:
 255                         if (ip->mm_m_format.rd < 0x10)
 256                                 return 0;
 257                         if (ip->mm_m_format.base != 29)
 258                                 return 0;
 259
 260                         *poff = ip->mm_m_format.simmediate;
 261                         *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
 262                         *poff /= sizeof(ulong);
 263                         return 1;
 264                 default:
 265                         return 0;
 266                 }
 267
 268         default:
 269                 return 0;
 270         }
 271 #else
 272         /* sw / sd $ra, offset($sp) */
 273         if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
 274                 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
 275                 *poff = ip->i_format.simmediate / sizeof(ulong);
 276                 return 1;
 277         }
 278
 279         return 0;
 280 #endif
 281 }
 282
 283 static inline int is_jump_ins(union mips_instruction *ip)
 284 {
 285 #ifdef CONFIG_CPU_MICROMIPS
 286         /*
 287          * jr16,jrc,jalr16,jalr16
 288          * jal
 289          * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
 290          * jraddiusp - NOT SUPPORTED
 291          *
 292          * microMIPS is kind of more fun...
 293          */
 294         if (mm_insn_16bit(ip->word >> 16)) {
 295                 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
 296                     (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
 297                         return 1;
 298                 return 0;
 299         }
 300
 301         if (ip->j_format.opcode == mm_j32_op)
 302                 return 1;
 303         if (ip->j_format.opcode == mm_jal32_op)
 304                 return 1;
 305         if (ip->r_format.opcode != mm_pool32a_op ||
 306                         ip->r_format.func != mm_pool32axf_op)
 307                 return 0;
 308         return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
 309 #else
 310         if (ip->j_format.opcode == j_op)
 311                 return 1;
 312         if (ip->j_format.opcode == jal_op)
 313                 return 1;
 314         if (ip->r_format.opcode != spec_op)
 315                 return 0;
 316         return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
 317 #endif
 318 }
 319
 320 static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size)
 321 {
 322 #ifdef CONFIG_CPU_MICROMIPS
 323         unsigned short tmp;
 324
 325         /*
 326          * addiusp -imm
 327          * addius5 sp,-imm
 328          * addiu32 sp,sp,-imm
 329          * jradiussp - NOT SUPPORTED
 330          *
 331          * microMIPS is not more fun...
 332          */
 333         if (mm_insn_16bit(ip->word >> 16)) {
 334                 if (ip->mm16_r3_format.opcode == mm_pool16d_op &&
 335                     ip->mm16_r3_format.simmediate & mm_addiusp_func) {
 336                         tmp = ip->mm_b0_format.simmediate >> 1;
 337                         tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100;
 338                         if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */
 339                                 tmp ^= 0x100;
 340                         *frame_size = -(signed short)(tmp << 2);
 341                         return 1;
 342                 }
 343                 if (ip->mm16_r5_format.opcode == mm_pool16d_op &&
 344                     ip->mm16_r5_format.rt == 29) {
 345                         tmp = ip->mm16_r5_format.imm >> 1;
 346                         *frame_size = -(signed short)(tmp & 0xf);
 347                         return 1;
 348                 }
 349                 return 0;
 350         }
 351
 352         if (ip->mm_i_format.opcode == mm_addiu32_op &&
 353             ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
 354                 *frame_size = -ip->i_format.simmediate;
 355                 return 1;
 356         }
 357 #else
 358         /* addiu/daddiu sp,sp,-imm */
 359         if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
 360                 return 0;
 361
 362         if (ip->i_format.opcode == addiu_op ||
 363             ip->i_format.opcode == daddiu_op) {
 364                 *frame_size = -ip->i_format.simmediate;
 365                 return 1;
 366         }
 367 #endif
 368         return 0;
 369 }
 370
 371 static int get_frame_info(struct mips_frame_info *info)
 372 {
 373         bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
 374         union mips_instruction insn, *ip, *ip_end;
 375         const unsigned int max_insns = 128;
 376         unsigned int last_insn_size = 0;
 377         unsigned int i;
 378         bool saw_jump = false;
 379
 380         info->pc_offset = -1;
 381         info->frame_size = 0;
 382
 383         ip = (void *)msk_isa16_mode((ulong)info->func);
 384         if (!ip)
 385                 goto err;
 386
 387         ip_end = (void *)ip + info->func_size;
 388
 389         for (i = 0; i < max_insns && ip < ip_end; i++) {
 390                 ip = (void *)ip + last_insn_size;
 391                 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
 392                         insn.word = ip->halfword[0] << 16;
 393                         last_insn_size = 2;
 394                 } else if (is_mmips) {
 395                         insn.word = ip->halfword[0] << 16 | ip->halfword[1];
 396                         last_insn_size = 4;
 397                 } else {
 398                         insn.word = ip->word;
 399                         last_insn_size = 4;
 400                 }
 401
 402                 if (!info->frame_size) {
 403                         is_sp_move_ins(&insn, &info->frame_size);
 404                         continue;
 405                 } else if (!saw_jump && is_jump_ins(ip)) {
 406                         /*
 407                          * If we see a jump instruction, we are finished
 408                          * with the frame save.
 409                          *
 410                          * Some functions can have a shortcut return at
 411                          * the beginning of the function, so don't start
 412                          * looking for jump instruction until we see the
 413                          * frame setup.
 414                          *
 415                          * The RA save instruction can get put into the
 416                          * delay slot of the jump instruction, so look
 417                          * at the next instruction, too.
 418                          */
 419                         saw_jump = true;
 420                         continue;
 421                 }
 422                 if (info->pc_offset == -1 &&
 423                     is_ra_save_ins(&insn, &info->pc_offset))
 424                         break;
 425                 if (saw_jump)
 426                         break;
 427         }
 428         if (info->frame_size && info->pc_offset >= 0) /* nested */
 429                 return 0;
 430         if (info->pc_offset < 0) /* leaf */
 431                 return 1;
 432         /* prologue seems bogus... */
 433 err:
 434         return -1;
 435 }
 436
 437 static struct mips_frame_info schedule_mfi __read_mostly;
 438
 439 #ifdef CONFIG_KALLSYMS
 440 static unsigned long get___schedule_addr(void)
 441 {
 442         return kallsyms_lookup_name("__schedule");
 443 }
 444 #else
 445 static unsigned long get___schedule_addr(void)
 446 {
 447         union mips_instruction *ip = (void *)schedule;
 448         int max_insns = 8;
 449         int i;
 450
 451         for (i = 0; i < max_insns; i++, ip++) {
 452                 if (ip->j_format.opcode == j_op)
 453                         return J_TARGET(ip, ip->j_format.target);
 454         }
 455         return 0;
 456 }
 457 #endif
 458
 459 static int __init frame_info_init(void)
 460 {
 461         unsigned long size = 0;
 462 #ifdef CONFIG_KALLSYMS
 463         unsigned long ofs;
 464 #endif
 465         unsigned long addr;
 466
 467         addr = get___schedule_addr();
 468         if (!addr)
 469                 addr = (unsigned long)schedule;
 470
 471 #ifdef CONFIG_KALLSYMS
 472         kallsyms_lookup_size_offset(addr, &size, &ofs);
 473 #endif
 474         schedule_mfi.func = (void *)addr;
 475         schedule_mfi.func_size = size;
 476
 477         get_frame_info(&schedule_mfi);
 478
 479         /*
 480          * Without schedule() frame info, result given by
 481          * thread_saved_pc() and get_wchan() are not reliable.
 482          */
 483         if (schedule_mfi.pc_offset < 0)
 484                 printk("Can't analyze schedule() prologue at %p\n", schedule);
 485
 486         return 0;
 487 }
 488
 489 arch_initcall(frame_info_init);
 490
 491 /*
 492  * Return saved PC of a blocked thread.
 493  */
 494 static unsigned long thread_saved_pc(struct task_struct *tsk)
 495 {
 496         struct thread_struct *t = &tsk->thread;
 497
 498         /* New born processes are a special case */
 499         if (t->reg31 == (unsigned long) ret_from_fork)
 500                 return t->reg31;
 501         if (schedule_mfi.pc_offset < 0)
 502                 return 0;
 503         return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
 504 }
 505
 506
 507 #ifdef CONFIG_KALLSYMS
 508 /* generic stack unwinding function */
 509 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
 510                                               unsigned long *sp,
 511                                               unsigned long pc,
 512                                               unsigned long *ra)
 513 {
 514         unsigned long low, high, irq_stack_high;
 515         struct mips_frame_info info;
 516         unsigned long size, ofs;
 517         struct pt_regs *regs;
 518         int leaf;
 519
 520         if (!stack_page)
 521                 return 0;
 522
 523         /*
 524          * IRQ stacks start at IRQ_STACK_START
 525          * task stacks at THREAD_SIZE - 32
 526          */
 527         low = stack_page;
 528         if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
 529                 high = stack_page + IRQ_STACK_START;
 530                 irq_stack_high = high;
 531         } else {
 532                 high = stack_page + THREAD_SIZE - 32;
 533                 irq_stack_high = 0;
 534         }
 535
 536         /*
 537          * If we reached the top of the interrupt stack, start unwinding
 538          * the interrupted task stack.
 539          */
 540         if (unlikely(*sp == irq_stack_high)) {
 541                 unsigned long task_sp = *(unsigned long *)*sp;
 542
 543                 /*
 544                  * Check that the pointer saved in the IRQ stack head points to
 545                  * something within the stack of the current task
 546                  */
 547                 if (!object_is_on_stack((void *)task_sp))
 548                         return 0;
 549
 550                 /*
 551                  * Follow pointer to tasks kernel stack frame where interrupted
 552                  * state was saved.
 553                  */
 554                 regs = (struct pt_regs *)task_sp;
 555                 pc = regs->cp0_epc;
 556                 if (!user_mode(regs) && __kernel_text_address(pc)) {
 557                         *sp = regs->regs[29];
 558                         *ra = regs->regs[31];
 559                         return pc;
 560                 }
 561                 return 0;
 562         }
 563         if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
 564                 return 0;
 565         /*
 566          * Return ra if an exception occurred at the first instruction
 567          */
 568         if (unlikely(ofs == 0)) {
 569                 pc = *ra;
 570                 *ra = 0;
 571                 return pc;
 572         }
 573
 574         info.func = (void *)(pc - ofs);
 575         info.func_size = ofs;   /* analyze from start to ofs */
 576         leaf = get_frame_info(&info);
 577         if (leaf < 0)
 578                 return 0;
 579
 580         if (*sp < low || *sp + info.frame_size > high)
 581                 return 0;
 582
 583         if (leaf)
 584                 /*
 585                  * For some extreme cases, get_frame_info() can
 586                  * consider wrongly a nested function as a leaf
 587                  * one. In that cases avoid to return always the
 588                  * same value.
 589                  */
 590                 pc = pc != *ra ? *ra : 0;
 591         else
 592                 pc = ((unsigned long *)(*sp))[info.pc_offset];
 593
 594         *sp += info.frame_size;
 595         *ra = 0;
 596         return __kernel_text_address(pc) ? pc : 0;
 597 }
 598 EXPORT_SYMBOL(unwind_stack_by_address);
 599
 600 /* used by show_backtrace() */
 601 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
 602                            unsigned long pc, unsigned long *ra)
 603 {
 604         unsigned long stack_page = 0;
 605         int cpu;
 606
 607         for_each_possible_cpu(cpu) {
 608                 if (on_irq_stack(cpu, *sp)) {
 609                         stack_page = (unsigned long)irq_stack[cpu];
 610                         break;
 611                 }
 612         }
 613
 614         if (!stack_page)
 615                 stack_page = (unsigned long)task_stack_page(task);
 616
 617         return unwind_stack_by_address(stack_page, sp, pc, ra);
 618 }
 619 #endif
 620
 621 /*
 622  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
 623  */
 624 unsigned long get_wchan(struct task_struct *task)
 625 {
 626         unsigned long pc = 0;
 627 #ifdef CONFIG_KALLSYMS
 628         unsigned long sp;
 629         unsigned long ra = 0;
 630 #endif
 631
 632         if (!task || task == current || task->state == TASK_RUNNING)
 633                 goto out;
 634         if (!task_stack_page(task))
 635                 goto out;
 636
 637         pc = thread_saved_pc(task);
 638
 639 #ifdef CONFIG_KALLSYMS
 640         sp = task->thread.reg29 + schedule_mfi.frame_size;
 641
 642         while (in_sched_functions(pc))
 643                 pc = unwind_stack(task, &sp, pc, &ra);
 644 #endif
 645
 646 out:
 647         return pc;
 648 }
 649
 650 unsigned long mips_stack_top(void)
 651 {
 652         unsigned long top = TASK_SIZE & PAGE_MASK;
 653
 654         /* One page for branch delay slot "emulation" */
 655         top -= PAGE_SIZE;
 656
 657         /* Space for the VDSO, data page & GIC user page */
 658         top -= PAGE_ALIGN(current->thread.abi->vdso->size);
 659         top -= PAGE_SIZE;
 660         top -= mips_gic_present() ? PAGE_SIZE : 0;
 661
 662         /* Space for cache colour alignment */
 663         if (cpu_has_dc_aliases)
 664                 top -= shm_align_mask + 1;
 665
 666         /* Space to randomize the VDSO base */
 667         if (current->flags & PF_RANDOMIZE)
 668                 top -= VDSO_RANDOMIZE_SIZE;
 669
 670         return top;
 671 }
 672
 673 /*
 674  * Don't forget that the stack pointer must be aligned on a 8 bytes
 675  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
 676  */
 677 unsigned long arch_align_stack(unsigned long sp)
 678 {
 679         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 680                 sp -= get_random_int() & ~PAGE_MASK;
 681
 682         return sp & ALMASK;
 683 }
 684
 685 static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
 686 static struct cpumask backtrace_csd_busy;
 687
 688 static void handle_backtrace(void *info)
 689 {
 690         nmi_cpu_backtrace(get_irq_regs());
 691         cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
 692 }
 693
 694 static void raise_backtrace(cpumask_t *mask)
 695 {
 696         call_single_data_t *csd;
 697         int cpu;
 698
 699         for_each_cpu(cpu, mask) {
 700                 /*
 701                  * If we previously sent an IPI to the target CPU & it hasn't
 702                  * cleared its bit in the busy cpumask then it didn't handle
 703                  * our previous IPI & it's not safe for us to reuse the
 704                  * call_single_data_t.
 705                  */
 706                 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
 707                         pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
 708                                 cpu);
 709                         continue;
 710                 }
 711
 712                 csd = &per_cpu(backtrace_csd, cpu);
 713                 csd->func = handle_backtrace;
 714                 smp_call_function_single_async(cpu, csd);
 715         }
 716 }
 717
 718 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
 719 {
 720         nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
 721 }
 722
 723 int mips_get_process_fp_mode(struct task_struct *task)
 724 {
 725         int value = 0;
 726
 727         if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
 728                 value |= PR_FP_MODE_FR;
 729         if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
 730                 value |= PR_FP_MODE_FRE;
 731
 732         return value;
 733 }
 734
 735 static long prepare_for_fp_mode_switch(void *unused)
 736 {
 737         /*
 738          * This is icky, but we use this to simply ensure that all CPUs have
 739          * context switched, regardless of whether they were previously running
 740          * kernel or user code. This ensures that no CPU currently has its FPU
 741          * enabled, or is about to attempt to enable it through any path other
 742          * than enable_restore_fp_context() which will wait appropriately for
 743          * fp_mode_switching to be zero.
 744          */
 745         return 0;
 746 }
 747
 748 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
 749 {
 750         const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
 751         struct task_struct *t;
 752         struct cpumask process_cpus;
 753         int cpu;
 754
 755         /* If nothing to change, return right away, successfully.  */
 756         if (value == mips_get_process_fp_mode(task))
 757                 return 0;
 758
 759         /* Only accept a mode change if 64-bit FP enabled for o32.  */
 760         if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
 761                 return -EOPNOTSUPP;
 762
 763         /* And only for o32 tasks.  */
 764         if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
 765                 return -EOPNOTSUPP;
 766
 767         /* Check the value is valid */
 768         if (value & ~known_bits)
 769                 return -EOPNOTSUPP;
 770
 771         /* Setting FRE without FR is not supported.  */
 772         if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
 773                 return -EOPNOTSUPP;
 774
 775         /* Avoid inadvertently triggering emulation */
 776         if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
 777             !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
 778                 return -EOPNOTSUPP;
 779         if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
 780                 return -EOPNOTSUPP;
 781
 782         /* FR = 0 not supported in MIPS R6 */
 783         if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
 784                 return -EOPNOTSUPP;
 785
 786         /* Indicate the new FP mode in each thread */
 787         for_each_thread(task, t) {
 788                 /* Update desired FP register width */
 789                 if (value & PR_FP_MODE_FR) {
 790                         clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 791                 } else {
 792                         set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 793                         clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
 794                 }
 795
 796                 /* Update desired FP single layout */
 797                 if (value & PR_FP_MODE_FRE)
 798                         set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 799                 else
 800                         clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 801         }
 802
 803         /*
 804          * We need to ensure that all threads in the process have switched mode
 805          * before returning, in order to allow userland to not worry about
 806          * races. We can do this by forcing all CPUs that any thread in the
 807          * process may be running on to schedule something else - in this case
 808          * prepare_for_fp_mode_switch().
 809          *
 810          * We begin by generating a mask of all CPUs that any thread in the
 811          * process may be running on.
 812          */
 813         cpumask_clear(&process_cpus);
 814         for_each_thread(task, t)
 815                 cpumask_set_cpu(task_cpu(t), &process_cpus);
 816
 817         /*
 818          * Now we schedule prepare_for_fp_mode_switch() on each of those CPUs.
 819          *
 820          * The CPUs may have rescheduled already since we switched mode or
 821          * generated the cpumask, but that doesn't matter. If the task in this
 822          * process is scheduled out then our scheduling
 823          * prepare_for_fp_mode_switch() will simply be redundant. If it's
 824          * scheduled in then it will already have picked up the new FP mode
 825          * whilst doing so.
 826          */
 827         get_online_cpus();
 828         for_each_cpu_and(cpu, &process_cpus, cpu_online_mask)
 829                 work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL);
 830         put_online_cpus();
 831
 832         wake_up_var(&task->mm->context.fp_mode_switching);
 833
 834         return 0;
 835 }
 836
 837 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 838 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
 839 {
 840         unsigned int i;
 841
 842         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
 843                 /* k0/k1 are copied as zero. */
 844                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
 845                         uregs[i] = 0;
 846                 else
 847                         uregs[i] = regs->regs[i - MIPS32_EF_R0];
 848         }
 849
 850         uregs[MIPS32_EF_LO] = regs->lo;
 851         uregs[MIPS32_EF_HI] = regs->hi;
 852         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
 853         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 854         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
 855         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
 856 }
 857 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 858
 859 #ifdef CONFIG_64BIT
 860 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
 861 {
 862         unsigned int i;
 863
 864         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
 865                 /* k0/k1 are copied as zero. */
 866                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
 867                         uregs[i] = 0;
 868                 else
 869                         uregs[i] = regs->regs[i - MIPS64_EF_R0];
 870         }
 871
 872         uregs[MIPS64_EF_LO] = regs->lo;
 873         uregs[MIPS64_EF_HI] = regs->hi;
 874         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
 875         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 876         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
 877         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
 878 }
 879 #endif /* CONFIG_64BIT */