arch/mips/cavium-octeon/octeon_3xxx.dts

   1 /dts-v1/;
   2 /*
   3  * OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
   4  *
   5  * This device tree is pruned and patched by early boot code before
   6  * use.  Because of this, it contains a super-set of the available
   7  * devices and properties.
   8  */
   9 / {
  10         compatible = "cavium,octeon-3860";
  11         #address-cells = <2>;
  12         #size-cells = <2>;
  13         interrupt-parent = <&ciu>;
  14
  15         soc@0 {
  16                 compatible = "simple-bus";
  17                 #address-cells = <2>;
  18                 #size-cells = <2>;
  19                 ranges; /* Direct mapping */
  20
  21                 ciu: interrupt-controller@1070000000000 {
  22                         compatible = "cavium,octeon-3860-ciu";
  23                         interrupt-controller;
  24                         /* Interrupts are specified by two parts:
  25                          * 1) Controller register (0 or 1)
  26                          * 2) Bit within the register (0..63)
  27                          */
  28                         #interrupt-cells = <2>;
  29                         reg = <0x10700 0x00000000 0x0 0x7000>;
  30                 };
  31
  32                 gpio: gpio-controller@1070000000800 {
  33                         #gpio-cells = <2>;
  34                         compatible = "cavium,octeon-3860-gpio";
  35                         reg = <0x10700 0x00000800 0x0 0x100>;
  36                         gpio-controller;
  37                         /* Interrupts are specified by two parts:
  38                          * 1) GPIO pin number (0..15)
  39                          * 2) Triggering (1 - edge rising
  40                          *                2 - edge falling
  41                          *                4 - level active high
  42                          *                8 - level active low)
  43                          */
  44                         interrupt-controller;
  45                         #interrupt-cells = <2>;
  46                         /* The GPIO pin connect to 16 consecutive CUI bits */
  47                         interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
  48                                      <0 20>, <0 21>, <0 22>, <0 23>,
  49                                      <0 24>, <0 25>, <0 26>, <0 27>,
  50                                      <0 28>, <0 29>, <0 30>, <0 31>;
  51                 };
  52
  53                 smi0: mdio@1180000001800 {
  54                         compatible = "cavium,octeon-3860-mdio";
  55                         #address-cells = <1>;
  56                         #size-cells = <0>;
  57                         reg = <0x11800 0x00001800 0x0 0x40>;
  58
  59                         phy0: ethernet-phy@0 {
  60                                 compatible = "marvell,88e1118";
  61                                 marvell,reg-init =
  62                                         /* Fix rx and tx clock transition timing */
  63                                         <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
  64                                         /* Adjust LED drive. */
  65                                         <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
  66                                         /* irq, blink-activity, blink-link */
  67                                         <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
  68                                 reg = <0>;
  69                         };
  70
  71                         phy1: ethernet-phy@1 {
  72                                 compatible = "marvell,88e1118";
  73                                 marvell,reg-init =
  74                                         /* Fix rx and tx clock transition timing */
  75                                         <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
  76                                         /* Adjust LED drive. */
  77                                         <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
  78                                         /* irq, blink-activity, blink-link */
  79                                         <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
  80                                 reg = <1>;
  81                         };
  82
  83                         phy2: ethernet-phy@2 {
  84                                 reg = <2>;
  85                                 compatible = "marvell,88e1149r";
  86                                 marvell,reg-init = <3 0x10 0 0x5777>,
  87                                         <3 0x11 0 0x00aa>,
  88                                         <3 0x12 0 0x4105>,
  89                                         <3 0x13 0 0x0a60>;
  90                         };
  91                         phy3: ethernet-phy@3 {
  92                                 reg = <3>;
  93                                 compatible = "marvell,88e1149r";
  94                                 marvell,reg-init = <3 0x10 0 0x5777>,
  95                                         <3 0x11 0 0x00aa>,
  96                                         <3 0x12 0 0x4105>,
  97                                         <3 0x13 0 0x0a60>;
  98                         };
  99                         phy4: ethernet-phy@4 {
 100                                 reg = <4>;
 101                                 compatible = "marvell,88e1149r";
 102                                 marvell,reg-init = <3 0x10 0 0x5777>,
 103                                         <3 0x11 0 0x00aa>,
 104                                         <3 0x12 0 0x4105>,
 105                                         <3 0x13 0 0x0a60>;
 106                         };
 107                         phy5: ethernet-phy@5 {
 108                                 reg = <5>;
 109                                 compatible = "marvell,88e1149r";
 110                                 marvell,reg-init = <3 0x10 0 0x5777>,
 111                                         <3 0x11 0 0x00aa>,
 112                                         <3 0x12 0 0x4105>,
 113                                         <3 0x13 0 0x0a60>;
 114                         };
 115
 116                         phy6: ethernet-phy@6 {
 117                                 reg = <6>;
 118                                 compatible = "marvell,88e1149r";
 119                                 marvell,reg-init = <3 0x10 0 0x5777>,
 120                                         <3 0x11 0 0x00aa>,
 121                                         <3 0x12 0 0x4105>,
 122                                         <3 0x13 0 0x0a60>;
 123                         };
 124                         phy7: ethernet-phy@7 {
 125                                 reg = <7>;
 126                                 compatible = "marvell,88e1149r";
 127                                 marvell,reg-init = <3 0x10 0 0x5777>,
 128                                         <3 0x11 0 0x00aa>,
 129                                         <3 0x12 0 0x4105>,
 130                                         <3 0x13 0 0x0a60>;
 131                         };
 132                         phy8: ethernet-phy@8 {
 133                                 reg = <8>;
 134                                 compatible = "marvell,88e1149r";
 135                                 marvell,reg-init = <3 0x10 0 0x5777>,
 136                                         <3 0x11 0 0x00aa>,
 137                                         <3 0x12 0 0x4105>,
 138                                         <3 0x13 0 0x0a60>;
 139                         };
 140                         phy9: ethernet-phy@9 {
 141                                 reg = <9>;
 142                                 compatible = "marvell,88e1149r";
 143                                 marvell,reg-init = <3 0x10 0 0x5777>,
 144                                         <3 0x11 0 0x00aa>,
 145                                         <3 0x12 0 0x4105>,
 146                                         <3 0x13 0 0x0a60>;
 147                         };
 148                 };
 149
 150                 smi1: mdio@1180000001900 {
 151                         compatible = "cavium,octeon-3860-mdio";
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154                         reg = <0x11800 0x00001900 0x0 0x40>;
 155
 156                         phy100: ethernet-phy@1 {
 157                                 reg = <1>;
 158                                 compatible = "marvell,88e1149r";
 159                                 marvell,reg-init = <3 0x10 0 0x5777>,
 160                                         <3 0x11 0 0x00aa>,
 161                                         <3 0x12 0 0x4105>,
 162                                         <3 0x13 0 0x0a60>;
 163                                 interrupt-parent = <&gpio>;
 164                                 interrupts = <12 8>; /* Pin 12, active low */
 165                         };
 166                         phy101: ethernet-phy@2 {
 167                                 reg = <2>;
 168                                 compatible = "marvell,88e1149r";
 169                                 marvell,reg-init = <3 0x10 0 0x5777>,
 170                                         <3 0x11 0 0x00aa>,
 171                                         <3 0x12 0 0x4105>,
 172                                         <3 0x13 0 0x0a60>;
 173                                 interrupt-parent = <&gpio>;
 174                                 interrupts = <12 8>; /* Pin 12, active low */
 175                         };
 176                         phy102: ethernet-phy@3 {
 177                                 reg = <3>;
 178                                 compatible = "marvell,88e1149r";
 179                                 marvell,reg-init = <3 0x10 0 0x5777>,
 180                                         <3 0x11 0 0x00aa>,
 181                                         <3 0x12 0 0x4105>,
 182                                         <3 0x13 0 0x0a60>;
 183                                 interrupt-parent = <&gpio>;
 184                                 interrupts = <12 8>; /* Pin 12, active low */
 185                         };
 186                         phy103: ethernet-phy@4 {
 187                                 reg = <4>;
 188                                 compatible = "marvell,88e1149r";
 189                                 marvell,reg-init = <3 0x10 0 0x5777>,
 190                                         <3 0x11 0 0x00aa>,
 191                                         <3 0x12 0 0x4105>,
 192                                         <3 0x13 0 0x0a60>;
 193                                 interrupt-parent = <&gpio>;
 194                                 interrupts = <12 8>; /* Pin 12, active low */
 195                         };
 196                 };
 197
 198                 mix0: ethernet@1070000100000 {
 199                         compatible = "cavium,octeon-5750-mix";
 200                         reg = <0x10700 0x00100000 0x0 0x100>, /* MIX */
 201                               <0x11800 0xE0000000 0x0 0x300>, /* AGL */
 202                               <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED  */
 203                               <0x11800 0xE0002000 0x0 0x8>;   /* AGL_PRT_CTL */
 204                         cell-index = <0>;
 205                         interrupts = <0 62>, <1 46>;
 206                         local-mac-address = [ 00 00 00 00 00 00 ];
 207                         phy-handle = <&phy0>;
 208                 };
 209
 210                 mix1: ethernet@1070000100800 {
 211                         compatible = "cavium,octeon-5750-mix";
 212                         reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */
 213                               <0x11800 0xE0000800 0x0 0x300>, /* AGL */
 214                               <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED  */
 215                               <0x11800 0xE0002008 0x0 0x8>;   /* AGL_PRT_CTL */
 216                         cell-index = <1>;
 217                         interrupts = <1 18>, < 1 46>;
 218                         local-mac-address = [ 00 00 00 00 00 00 ];
 219                         phy-handle = <&phy1>;
 220                 };
 221
 222                 pip: pip@11800a0000000 {
 223                         compatible = "cavium,octeon-3860-pip";
 224                         #address-cells = <1>;
 225                         #size-cells = <0>;
 226                         reg = <0x11800 0xa0000000 0x0 0x2000>;
 227
 228                         interface@0 {
 229                                 compatible = "cavium,octeon-3860-pip-interface";
 230                                 #address-cells = <1>;
 231                                 #size-cells = <0>;
 232                                 reg = <0>; /* interface */
 233
 234                                 ethernet@0 {
 235                                         compatible = "cavium,octeon-3860-pip-port";
 236                                         reg = <0x0>; /* Port */
 237                                         local-mac-address = [ 00 00 00 00 00 00 ];
 238                                         phy-handle = <&phy2>;
 239                                         cavium,alt-phy-handle = <&phy100>;
 240                                 };
 241                                 ethernet@1 {
 242                                         compatible = "cavium,octeon-3860-pip-port";
 243                                         reg = <0x1>; /* Port */
 244                                         local-mac-address = [ 00 00 00 00 00 00 ];
 245                                         phy-handle = <&phy3>;
 246                                         cavium,alt-phy-handle = <&phy101>;
 247                                 };
 248                                 ethernet@2 {
 249                                         compatible = "cavium,octeon-3860-pip-port";
 250                                         reg = <0x2>; /* Port */
 251                                         local-mac-address = [ 00 00 00 00 00 00 ];
 252                                         phy-handle = <&phy4>;
 253                                         cavium,alt-phy-handle = <&phy102>;
 254                                 };
 255                                 ethernet@3 {
 256                                         compatible = "cavium,octeon-3860-pip-port";
 257                                         reg = <0x3>; /* Port */
 258                                         local-mac-address = [ 00 00 00 00 00 00 ];
 259                                         phy-handle = <&phy5>;
 260                                         cavium,alt-phy-handle = <&phy103>;
 261                                 };
 262                                 ethernet@4 {
 263                                         compatible = "cavium,octeon-3860-pip-port";
 264                                         reg = <0x4>; /* Port */
 265                                         local-mac-address = [ 00 00 00 00 00 00 ];
 266                                 };
 267                                 ethernet@5 {
 268                                         compatible = "cavium,octeon-3860-pip-port";
 269                                         reg = <0x5>; /* Port */
 270                                         local-mac-address = [ 00 00 00 00 00 00 ];
 271                                 };
 272                                 ethernet@6 {
 273                                         compatible = "cavium,octeon-3860-pip-port";
 274                                         reg = <0x6>; /* Port */
 275                                         local-mac-address = [ 00 00 00 00 00 00 ];
 276                                 };
 277                                 ethernet@7 {
 278                                         compatible = "cavium,octeon-3860-pip-port";
 279                                         reg = <0x7>; /* Port */
 280                                         local-mac-address = [ 00 00 00 00 00 00 ];
 281                                 };
 282                                 ethernet@8 {
 283                                         compatible = "cavium,octeon-3860-pip-port";
 284                                         reg = <0x8>; /* Port */
 285                                         local-mac-address = [ 00 00 00 00 00 00 ];
 286                                 };
 287                                 ethernet@9 {
 288                                         compatible = "cavium,octeon-3860-pip-port";
 289                                         reg = <0x9>; /* Port */
 290                                         local-mac-address = [ 00 00 00 00 00 00 ];
 291                                 };
 292                                 ethernet@a {
 293                                         compatible = "cavium,octeon-3860-pip-port";
 294                                         reg = <0xa>; /* Port */
 295                                         local-mac-address = [ 00 00 00 00 00 00 ];
 296                                 };
 297                                 ethernet@b {
 298                                         compatible = "cavium,octeon-3860-pip-port";
 299                                         reg = <0xb>; /* Port */
 300                                         local-mac-address = [ 00 00 00 00 00 00 ];
 301                                 };
 302                                 ethernet@c {
 303                                         compatible = "cavium,octeon-3860-pip-port";
 304                                         reg = <0xc>; /* Port */
 305                                         local-mac-address = [ 00 00 00 00 00 00 ];
 306                                 };
 307                                 ethernet@d {
 308                                         compatible = "cavium,octeon-3860-pip-port";
 309                                         reg = <0xd>; /* Port */
 310                                         local-mac-address = [ 00 00 00 00 00 00 ];
 311                                 };
 312                                 ethernet@e {
 313                                         compatible = "cavium,octeon-3860-pip-port";
 314                                         reg = <0xe>; /* Port */
 315                                         local-mac-address = [ 00 00 00 00 00 00 ];
 316                                 };
 317                                 ethernet@f {
 318                                         compatible = "cavium,octeon-3860-pip-port";
 319                                         reg = <0xf>; /* Port */
 320                                         local-mac-address = [ 00 00 00 00 00 00 ];
 321                                 };
 322                         };
 323
 324                         interface@1 {
 325                                 compatible = "cavium,octeon-3860-pip-interface";
 326                                 #address-cells = <1>;
 327                                 #size-cells = <0>;
 328                                 reg = <1>; /* interface */
 329
 330                                 ethernet@0 {
 331                                         compatible = "cavium,octeon-3860-pip-port";
 332                                         reg = <0x0>; /* Port */
 333                                         local-mac-address = [ 00 00 00 00 00 00 ];
 334                                         phy-handle = <&phy6>;
 335                                 };
 336                                 ethernet@1 {
 337                                         compatible = "cavium,octeon-3860-pip-port";
 338                                         reg = <0x1>; /* Port */
 339                                         local-mac-address = [ 00 00 00 00 00 00 ];
 340                                         phy-handle = <&phy7>;
 341                                 };
 342                                 ethernet@2 {
 343                                         compatible = "cavium,octeon-3860-pip-port";
 344                                         reg = <0x2>; /* Port */
 345                                         local-mac-address = [ 00 00 00 00 00 00 ];
 346                                         phy-handle = <&phy8>;
 347                                 };
 348                                 ethernet@3 {
 349                                         compatible = "cavium,octeon-3860-pip-port";
 350                                         reg = <0x3>; /* Port */
 351                                         local-mac-address = [ 00 00 00 00 00 00 ];
 352                                         phy-handle = <&phy9>;
 353                                 };
 354                         };
 355                 };
 356
 357                 twsi0: i2c@1180000001000 {
 358                         #address-cells = <1>;
 359                         #size-cells = <0>;
 360                         compatible = "cavium,octeon-3860-twsi";
 361                         reg = <0x11800 0x00001000 0x0 0x200>;
 362                         interrupts = <0 45>;
 363                         clock-frequency = <100000>;
 364
 365                         rtc@68 {
 366                                 compatible = "dallas,ds1337";
 367                                 reg = <0x68>;
 368                         };
 369                         tmp@4c {
 370                                 compatible = "ti,tmp421";
 371                                 reg = <0x4c>;
 372                         };
 373                 };
 374
 375                 twsi1: i2c@1180000001200 {
 376                         #address-cells = <1>;
 377                         #size-cells = <0>;
 378                         compatible = "cavium,octeon-3860-twsi";
 379                         reg = <0x11800 0x00001200 0x0 0x200>;
 380                         interrupts = <0 59>;
 381                         clock-frequency = <100000>;
 382                 };
 383
 384                 uart0: serial@1180000000800 {
 385                         compatible = "cavium,octeon-3860-uart","ns16550";
 386                         reg = <0x11800 0x00000800 0x0 0x400>;
 387                         clock-frequency = <0>;
 388                         current-speed = <115200>;
 389                         reg-shift = <3>;
 390                         interrupts = <0 34>;
 391                 };
 392
 393                 uart1: serial@1180000000c00 {
 394                         compatible = "cavium,octeon-3860-uart","ns16550";
 395                         reg = <0x11800 0x00000c00 0x0 0x400>;
 396                         clock-frequency = <0>;
 397                         current-speed = <115200>;
 398                         reg-shift = <3>;
 399                         interrupts = <0 35>;
 400                 };
 401
 402                 uart2: serial@1180000000400 {
 403                         compatible = "cavium,octeon-3860-uart","ns16550";
 404                         reg = <0x11800 0x00000400 0x0 0x400>;
 405                         clock-frequency = <0>;
 406                         current-speed = <115200>;
 407                         reg-shift = <3>;
 408                         interrupts = <1 16>;
 409                 };
 410
 411                 bootbus: bootbus@1180000000000 {
 412                         compatible = "cavium,octeon-3860-bootbus";
 413                         reg = <0x11800 0x00000000 0x0 0x200>;
 414                         /* The chip select number and offset */
 415                         #address-cells = <2>;
 416                         /* The size of the chip select region */
 417                         #size-cells = <1>;
 418                         ranges = <0 0  0x0 0x1f400000  0xc00000>,
 419                                  <1 0  0x10000 0x30000000  0>,
 420                                  <2 0  0x10000 0x40000000  0>,
 421                                  <3 0  0x10000 0x50000000  0>,
 422                                  <4 0  0x0 0x1d020000  0x10000>,
 423                                  <5 0  0x0 0x1d040000  0x10000>,
 424                                  <6 0  0x0 0x1d050000  0x10000>,
 425                                  <7 0  0x10000 0x90000000  0>;
 426
 427                         cavium,cs-config@0 {
 428                                 compatible = "cavium,octeon-3860-bootbus-config";
 429                                 cavium,cs-index = <0>;
 430                                 cavium,t-adr  = <20>;
 431                                 cavium,t-ce   = <60>;
 432                                 cavium,t-oe   = <60>;
 433                                 cavium,t-we   = <45>;
 434                                 cavium,t-rd-hld = <35>;
 435                                 cavium,t-wr-hld = <45>;
 436                                 cavium,t-pause  = <0>;
 437                                 cavium,t-wait   = <0>;
 438                                 cavium,t-page   = <35>;
 439                                 cavium,t-rd-dly = <0>;
 440
 441                                 cavium,pages     = <0>;
 442                                 cavium,bus-width = <8>;
 443                         };
 444                         cavium,cs-config@4 {
 445                                 compatible = "cavium,octeon-3860-bootbus-config";
 446                                 cavium,cs-index = <4>;
 447                                 cavium,t-adr  = <320>;
 448                                 cavium,t-ce   = <320>;
 449                                 cavium,t-oe   = <320>;
 450                                 cavium,t-we   = <320>;
 451                                 cavium,t-rd-hld = <320>;
 452                                 cavium,t-wr-hld = <320>;
 453                                 cavium,t-pause  = <320>;
 454                                 cavium,t-wait   = <320>;
 455                                 cavium,t-page   = <320>;
 456                                 cavium,t-rd-dly = <0>;
 457
 458                                 cavium,pages     = <0>;
 459                                 cavium,bus-width = <8>;
 460                         };
 461                         cavium,cs-config@5 {
 462                                 compatible = "cavium,octeon-3860-bootbus-config";
 463                                 cavium,cs-index = <5>;
 464                                 cavium,t-adr  = <5>;
 465                                 cavium,t-ce   = <300>;
 466                                 cavium,t-oe   = <125>;
 467                                 cavium,t-we   = <150>;
 468                                 cavium,t-rd-hld = <100>;
 469                                 cavium,t-wr-hld = <30>;
 470                                 cavium,t-pause  = <0>;
 471                                 cavium,t-wait   = <30>;
 472                                 cavium,t-page   = <320>;
 473                                 cavium,t-rd-dly = <0>;
 474
 475                                 cavium,pages     = <0>;
 476                                 cavium,bus-width = <16>;
 477                         };
 478                         cavium,cs-config@6 {
 479                                 compatible = "cavium,octeon-3860-bootbus-config";
 480                                 cavium,cs-index = <6>;
 481                                 cavium,t-adr  = <5>;
 482                                 cavium,t-ce   = <300>;
 483                                 cavium,t-oe   = <270>;
 484                                 cavium,t-we   = <150>;
 485                                 cavium,t-rd-hld = <100>;
 486                                 cavium,t-wr-hld = <70>;
 487                                 cavium,t-pause  = <0>;
 488                                 cavium,t-wait   = <0>;
 489                                 cavium,t-page   = <320>;
 490                                 cavium,t-rd-dly = <0>;
 491
 492                                 cavium,pages     = <0>;
 493                                 cavium,wait-mode;
 494                                 cavium,bus-width = <16>;
 495                         };
 496
 497                         flash0: nor@0,0 {
 498                                 compatible = "cfi-flash";
 499                                 reg = <0 0 0x800000>;
 500                                 #address-cells = <1>;
 501                                 #size-cells = <1>;
 502                         };
 503
 504                         led0: led-display@4,0 {
 505                                 compatible = "avago,hdsp-253x";
 506                                 reg = <4 0x20 0x20>, <4 0 0x20>;
 507                         };
 508
 509                         cf0: compact-flash@5,0 {
 510                                 compatible = "cavium,ebt3000-compact-flash";
 511                                 reg = <5 0 0x10000>, <6 0 0x10000>;
 512                                 cavium,bus-width = <16>;
 513                                 cavium,true-ide;
 514                                 cavium,dma-engine-handle = <&dma0>;
 515                         };
 516                 };
 517
 518                 dma0: dma-engine@1180000000100 {
 519                         compatible = "cavium,octeon-5750-bootbus-dma";
 520                         reg = <0x11800 0x00000100 0x0 0x8>;
 521                         interrupts = <0 63>;
 522                 };
 523                 dma1: dma-engine@1180000000108 {
 524                         compatible = "cavium,octeon-5750-bootbus-dma";
 525                         reg = <0x11800 0x00000108 0x0 0x8>;
 526                         interrupts = <0 63>;
 527                 };
 528
 529                 uctl: uctl@118006f000000 {
 530                         compatible = "cavium,octeon-6335-uctl";
 531                         reg = <0x11800 0x6f000000 0x0 0x100>;
 532                         ranges; /* Direct mapping */
 533                         #address-cells = <2>;
 534                         #size-cells = <2>;
 535                         /* 12MHz, 24MHz and 48MHz allowed */
 536                         refclk-frequency = <12000000>;
 537                         /* Either "crystal" or "external" */
 538                         refclk-type = "crystal";
 539
 540                         ehci@16f0000000000 {
 541                                 compatible = "cavium,octeon-6335-ehci","usb-ehci";
 542                                 reg = <0x16f00 0x00000000 0x0 0x100>;
 543                                 interrupts = <0 56>;
 544                                 big-endian-regs;
 545                         };
 546                         ohci@16f0000000400 {
 547                                 compatible = "cavium,octeon-6335-ohci","usb-ohci";
 548                                 reg = <0x16f00 0x00000400 0x0 0x100>;
 549                                 interrupts = <0 56>;
 550                                 big-endian-regs;
 551                         };
 552                 };
 553
 554                 usbn: usbn@1180068000000 {
 555                         compatible = "cavium,octeon-5750-usbn";
 556                         reg = <0x11800 0x68000000 0x0 0x1000>;
 557                         ranges; /* Direct mapping */
 558                         #address-cells = <2>;
 559                         #size-cells = <2>;
 560                         /* 12MHz, 24MHz and 48MHz allowed */
 561                         refclk-frequency = <12000000>;
 562                         /* Either "crystal" or "external" */
 563                         refclk-type = "crystal";
 564
 565                         usbc@16f0010000000 {
 566                                 compatible = "cavium,octeon-5750-usbc";
 567                                 reg = <0x16f00 0x10000000 0x0 0x80000>;
 568                                 interrupts = <0 56>;
 569                         };
 570                 };
 571         };
 572
 573         aliases {
 574                 mix0 = &mix0;
 575                 mix1 = &mix1;
 576                 pip = &pip;
 577                 smi0 = &smi0;
 578                 smi1 = &smi1;
 579                 twsi0 = &twsi0;
 580                 twsi1 = &twsi1;
 581                 uart0 = &uart0;
 582                 uart1 = &uart1;
 583                 uart2 = &uart2;
 584                 flash0 = &flash0;
 585                 cf0 = &cf0;
 586                 uctl = &uctl;
 587                 usbn = &usbn;
 588                 led0 = &led0;
 589         };
 590  };