Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[sfrench/cifs-2.6.git] / arch / m68knommu / platform / 527x / gpio.c
1 /*
2  * Coldfire generic GPIO support
3  *
4  * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18
19 #include <asm/coldfire.h>
20 #include <asm/mcfsim.h>
21 #include <asm/mcfgpio.h>
22
23 static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 #if defined(CONFIG_M5271)
25         {
26                 .gpio_chip                      = {
27                         .label                  = "PIRQ",
28                         .request                = mcf_gpio_request,
29                         .free                   = mcf_gpio_free,
30                         .direction_input        = mcf_gpio_direction_input,
31                         .direction_output       = mcf_gpio_direction_output,
32                         .get                    = mcf_gpio_get_value,
33                         .set                    = mcf_gpio_set_value,
34                         .base                   = 1,
35                         .ngpio                  = 7,
36                 },
37                 .pddr                           = MCFEPORT_EPDDR,
38                 .podr                           = MCFEPORT_EPDR,
39                 .ppdr                           = MCFEPORT_EPPDR,
40         },
41         {
42                 .gpio_chip                      = {
43                         .label                  = "ADDR",
44                         .request                = mcf_gpio_request,
45                         .free                   = mcf_gpio_free,
46                         .direction_input        = mcf_gpio_direction_input,
47                         .direction_output       = mcf_gpio_direction_output,
48                         .get                    = mcf_gpio_get_value,
49                         .set                    = mcf_gpio_set_value_fast,
50                         .base                   = 13,
51                         .ngpio                  = 3,
52                 },
53                 .pddr                           = MCFGPIO_PDDR_ADDR,
54                 .podr                           = MCFGPIO_PODR_ADDR,
55                 .ppdr                           = MCFGPIO_PPDSDR_ADDR,
56                 .setr                           = MCFGPIO_PPDSDR_ADDR,
57                 .clrr                           = MCFGPIO_PCLRR_ADDR,
58         },
59         {
60                 .gpio_chip                      = {
61                         .label                  = "DATAH",
62                         .request                = mcf_gpio_request,
63                         .free                   = mcf_gpio_free,
64                         .direction_input        = mcf_gpio_direction_input,
65                         .direction_output       = mcf_gpio_direction_output,
66                         .get                    = mcf_gpio_get_value,
67                         .set                    = mcf_gpio_set_value_fast,
68                         .base                   = 16,
69                         .ngpio                  = 8,
70                 },
71                 .pddr                           = MCFGPIO_PDDR_DATAH,
72                 .podr                           = MCFGPIO_PODR_DATAH,
73                 .ppdr                           = MCFGPIO_PPDSDR_DATAH,
74                 .setr                           = MCFGPIO_PPDSDR_DATAH,
75                 .clrr                           = MCFGPIO_PCLRR_DATAH,
76         },
77         {
78                 .gpio_chip                      = {
79                         .label                  = "DATAL",
80                         .request                = mcf_gpio_request,
81                         .free                   = mcf_gpio_free,
82                         .direction_input        = mcf_gpio_direction_input,
83                         .direction_output       = mcf_gpio_direction_output,
84                         .get                    = mcf_gpio_get_value,
85                         .set                    = mcf_gpio_set_value_fast,
86                         .base                   = 24,
87                         .ngpio                  = 8,
88                 },
89                 .pddr                           = MCFGPIO_PDDR_DATAL,
90                 .podr                           = MCFGPIO_PODR_DATAL,
91                 .ppdr                           = MCFGPIO_PPDSDR_DATAL,
92                 .setr                           = MCFGPIO_PPDSDR_DATAL,
93                 .clrr                           = MCFGPIO_PCLRR_DATAL,
94         },
95         {
96                 .gpio_chip                      = {
97                         .label                  = "BUSCTL",
98                         .request                = mcf_gpio_request,
99                         .free                   = mcf_gpio_free,
100                         .direction_input        = mcf_gpio_direction_input,
101                         .direction_output       = mcf_gpio_direction_output,
102                         .get                    = mcf_gpio_get_value,
103                         .set                    = mcf_gpio_set_value_fast,
104                         .base                   = 32,
105                         .ngpio                  = 8,
106                 },
107                 .pddr                           = MCFGPIO_PDDR_BUSCTL,
108                 .podr                           = MCFGPIO_PODR_BUSCTL,
109                 .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
110                 .setr                           = MCFGPIO_PPDSDR_BUSCTL,
111                 .clrr                           = MCFGPIO_PCLRR_BUSCTL,
112         },
113         {
114                 .gpio_chip                      = {
115                         .label                  = "BS",
116                         .request                = mcf_gpio_request,
117                         .free                   = mcf_gpio_free,
118                         .direction_input        = mcf_gpio_direction_input,
119                         .direction_output       = mcf_gpio_direction_output,
120                         .get                    = mcf_gpio_get_value,
121                         .set                    = mcf_gpio_set_value_fast,
122                         .base                   = 40,
123                         .ngpio                  = 4,
124                 },
125                 .pddr                           = MCFGPIO_PDDR_BS,
126                 .podr                           = MCFGPIO_PODR_BS,
127                 .ppdr                           = MCFGPIO_PPDSDR_BS,
128                 .setr                           = MCFGPIO_PPDSDR_BS,
129                 .clrr                           = MCFGPIO_PCLRR_BS,
130         },
131         {
132                 .gpio_chip                      = {
133                         .label                  = "CS",
134                         .request                = mcf_gpio_request,
135                         .free                   = mcf_gpio_free,
136                         .direction_input        = mcf_gpio_direction_input,
137                         .direction_output       = mcf_gpio_direction_output,
138                         .get                    = mcf_gpio_get_value,
139                         .set                    = mcf_gpio_set_value_fast,
140                         .base                   = 49,
141                         .ngpio                  = 7,
142                 },
143                 .pddr                           = MCFGPIO_PDDR_CS,
144                 .podr                           = MCFGPIO_PODR_CS,
145                 .ppdr                           = MCFGPIO_PPDSDR_CS,
146                 .setr                           = MCFGPIO_PPDSDR_CS,
147                 .clrr                           = MCFGPIO_PCLRR_CS,
148         },
149         {
150                 .gpio_chip                      = {
151                         .label                  = "SDRAM",
152                         .request                = mcf_gpio_request,
153                         .free                   = mcf_gpio_free,
154                         .direction_input        = mcf_gpio_direction_input,
155                         .direction_output       = mcf_gpio_direction_output,
156                         .get                    = mcf_gpio_get_value,
157                         .set                    = mcf_gpio_set_value_fast,
158                         .base                   = 56,
159                         .ngpio                  = 6,
160                 },
161                 .pddr                           = MCFGPIO_PDDR_SDRAM,
162                 .podr                           = MCFGPIO_PODR_SDRAM,
163                 .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
164                 .setr                           = MCFGPIO_PPDSDR_SDRAM,
165                 .clrr                           = MCFGPIO_PCLRR_SDRAM,
166         },
167         {
168                 .gpio_chip                      = {
169                         .label                  = "FECI2C",
170                         .request                = mcf_gpio_request,
171                         .free                   = mcf_gpio_free,
172                         .direction_input        = mcf_gpio_direction_input,
173                         .direction_output       = mcf_gpio_direction_output,
174                         .get                    = mcf_gpio_get_value,
175                         .set                    = mcf_gpio_set_value_fast,
176                         .base                   = 64,
177                         .ngpio                  = 4,
178                 },
179                 .pddr                           = MCFGPIO_PDDR_FECI2C,
180                 .podr                           = MCFGPIO_PODR_FECI2C,
181                 .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
182                 .setr                           = MCFGPIO_PPDSDR_FECI2C,
183                 .clrr                           = MCFGPIO_PCLRR_FECI2C,
184         },
185         {
186                 .gpio_chip                      = {
187                         .label                  = "UARTH",
188                         .request                = mcf_gpio_request,
189                         .free                   = mcf_gpio_free,
190                         .direction_input        = mcf_gpio_direction_input,
191                         .direction_output       = mcf_gpio_direction_output,
192                         .get                    = mcf_gpio_get_value,
193                         .set                    = mcf_gpio_set_value_fast,
194                         .base                   = 72,
195                         .ngpio                  = 2,
196                 },
197                 .pddr                           = MCFGPIO_PDDR_UARTH,
198                 .podr                           = MCFGPIO_PODR_UARTH,
199                 .ppdr                           = MCFGPIO_PPDSDR_UARTH,
200                 .setr                           = MCFGPIO_PPDSDR_UARTH,
201                 .clrr                           = MCFGPIO_PCLRR_UARTH,
202         },
203         {
204                 .gpio_chip                      = {
205                         .label                  = "UARTL",
206                         .request                = mcf_gpio_request,
207                         .free                   = mcf_gpio_free,
208                         .direction_input        = mcf_gpio_direction_input,
209                         .direction_output       = mcf_gpio_direction_output,
210                         .get                    = mcf_gpio_get_value,
211                         .set                    = mcf_gpio_set_value_fast,
212                         .base                   = 80,
213                         .ngpio                  = 8,
214                 },
215                 .pddr                           = MCFGPIO_PDDR_UARTL,
216                 .podr                           = MCFGPIO_PODR_UARTL,
217                 .ppdr                           = MCFGPIO_PPDSDR_UARTL,
218                 .setr                           = MCFGPIO_PPDSDR_UARTL,
219                 .clrr                           = MCFGPIO_PCLRR_UARTL,
220         },
221         {
222                 .gpio_chip                      = {
223                         .label                  = "QSPI",
224                         .request                = mcf_gpio_request,
225                         .free                   = mcf_gpio_free,
226                         .direction_input        = mcf_gpio_direction_input,
227                         .direction_output       = mcf_gpio_direction_output,
228                         .get                    = mcf_gpio_get_value,
229                         .set                    = mcf_gpio_set_value_fast,
230                         .base                   = 88,
231                         .ngpio                  = 5,
232                 },
233                 .pddr                           = MCFGPIO_PDDR_QSPI,
234                 .podr                           = MCFGPIO_PODR_QSPI,
235                 .ppdr                           = MCFGPIO_PPDSDR_QSPI,
236                 .setr                           = MCFGPIO_PPDSDR_QSPI,
237                 .clrr                           = MCFGPIO_PCLRR_QSPI,
238         },
239         {
240                 .gpio_chip                      = {
241                         .label                  = "TIMER",
242                         .request                = mcf_gpio_request,
243                         .free                   = mcf_gpio_free,
244                         .direction_input        = mcf_gpio_direction_input,
245                         .direction_output       = mcf_gpio_direction_output,
246                         .get                    = mcf_gpio_get_value,
247                         .set                    = mcf_gpio_set_value_fast,
248                         .base                   = 96,
249                         .ngpio                  = 8,
250                 },
251                 .pddr                           = MCFGPIO_PDDR_TIMER,
252                 .podr                           = MCFGPIO_PODR_TIMER,
253                 .ppdr                           = MCFGPIO_PPDSDR_TIMER,
254                 .setr                           = MCFGPIO_PPDSDR_TIMER,
255                 .clrr                           = MCFGPIO_PCLRR_TIMER,
256         },
257 #elif defined(CONFIG_M5275)
258         {
259                 .gpio_chip                      = {
260                         .label                  = "PIRQ",
261                         .request                = mcf_gpio_request,
262                         .free                   = mcf_gpio_free,
263                         .direction_input        = mcf_gpio_direction_input,
264                         .direction_output       = mcf_gpio_direction_output,
265                         .get                    = mcf_gpio_get_value,
266                         .set                    = mcf_gpio_set_value,
267                         .base                   = 1,
268                         .ngpio                  = 7,
269                 },
270                 .pddr                           = MCFEPORT_EPDDR,
271                 .podr                           = MCFEPORT_EPDR,
272                 .ppdr                           = MCFEPORT_EPPDR,
273         },
274         {
275                 .gpio_chip                      = {
276                         .label                  = "BUSCTL",
277                         .request                = mcf_gpio_request,
278                         .free                   = mcf_gpio_free,
279                         .direction_input        = mcf_gpio_direction_input,
280                         .direction_output       = mcf_gpio_direction_output,
281                         .get                    = mcf_gpio_get_value,
282                         .set                    = mcf_gpio_set_value_fast,
283                         .base                   = 8,
284                         .ngpio                  = 8,
285                 },
286                 .pddr                           = MCFGPIO_PDDR_BUSCTL,
287                 .podr                           = MCFGPIO_PODR_BUSCTL,
288                 .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
289                 .setr                           = MCFGPIO_PPDSDR_BUSCTL,
290                 .clrr                           = MCFGPIO_PCLRR_BUSCTL,
291         },
292         {
293                 .gpio_chip                      = {
294                         .label                  = "ADDR",
295                         .request                = mcf_gpio_request,
296                         .free                   = mcf_gpio_free,
297                         .direction_input        = mcf_gpio_direction_input,
298                         .direction_output       = mcf_gpio_direction_output,
299                         .get                    = mcf_gpio_get_value,
300                         .set                    = mcf_gpio_set_value_fast,
301                         .base                   = 21,
302                         .ngpio                  = 3,
303                 },
304                 .pddr                           = MCFGPIO_PDDR_ADDR,
305                 .podr                           = MCFGPIO_PODR_ADDR,
306                 .ppdr                           = MCFGPIO_PPDSDR_ADDR,
307                 .setr                           = MCFGPIO_PPDSDR_ADDR,
308                 .clrr                           = MCFGPIO_PCLRR_ADDR,
309         },
310         {
311                 .gpio_chip                      = {
312                         .label                  = "CS",
313                         .request                = mcf_gpio_request,
314                         .free                   = mcf_gpio_free,
315                         .direction_input        = mcf_gpio_direction_input,
316                         .direction_output       = mcf_gpio_direction_output,
317                         .get                    = mcf_gpio_get_value,
318                         .set                    = mcf_gpio_set_value_fast,
319                         .base                   = 25,
320                         .ngpio                  = 7,
321                 },
322                 .pddr                           = MCFGPIO_PDDR_CS,
323                 .podr                           = MCFGPIO_PODR_CS,
324                 .ppdr                           = MCFGPIO_PPDSDR_CS,
325                 .setr                           = MCFGPIO_PPDSDR_CS,
326                 .clrr                           = MCFGPIO_PCLRR_CS,
327         },
328         {
329                 .gpio_chip                      = {
330                         .label                  = "FEC0H",
331                         .request                = mcf_gpio_request,
332                         .free                   = mcf_gpio_free,
333                         .direction_input        = mcf_gpio_direction_input,
334                         .direction_output       = mcf_gpio_direction_output,
335                         .get                    = mcf_gpio_get_value,
336                         .set                    = mcf_gpio_set_value_fast,
337                         .base                   = 32,
338                         .ngpio                  = 8,
339                 },
340                 .pddr                           = MCFGPIO_PDDR_FEC0H,
341                 .podr                           = MCFGPIO_PODR_FEC0H,
342                 .ppdr                           = MCFGPIO_PPDSDR_FEC0H,
343                 .setr                           = MCFGPIO_PPDSDR_FEC0H,
344                 .clrr                           = MCFGPIO_PCLRR_FEC0H,
345         },
346         {
347                 .gpio_chip                      = {
348                         .label                  = "FEC0L",
349                         .request                = mcf_gpio_request,
350                         .free                   = mcf_gpio_free,
351                         .direction_input        = mcf_gpio_direction_input,
352                         .direction_output       = mcf_gpio_direction_output,
353                         .get                    = mcf_gpio_get_value,
354                         .set                    = mcf_gpio_set_value_fast,
355                         .base                   = 40,
356                         .ngpio                  = 8,
357                 },
358                 .pddr                           = MCFGPIO_PDDR_FEC0L,
359                 .podr                           = MCFGPIO_PODR_FEC0L,
360                 .ppdr                           = MCFGPIO_PPDSDR_FEC0L,
361                 .setr                           = MCFGPIO_PPDSDR_FEC0L,
362                 .clrr                           = MCFGPIO_PCLRR_FEC0L,
363         },
364         {
365                 .gpio_chip                      = {
366                         .label                  = "FECI2C",
367                         .request                = mcf_gpio_request,
368                         .free                   = mcf_gpio_free,
369                         .direction_input        = mcf_gpio_direction_input,
370                         .direction_output       = mcf_gpio_direction_output,
371                         .get                    = mcf_gpio_get_value,
372                         .set                    = mcf_gpio_set_value_fast,
373                         .base                   = 48,
374                         .ngpio                  = 6,
375                 },
376                 .pddr                           = MCFGPIO_PDDR_FECI2C,
377                 .podr                           = MCFGPIO_PODR_FECI2C,
378                 .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
379                 .setr                           = MCFGPIO_PPDSDR_FECI2C,
380                 .clrr                           = MCFGPIO_PCLRR_FECI2C,
381         },
382         {
383                 .gpio_chip                      = {
384                         .label                  = "QSPI",
385                         .request                = mcf_gpio_request,
386                         .free                   = mcf_gpio_free,
387                         .direction_input        = mcf_gpio_direction_input,
388                         .direction_output       = mcf_gpio_direction_output,
389                         .get                    = mcf_gpio_get_value,
390                         .set                    = mcf_gpio_set_value_fast,
391                         .base                   = 56,
392                         .ngpio                  = 7,
393                 },
394                 .pddr                           = MCFGPIO_PDDR_QSPI,
395                 .podr                           = MCFGPIO_PODR_QSPI,
396                 .ppdr                           = MCFGPIO_PPDSDR_QSPI,
397                 .setr                           = MCFGPIO_PPDSDR_QSPI,
398                 .clrr                           = MCFGPIO_PCLRR_QSPI,
399         },
400         {
401                 .gpio_chip                      = {
402                         .label                  = "SDRAM",
403                         .request                = mcf_gpio_request,
404                         .free                   = mcf_gpio_free,
405                         .direction_input        = mcf_gpio_direction_input,
406                         .direction_output       = mcf_gpio_direction_output,
407                         .get                    = mcf_gpio_get_value,
408                         .set                    = mcf_gpio_set_value_fast,
409                         .base                   = 64,
410                         .ngpio                  = 8,
411                 },
412                 .pddr                           = MCFGPIO_PDDR_SDRAM,
413                 .podr                           = MCFGPIO_PODR_SDRAM,
414                 .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
415                 .setr                           = MCFGPIO_PPDSDR_SDRAM,
416                 .clrr                           = MCFGPIO_PCLRR_SDRAM,
417         },
418         {
419                 .gpio_chip                      = {
420                         .label                  = "TIMERH",
421                         .request                = mcf_gpio_request,
422                         .free                   = mcf_gpio_free,
423                         .direction_input        = mcf_gpio_direction_input,
424                         .direction_output       = mcf_gpio_direction_output,
425                         .get                    = mcf_gpio_get_value,
426                         .set                    = mcf_gpio_set_value_fast,
427                         .base                   = 72,
428                         .ngpio                  = 4,
429                 },
430                 .pddr                           = MCFGPIO_PDDR_TIMERH,
431                 .podr                           = MCFGPIO_PODR_TIMERH,
432                 .ppdr                           = MCFGPIO_PPDSDR_TIMERH,
433                 .setr                           = MCFGPIO_PPDSDR_TIMERH,
434                 .clrr                           = MCFGPIO_PCLRR_TIMERH,
435         },
436         {
437                 .gpio_chip                      = {
438                         .label                  = "TIMERL",
439                         .request                = mcf_gpio_request,
440                         .free                   = mcf_gpio_free,
441                         .direction_input        = mcf_gpio_direction_input,
442                         .direction_output       = mcf_gpio_direction_output,
443                         .get                    = mcf_gpio_get_value,
444                         .set                    = mcf_gpio_set_value_fast,
445                         .base                   = 80,
446                         .ngpio                  = 4,
447                 },
448                 .pddr                           = MCFGPIO_PDDR_TIMERL,
449                 .podr                           = MCFGPIO_PODR_TIMERL,
450                 .ppdr                           = MCFGPIO_PPDSDR_TIMERL,
451                 .setr                           = MCFGPIO_PPDSDR_TIMERL,
452                 .clrr                           = MCFGPIO_PCLRR_TIMERL,
453         },
454         {
455                 .gpio_chip                      = {
456                         .label                  = "UARTL",
457                         .request                = mcf_gpio_request,
458                         .free                   = mcf_gpio_free,
459                         .direction_input        = mcf_gpio_direction_input,
460                         .direction_output       = mcf_gpio_direction_output,
461                         .get                    = mcf_gpio_get_value,
462                         .set                    = mcf_gpio_set_value_fast,
463                         .base                   = 88,
464                         .ngpio                  = 8,
465                 },
466                 .pddr                           = MCFGPIO_PDDR_UARTL,
467                 .podr                           = MCFGPIO_PODR_UARTL,
468                 .ppdr                           = MCFGPIO_PPDSDR_UARTL,
469                 .setr                           = MCFGPIO_PPDSDR_UARTL,
470                 .clrr                           = MCFGPIO_PCLRR_UARTL,
471         },
472         {
473                 .gpio_chip                      = {
474                         .label                  = "FEC1H",
475                         .request                = mcf_gpio_request,
476                         .free                   = mcf_gpio_free,
477                         .direction_input        = mcf_gpio_direction_input,
478                         .direction_output       = mcf_gpio_direction_output,
479                         .get                    = mcf_gpio_get_value,
480                         .set                    = mcf_gpio_set_value_fast,
481                         .base                   = 96,
482                         .ngpio                  = 8,
483                 },
484                 .pddr                           = MCFGPIO_PDDR_FEC1H,
485                 .podr                           = MCFGPIO_PODR_FEC1H,
486                 .ppdr                           = MCFGPIO_PPDSDR_FEC1H,
487                 .setr                           = MCFGPIO_PPDSDR_FEC1H,
488                 .clrr                           = MCFGPIO_PCLRR_FEC1H,
489         },
490         {
491                 .gpio_chip                      = {
492                         .label                  = "FEC1L",
493                         .request                = mcf_gpio_request,
494                         .free                   = mcf_gpio_free,
495                         .direction_input        = mcf_gpio_direction_input,
496                         .direction_output       = mcf_gpio_direction_output,
497                         .get                    = mcf_gpio_get_value,
498                         .set                    = mcf_gpio_set_value_fast,
499                         .base                   = 104,
500                         .ngpio                  = 8,
501                 },
502                 .pddr                           = MCFGPIO_PDDR_FEC1L,
503                 .podr                           = MCFGPIO_PODR_FEC1L,
504                 .ppdr                           = MCFGPIO_PPDSDR_FEC1L,
505                 .setr                           = MCFGPIO_PPDSDR_FEC1L,
506                 .clrr                           = MCFGPIO_PCLRR_FEC1L,
507         },
508         {
509                 .gpio_chip                      = {
510                         .label                  = "BS",
511                         .request                = mcf_gpio_request,
512                         .free                   = mcf_gpio_free,
513                         .direction_input        = mcf_gpio_direction_input,
514                         .direction_output       = mcf_gpio_direction_output,
515                         .get                    = mcf_gpio_get_value,
516                         .set                    = mcf_gpio_set_value_fast,
517                         .base                   = 114,
518                         .ngpio                  = 2,
519                 },
520                 .pddr                           = MCFGPIO_PDDR_BS,
521                 .podr                           = MCFGPIO_PODR_BS,
522                 .ppdr                           = MCFGPIO_PPDSDR_BS,
523                 .setr                           = MCFGPIO_PPDSDR_BS,
524                 .clrr                           = MCFGPIO_PCLRR_BS,
525         },
526         {
527                 .gpio_chip                      = {
528                         .label                  = "IRQ",
529                         .request                = mcf_gpio_request,
530                         .free                   = mcf_gpio_free,
531                         .direction_input        = mcf_gpio_direction_input,
532                         .direction_output       = mcf_gpio_direction_output,
533                         .get                    = mcf_gpio_get_value,
534                         .set                    = mcf_gpio_set_value_fast,
535                         .base                   = 121,
536                         .ngpio                  = 7,
537                 },
538                 .pddr                           = MCFGPIO_PDDR_IRQ,
539                 .podr                           = MCFGPIO_PODR_IRQ,
540                 .ppdr                           = MCFGPIO_PPDSDR_IRQ,
541                 .setr                           = MCFGPIO_PPDSDR_IRQ,
542                 .clrr                           = MCFGPIO_PCLRR_IRQ,
543         },
544         {
545                 .gpio_chip                      = {
546                         .label                  = "USBH",
547                         .request                = mcf_gpio_request,
548                         .free                   = mcf_gpio_free,
549                         .direction_input        = mcf_gpio_direction_input,
550                         .direction_output       = mcf_gpio_direction_output,
551                         .get                    = mcf_gpio_get_value,
552                         .set                    = mcf_gpio_set_value_fast,
553                         .base                   = 128,
554                         .ngpio                  = 1,
555                 },
556                 .pddr                           = MCFGPIO_PDDR_USBH,
557                 .podr                           = MCFGPIO_PODR_USBH,
558                 .ppdr                           = MCFGPIO_PPDSDR_USBH,
559                 .setr                           = MCFGPIO_PPDSDR_USBH,
560                 .clrr                           = MCFGPIO_PCLRR_USBH,
561         },
562         {
563                 .gpio_chip                      = {
564                         .label                  = "USBL",
565                         .request                = mcf_gpio_request,
566                         .free                   = mcf_gpio_free,
567                         .direction_input        = mcf_gpio_direction_input,
568                         .direction_output       = mcf_gpio_direction_output,
569                         .get                    = mcf_gpio_get_value,
570                         .set                    = mcf_gpio_set_value_fast,
571                         .base                   = 136,
572                         .ngpio                  = 8,
573                 },
574                 .pddr                           = MCFGPIO_PDDR_USBL,
575                 .podr                           = MCFGPIO_PODR_USBL,
576                 .ppdr                           = MCFGPIO_PPDSDR_USBL,
577                 .setr                           = MCFGPIO_PPDSDR_USBL,
578                 .clrr                           = MCFGPIO_PCLRR_USBL,
579         },
580         {
581                 .gpio_chip                      = {
582                         .label                  = "UARTH",
583                         .request                = mcf_gpio_request,
584                         .free                   = mcf_gpio_free,
585                         .direction_input        = mcf_gpio_direction_input,
586                         .direction_output       = mcf_gpio_direction_output,
587                         .get                    = mcf_gpio_get_value,
588                         .set                    = mcf_gpio_set_value_fast,
589                         .base                   = 144,
590                         .ngpio                  = 4,
591                 },
592                 .pddr                           = MCFGPIO_PDDR_UARTH,
593                 .podr                           = MCFGPIO_PODR_UARTH,
594                 .ppdr                           = MCFGPIO_PPDSDR_UARTH,
595                 .setr                           = MCFGPIO_PPDSDR_UARTH,
596                 .clrr                           = MCFGPIO_PCLRR_UARTH,
597         },
598 #endif
599 };
600
601 static int __init mcf_gpio_init(void)
602 {
603         unsigned i = 0;
604         while (i < ARRAY_SIZE(mcf_gpio_chips))
605                 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
606         return 0;
607 }
608
609 core_initcall(mcf_gpio_init);