Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6
[sfrench/cifs-2.6.git] / arch / ia64 / sn / pci / pcibr / pcibr_provider.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/geo.h>
14 #include <asm/sn/pcibr_provider.h>
15 #include <asm/sn/pcibus_provider_defs.h>
16 #include <asm/sn/pcidev.h>
17 #include <asm/sn/sn_sal.h>
18 #include <asm/sn/sn2/sn_hwperf.h>
19 #include "xtalk/xwidgetdev.h"
20 #include "xtalk/hubdev.h"
21
22 int
23 sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp)
24 {
25         struct ia64_sal_retval ret_stuff;
26         u64 busnum;
27         u64 segment;
28
29         ret_stuff.status = 0;
30         ret_stuff.v0 = 0;
31
32         segment = soft->pbi_buscommon.bs_persist_segment;
33         busnum = soft->pbi_buscommon.bs_persist_busnum;
34         SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_ENABLE, segment,
35                         busnum, (u64) device, (u64) resp, 0, 0, 0);
36
37         return (int)ret_stuff.v0;
38 }
39
40 int
41 sal_pcibr_slot_disable(struct pcibus_info *soft, int device, int action,
42                        void *resp)
43 {
44         struct ia64_sal_retval ret_stuff;
45         u64 busnum;
46         u64 segment;
47
48         ret_stuff.status = 0;
49         ret_stuff.v0 = 0;
50
51         segment = soft->pbi_buscommon.bs_persist_segment;
52         busnum = soft->pbi_buscommon.bs_persist_busnum;
53         SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_DISABLE,
54                         segment, busnum, (u64) device, (u64) action,
55                         (u64) resp, 0, 0);
56
57         return (int)ret_stuff.v0;
58 }
59
60 static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
61 {
62         struct ia64_sal_retval ret_stuff;
63         u64 busnum;
64         int segment;
65         ret_stuff.status = 0;
66         ret_stuff.v0 = 0;
67
68         segment = soft->pbi_buscommon.bs_persist_segment;
69         busnum = soft->pbi_buscommon.bs_persist_busnum;
70         SAL_CALL_NOLOCK(ret_stuff,
71                         (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
72                         (u64) segment, (u64) busnum, 0, 0, 0, 0, 0);
73
74         return (int)ret_stuff.v0;
75 }
76
77 u16 sn_ioboard_to_pci_bus(struct pci_bus *pci_bus)
78 {
79         s64 rc;
80         u16 ioboard;
81         nasid_t nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
82
83         rc = ia64_sn_sysctl_ioboard_get(nasid, &ioboard);
84         if (rc) {
85                 printk(KERN_WARNING "ia64_sn_sysctl_ioboard_get failed: %ld\n",
86                        rc);
87                 return 0;
88         }
89
90         return ioboard;
91 }
92
93 /* 
94  * PCI Bridge Error interrupt handler.  Gets invoked whenever a PCI 
95  * bridge sends an error interrupt.
96  */
97 static irqreturn_t
98 pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *regs)
99 {
100         struct pcibus_info *soft = (struct pcibus_info *)arg;
101
102         if (sal_pcibr_error_interrupt(soft) < 0) {
103                 panic("pcibr_error_intr_handler(): Fatal Bridge Error");
104         }
105         return IRQ_HANDLED;
106 }
107
108 void *
109 pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
110 {
111         int nasid, cnode, j;
112         cnodeid_t near_cnode;
113         struct hubdev_info *hubdev_info;
114         struct pcibus_info *soft;
115         struct sn_flush_device_kernel *sn_flush_device_kernel;
116         struct sn_flush_device_common *common;
117
118         if (! IS_PCI_BRIDGE_ASIC(prom_bussoft->bs_asic_type)) {
119                 return NULL;
120         }
121
122         /*
123          * Allocate kernel bus soft and copy from prom.
124          */
125
126         soft = kmalloc(sizeof(struct pcibus_info), GFP_KERNEL);
127         if (!soft) {
128                 return NULL;
129         }
130
131         memcpy(soft, prom_bussoft, sizeof(struct pcibus_info));
132         soft->pbi_buscommon.bs_base =
133             (((u64) soft->pbi_buscommon.
134               bs_base << 4) >> 4) | __IA64_UNCACHED_OFFSET;
135
136         spin_lock_init(&soft->pbi_lock);
137
138         /*
139          * register the bridge's error interrupt handler
140          */
141         if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
142                         IRQF_SHARED, "PCIBR error", (void *)(soft))) {
143                 printk(KERN_WARNING
144                        "pcibr cannot allocate interrupt for error handler\n");
145         }
146
147         /* 
148          * Update the Bridge with the "kernel" pagesize 
149          */
150         if (PAGE_SIZE < 16384) {
151                 pcireg_control_bit_clr(soft, PCIBR_CTRL_PAGE_SIZE);
152         } else {
153                 pcireg_control_bit_set(soft, PCIBR_CTRL_PAGE_SIZE);
154         }
155
156         nasid = NASID_GET(soft->pbi_buscommon.bs_base);
157         cnode = nasid_to_cnodeid(nasid);
158         hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
159
160         if (hubdev_info->hdi_flush_nasid_list.widget_p) {
161                 sn_flush_device_kernel = hubdev_info->hdi_flush_nasid_list.
162                     widget_p[(int)soft->pbi_buscommon.bs_xid];
163                 if (sn_flush_device_kernel) {
164                         for (j = 0; j < DEV_PER_WIDGET;
165                              j++, sn_flush_device_kernel++) {
166                                 common = sn_flush_device_kernel->common;
167                                 if (common->sfdl_slot == -1)
168                                         continue;
169                                 if ((common->sfdl_persistent_segment ==
170                                      soft->pbi_buscommon.bs_persist_segment) &&
171                                      (common->sfdl_persistent_busnum ==
172                                      soft->pbi_buscommon.bs_persist_busnum))
173                                         common->sfdl_pcibus_info =
174                                             soft;
175                         }
176                 }
177         }
178
179         /* Setup the PMU ATE map */
180         soft->pbi_int_ate_resource.lowest_free_index = 0;
181         soft->pbi_int_ate_resource.ate =
182             kzalloc(soft->pbi_int_ate_size * sizeof(u64), GFP_KERNEL);
183
184         if (!soft->pbi_int_ate_resource.ate) {
185                 kfree(soft);
186                 return NULL;
187         }
188
189         if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
190                 /* TIO PCI Bridge: find nearest node with CPUs */
191                 int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
192
193                 if (e < 0) {
194                         near_cnode = (cnodeid_t)-1; /* use any node */
195                         printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
196                                 "near node with CPUs to TIO node %d, err=%d\n",
197                                 cnode, e);
198                 }
199                 controller->node = near_cnode;
200         }
201         else
202                 controller->node = cnode;
203         return soft;
204 }
205
206 void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
207 {
208         struct pcidev_info *pcidev_info;
209         struct pcibus_info *pcibus_info;
210         int bit = sn_irq_info->irq_int_bit;
211
212         if (! sn_irq_info->irq_bridge)
213                 return;
214
215         pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
216         if (pcidev_info) {
217                 pcibus_info =
218                     (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
219                     pdi_pcibus_info;
220                 pcireg_force_intr_set(pcibus_info, bit);
221         }
222 }
223
224 void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
225 {
226         struct pcidev_info *pcidev_info;
227         struct pcibus_info *pcibus_info;
228         int bit = sn_irq_info->irq_int_bit;
229         u64 xtalk_addr = sn_irq_info->irq_xtalkaddr;
230
231         pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
232         if (pcidev_info) {
233                 pcibus_info =
234                     (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
235                     pdi_pcibus_info;
236
237                 /* Disable the device's IRQ   */
238                 pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit));
239
240                 /* Change the device's IRQ    */
241                 pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
242
243                 /* Re-enable the device's IRQ */
244                 pcireg_intr_enable_bit_set(pcibus_info, (1 << bit));
245
246                 pcibr_force_interrupt(sn_irq_info);
247         }
248 }
249
250 /*
251  * Provider entries for PIC/CP
252  */
253
254 struct sn_pcibus_provider pcibr_provider = {
255         .dma_map = pcibr_dma_map,
256         .dma_map_consistent = pcibr_dma_map_consistent,
257         .dma_unmap = pcibr_dma_unmap,
258         .bus_fixup = pcibr_bus_fixup,
259         .force_interrupt = pcibr_force_interrupt,
260         .target_interrupt = pcibr_target_interrupt
261 };
262
263 int
264 pcibr_init_provider(void)
265 {
266         sn_pci_provider[PCIIO_ASIC_TYPE_PIC] = &pcibr_provider;
267         sn_pci_provider[PCIIO_ASIC_TYPE_TIOCP] = &pcibr_provider;
268
269         return 0;
270 }
271
272 EXPORT_SYMBOL_GPL(sal_pcibr_slot_enable);
273 EXPORT_SYMBOL_GPL(sal_pcibr_slot_disable);
274 EXPORT_SYMBOL_GPL(sn_ioboard_to_pci_bus);