Altix: ACPI SSDT PCI device support
[sfrench/cifs-2.6.git] / arch / ia64 / sn / kernel / io_init.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7  */
8
9 #include <asm/sn/types.h>
10 #include <asm/sn/addrs.h>
11 #include <asm/sn/io.h>
12 #include <asm/sn/module.h>
13 #include <asm/sn/intr.h>
14 #include <asm/sn/pcibus_provider_defs.h>
15 #include <asm/sn/pcidev.h>
16 #include <asm/sn/sn_sal.h>
17 #include "xtalk/hubdev.h"
18
19 /*
20  * The code in this file will only be executed when running with
21  * a PROM that does _not_ have base ACPI IO support.
22  * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
23  */
24
25 static int max_segment_number;           /* Default highest segment number */
26 static int max_pcibus_number = 255;     /* Default highest pci bus number */
27
28
29 /*
30  * Retrieve the hub device info structure for the given nasid.
31  */
32 static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
33 {
34         struct ia64_sal_retval ret_stuff;
35         ret_stuff.status = 0;
36         ret_stuff.v0 = 0;
37
38         SAL_CALL_NOLOCK(ret_stuff,
39                         (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
40                         (u64) handle, (u64) address, 0, 0, 0, 0, 0);
41         return ret_stuff.v0;
42 }
43
44 /*
45  * Retrieve the pci bus information given the bus number.
46  */
47 static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
48 {
49         struct ia64_sal_retval ret_stuff;
50         ret_stuff.status = 0;
51         ret_stuff.v0 = 0;
52
53         SAL_CALL_NOLOCK(ret_stuff,
54                         (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
55                         (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
56         return ret_stuff.v0;
57 }
58
59 /*
60  * Retrieve the pci device information given the bus and device|function number.
61  */
62 static inline u64
63 sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
64                     u64 sn_irq_info)
65 {
66         struct ia64_sal_retval ret_stuff;
67         ret_stuff.status = 0;
68         ret_stuff.v0 = 0;
69
70         SAL_CALL_NOLOCK(ret_stuff,
71                         (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
72                         (u64) segment, (u64) bus_number, (u64) devfn,
73                         (u64) pci_dev,
74                         sn_irq_info, 0, 0);
75         return ret_stuff.v0;
76 }
77
78
79 /*
80  * sn_fixup_ionodes() - This routine initializes the HUB data structure for
81  *                      each node in the system. This function is only
82  *                      executed when running with a non-ACPI capable PROM.
83  */
84 static void __init sn_fixup_ionodes(void)
85 {
86
87         struct hubdev_info *hubdev;
88         u64 status;
89         u64 nasid;
90         int i;
91         extern void sn_common_hubdev_init(struct hubdev_info *);
92
93         /*
94          * Get SGI Specific HUB chipset information.
95          * Inform Prom that this kernel can support domain bus numbering.
96          */
97         for (i = 0; i < num_cnodes; i++) {
98                 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
99                 nasid = cnodeid_to_nasid(i);
100                 hubdev->max_segment_number = 0xffffffff;
101                 hubdev->max_pcibus_number = 0xff;
102                 status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
103                 if (status)
104                         continue;
105
106                 /* Save the largest Domain and pcibus numbers found. */
107                 if (hubdev->max_segment_number) {
108                         /*
109                          * Dealing with a Prom that supports segments.
110                          */
111                         max_segment_number = hubdev->max_segment_number;
112                         max_pcibus_number = hubdev->max_pcibus_number;
113                 }
114                 sn_common_hubdev_init(hubdev);
115         }
116 }
117
118 /*
119  * sn_pci_legacy_window_fixup - Create PCI controller windows for
120  *                              legacy IO and MEM space. This needs to
121  *                              be done here, as the PROM does not have
122  *                              ACPI support defining the root buses
123  *                              and their resources (_CRS),
124  */
125 static void
126 sn_legacy_pci_window_fixup(struct pci_controller *controller,
127                            u64 legacy_io, u64 legacy_mem)
128 {
129                 controller->window = kcalloc(2, sizeof(struct pci_window),
130                                              GFP_KERNEL);
131                 if (controller->window == NULL)
132                         BUG();
133                 controller->window[0].offset = legacy_io;
134                 controller->window[0].resource.name = "legacy_io";
135                 controller->window[0].resource.flags = IORESOURCE_IO;
136                 controller->window[0].resource.start = legacy_io;
137                 controller->window[0].resource.end =
138                                 controller->window[0].resource.start + 0xffff;
139                 controller->window[0].resource.parent = &ioport_resource;
140                 controller->window[1].offset = legacy_mem;
141                 controller->window[1].resource.name = "legacy_mem";
142                 controller->window[1].resource.flags = IORESOURCE_MEM;
143                 controller->window[1].resource.start = legacy_mem;
144                 controller->window[1].resource.end =
145                        controller->window[1].resource.start + (1024 * 1024) - 1;
146                 controller->window[1].resource.parent = &iomem_resource;
147                 controller->windows = 2;
148 }
149
150 /*
151  * sn_pci_window_fixup() - Create a pci_window for each device resource.
152  *                         It will setup pci_windows for use by
153  *                         pcibios_bus_to_resource(), pcibios_resource_to_bus(),
154  *                         etc.
155  */
156 static void
157 sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
158                     s64 * pci_addrs)
159 {
160         struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
161         unsigned int i;
162         unsigned int idx;
163         unsigned int new_count;
164         struct pci_window *new_window;
165
166         if (count == 0)
167                 return;
168         idx = controller->windows;
169         new_count = controller->windows + count;
170         new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
171         if (new_window == NULL)
172                 BUG();
173         if (controller->window) {
174                 memcpy(new_window, controller->window,
175                        sizeof(struct pci_window) * controller->windows);
176                 kfree(controller->window);
177         }
178
179         /* Setup a pci_window for each device resource. */
180         for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
181                 if (pci_addrs[i] == -1)
182                         continue;
183
184                 new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
185                 new_window[idx].resource = dev->resource[i];
186                 idx++;
187         }
188
189         controller->windows = new_count;
190         controller->window = new_window;
191 }
192
193 /*
194  * sn_io_slot_fixup() -   We are not running with an ACPI capable PROM,
195  *                        and need to convert the pci_dev->resource
196  *                        'start' and 'end' addresses to mapped addresses,
197  *                        and setup the pci_controller->window array entries.
198  */
199 void
200 sn_io_slot_fixup(struct pci_dev *dev)
201 {
202         unsigned int count = 0;
203         int idx;
204         s64 pci_addrs[PCI_ROM_RESOURCE + 1];
205         unsigned long addr, end, size, start;
206         struct pcidev_info *pcidev_info;
207         struct sn_irq_info *sn_irq_info;
208         int status;
209
210         pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
211         if (!pcidev_info)
212                 panic("%s: Unable to alloc memory for pcidev_info", __FUNCTION__);
213
214         sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
215         if (!sn_irq_info)
216                 panic("%s: Unable to alloc memory for sn_irq_info", __FUNCTION__);
217
218         /* Call to retrieve pci device information needed by kernel. */
219         status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
220                 (u64) dev->bus->number,
221                 dev->devfn,
222                 (u64) __pa(pcidev_info),
223                 (u64) __pa(sn_irq_info));
224
225         if (status)
226                 BUG(); /* Cannot get platform pci device information */
227
228
229         /* Copy over PIO Mapped Addresses */
230         for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
231
232                 if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
233                         pci_addrs[idx] = -1;
234                         continue;
235                 }
236
237                 start = dev->resource[idx].start;
238                 end = dev->resource[idx].end;
239                 size = end - start;
240                 if (size == 0) {
241                         pci_addrs[idx] = -1;
242                         continue;
243                 }
244                 pci_addrs[idx] = start;
245                 count++;
246                 addr = pcidev_info->pdi_pio_mapped_addr[idx];
247                 addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
248                 dev->resource[idx].start = addr;
249                 dev->resource[idx].end = addr + size;
250                 if (dev->resource[idx].flags & IORESOURCE_IO)
251                         dev->resource[idx].parent = &ioport_resource;
252                 else
253                         dev->resource[idx].parent = &iomem_resource;
254                 /* If ROM, mark as shadowed in PROM */
255                 if (idx == PCI_ROM_RESOURCE)
256                         dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;
257         }
258         /* Create a pci_window in the pci_controller struct for
259          * each device resource.
260          */
261         if (count > 0)
262                 sn_pci_window_fixup(dev, count, pci_addrs);
263
264         sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
265 }
266
267 EXPORT_SYMBOL(sn_io_slot_fixup);
268
269 /*
270  * sn_pci_controller_fixup() - This routine sets up a bus's resources
271  *                             consistent with the Linux PCI abstraction layer.
272  */
273 static void
274 sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
275 {
276         s64 status = 0;
277         struct pci_controller *controller;
278         struct pcibus_bussoft *prom_bussoft_ptr;
279
280
281         status = sal_get_pcibus_info((u64) segment, (u64) busnum,
282                                      (u64) ia64_tpa(&prom_bussoft_ptr));
283         if (status > 0)
284                 return;         /*bus # does not exist */
285         prom_bussoft_ptr = __va(prom_bussoft_ptr);
286
287         controller = kzalloc(sizeof(*controller), GFP_KERNEL);
288         if (!controller)
289                 BUG();
290         controller->segment = segment;
291
292         /*
293          * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
294          * (platform_data will be overwritten later in sn_common_bus_fixup())
295          */
296         controller->platform_data = prom_bussoft_ptr;
297
298         bus = pci_scan_bus(busnum, &pci_root_ops, controller);
299         if (bus == NULL)
300                 goto error_return; /* error, or bus already scanned */
301
302         bus->sysdata = controller;
303
304         return;
305
306 error_return:
307
308         kfree(controller);
309         return;
310 }
311
312 /*
313  * sn_bus_fixup
314  */
315 void
316 sn_bus_fixup(struct pci_bus *bus)
317 {
318         struct pci_dev *pci_dev = NULL;
319         struct pcibus_bussoft *prom_bussoft_ptr;
320
321         if (!bus->parent) {  /* If root bus */
322                 prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
323                 if (prom_bussoft_ptr == NULL) {
324                         printk(KERN_ERR
325                                "sn_bus_fixup: 0x%04x:0x%02x Unable to "
326                                "obtain prom_bussoft_ptr\n",
327                                pci_domain_nr(bus), bus->number);
328                         return;
329                 }
330                 sn_common_bus_fixup(bus, prom_bussoft_ptr);
331                 sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
332                                            prom_bussoft_ptr->bs_legacy_io,
333                                            prom_bussoft_ptr->bs_legacy_mem);
334         }
335         list_for_each_entry(pci_dev, &bus->devices, bus_list) {
336                 sn_io_slot_fixup(pci_dev);
337         }
338
339 }
340
341 /*
342  * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
343  *              so we need to do things the hard way, including initiating the
344  *              bus scanning ourselves.
345  */
346
347 void __init sn_io_init(void)
348 {
349         int i, j;
350
351         sn_fixup_ionodes();
352
353         /* busses are not known yet ... */
354         for (i = 0; i <= max_segment_number; i++)
355                 for (j = 0; j <= max_pcibus_number; j++)
356                         sn_pci_controller_fixup(i, j, NULL);
357 }