arch/ia64/kernel/setup.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Architecture-specific setup.
   4  *
   5  * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *      Stephane Eranian <eranian@hpl.hp.com>
   8  * Copyright (C) 2000, 2004 Intel Corp
   9  *      Rohit Seth <rohit.seth@intel.com>
  10  *      Suresh Siddha <suresh.b.siddha@intel.com>
  11  *      Gordon Jin <gordon.jin@intel.com>
  12  * Copyright (C) 1999 VA Linux Systems
  13  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
  14  *
  15  * 12/26/04 S.Siddha, G.Jin, R.Seth
  16  *                      Add multi-threading and multi-core detection
  17  * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
  18  * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
  19  * 03/31/00 R.Seth      cpu_initialized and current->processor fixes
  20  * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
  21  * 02/01/00 R.Seth      fixed get_cpuinfo for SMP
  22  * 01/07/99 S.Eranian   added the support for command line argument
  23  * 06/24/99 W.Drummond  added boot_cpu_data.
  24  * 05/28/05 Z. Menyhart Dynamic stride size for "flush_icache_range()"
  25  */
  26 #include <linux/module.h>
  27 #include <linux/init.h>
  28
  29 #include <linux/acpi.h>
  30 #include <linux/console.h>
  31 #include <linux/delay.h>
  32 #include <linux/cpu.h>
  33 #include <linux/kdev_t.h>
  34 #include <linux/kernel.h>
  35 #include <linux/memblock.h>
  36 #include <linux/reboot.h>
  37 #include <linux/sched/mm.h>
  38 #include <linux/sched/clock.h>
  39 #include <linux/sched/task_stack.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/string.h>
  42 #include <linux/threads.h>
  43 #include <linux/screen_info.h>
  44 #include <linux/dmi.h>
  45 #include <linux/root_dev.h>
  46 #include <linux/serial.h>
  47 #include <linux/serial_core.h>
  48 #include <linux/efi.h>
  49 #include <linux/initrd.h>
  50 #include <linux/pm.h>
  51 #include <linux/cpufreq.h>
  52 #include <linux/kexec.h>
  53 #include <linux/crash_dump.h>
  54
  55 #include <asm/mca.h>
  56 #include <asm/meminit.h>
  57 #include <asm/page.h>
  58 #include <asm/patch.h>
  59 #include <asm/pgtable.h>
  60 #include <asm/processor.h>
  61 #include <asm/sal.h>
  62 #include <asm/sections.h>
  63 #include <asm/setup.h>
  64 #include <asm/smp.h>
  65 #include <asm/tlbflush.h>
  66 #include <asm/unistd.h>
  67 #include <asm/uv/uv.h>
  68
  69 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
  70 # error "struct cpuinfo_ia64 too big!"
  71 #endif
  72
  73 char ia64_platform_name[64];
  74
  75 #ifdef CONFIG_SMP
  76 unsigned long __per_cpu_offset[NR_CPUS];
  77 EXPORT_SYMBOL(__per_cpu_offset);
  78 #endif
  79
  80 DEFINE_PER_CPU(struct cpuinfo_ia64, ia64_cpu_info);
  81 EXPORT_SYMBOL(ia64_cpu_info);
  82 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
  83 #ifdef CONFIG_SMP
  84 EXPORT_SYMBOL(local_per_cpu_offset);
  85 #endif
  86 unsigned long ia64_cycles_per_usec;
  87 struct ia64_boot_param *ia64_boot_param;
  88 struct screen_info screen_info;
  89 unsigned long vga_console_iobase;
  90 unsigned long vga_console_membase;
  91
  92 static struct resource data_resource = {
  93         .name   = "Kernel data",
  94         .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
  95 };
  96
  97 static struct resource code_resource = {
  98         .name   = "Kernel code",
  99         .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
 100 };
 101
 102 static struct resource bss_resource = {
 103         .name   = "Kernel bss",
 104         .flags  = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
 105 };
 106
 107 unsigned long ia64_max_cacheline_size;
 108
 109 unsigned long ia64_iobase;      /* virtual address for I/O accesses */
 110 EXPORT_SYMBOL(ia64_iobase);
 111 struct io_space io_space[MAX_IO_SPACES];
 112 EXPORT_SYMBOL(io_space);
 113 unsigned int num_io_spaces;
 114
 115 /*
 116  * "flush_icache_range()" needs to know what processor dependent stride size to use
 117  * when it makes i-cache(s) coherent with d-caches.
 118  */
 119 #define I_CACHE_STRIDE_SHIFT    5       /* Safest way to go: 32 bytes by 32 bytes */
 120 unsigned long ia64_i_cache_stride_shift = ~0;
 121 /*
 122  * "clflush_cache_range()" needs to know what processor dependent stride size to
 123  * use when it flushes cache lines including both d-cache and i-cache.
 124  */
 125 /* Safest way to go: 32 bytes by 32 bytes */
 126 #define CACHE_STRIDE_SHIFT      5
 127 unsigned long ia64_cache_stride_shift = ~0;
 128
 129 /*
 130  * We use a special marker for the end of memory and it uses the extra (+1) slot
 131  */
 132 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1] __initdata;
 133 int num_rsvd_regions __initdata;
 134
 135
 136 /*
 137  * Filter incoming memory segments based on the primitive map created from the boot
 138  * parameters. Segments contained in the map are removed from the memory ranges. A
 139  * caller-specified function is called with the memory ranges that remain after filtering.
 140  * This routine does not assume the incoming segments are sorted.
 141  */
 142 int __init
 143 filter_rsvd_memory (u64 start, u64 end, void *arg)
 144 {
 145         u64 range_start, range_end, prev_start;
 146         void (*func)(unsigned long, unsigned long, int);
 147         int i;
 148
 149 #if IGNORE_PFN0
 150         if (start == PAGE_OFFSET) {
 151                 printk(KERN_WARNING "warning: skipping physical page 0\n");
 152                 start += PAGE_SIZE;
 153                 if (start >= end) return 0;
 154         }
 155 #endif
 156         /*
 157          * lowest possible address(walker uses virtual)
 158          */
 159         prev_start = PAGE_OFFSET;
 160         func = arg;
 161
 162         for (i = 0; i < num_rsvd_regions; ++i) {
 163                 range_start = max(start, prev_start);
 164                 range_end   = min(end, rsvd_region[i].start);
 165
 166                 if (range_start < range_end)
 167                         call_pernode_memory(__pa(range_start), range_end - range_start, func);
 168
 169                 /* nothing more available in this segment */
 170                 if (range_end == end) return 0;
 171
 172                 prev_start = rsvd_region[i].end;
 173         }
 174         /* end of memory marker allows full processing inside loop body */
 175         return 0;
 176 }
 177
 178 /*
 179  * Similar to "filter_rsvd_memory()", but the reserved memory ranges
 180  * are not filtered out.
 181  */
 182 int __init
 183 filter_memory(u64 start, u64 end, void *arg)
 184 {
 185         void (*func)(unsigned long, unsigned long, int);
 186
 187 #if IGNORE_PFN0
 188         if (start == PAGE_OFFSET) {
 189                 printk(KERN_WARNING "warning: skipping physical page 0\n");
 190                 start += PAGE_SIZE;
 191                 if (start >= end)
 192                         return 0;
 193         }
 194 #endif
 195         func = arg;
 196         if (start < end)
 197                 call_pernode_memory(__pa(start), end - start, func);
 198         return 0;
 199 }
 200
 201 static void __init
 202 sort_regions (struct rsvd_region *rsvd_region, int max)
 203 {
 204         int j;
 205
 206         /* simple bubble sorting */
 207         while (max--) {
 208                 for (j = 0; j < max; ++j) {
 209                         if (rsvd_region[j].start > rsvd_region[j+1].start) {
 210                                 struct rsvd_region tmp;
 211                                 tmp = rsvd_region[j];
 212                                 rsvd_region[j] = rsvd_region[j + 1];
 213                                 rsvd_region[j + 1] = tmp;
 214                         }
 215                 }
 216         }
 217 }
 218
 219 /* merge overlaps */
 220 static int __init
 221 merge_regions (struct rsvd_region *rsvd_region, int max)
 222 {
 223         int i;
 224         for (i = 1; i < max; ++i) {
 225                 if (rsvd_region[i].start >= rsvd_region[i-1].end)
 226                         continue;
 227                 if (rsvd_region[i].end > rsvd_region[i-1].end)
 228                         rsvd_region[i-1].end = rsvd_region[i].end;
 229                 --max;
 230                 memmove(&rsvd_region[i], &rsvd_region[i+1],
 231                         (max - i) * sizeof(struct rsvd_region));
 232         }
 233         return max;
 234 }
 235
 236 /*
 237  * Request address space for all standard resources
 238  */
 239 static int __init register_memory(void)
 240 {
 241         code_resource.start = ia64_tpa(_text);
 242         code_resource.end   = ia64_tpa(_etext) - 1;
 243         data_resource.start = ia64_tpa(_etext);
 244         data_resource.end   = ia64_tpa(_edata) - 1;
 245         bss_resource.start  = ia64_tpa(__bss_start);
 246         bss_resource.end    = ia64_tpa(_end) - 1;
 247         efi_initialize_iomem_resources(&code_resource, &data_resource,
 248                         &bss_resource);
 249
 250         return 0;
 251 }
 252
 253 __initcall(register_memory);
 254
 255
 256 #ifdef CONFIG_KEXEC
 257
 258 /*
 259  * This function checks if the reserved crashkernel is allowed on the specific
 260  * IA64 machine flavour. Machines without an IO TLB use swiotlb and require
 261  * some memory below 4 GB (i.e. in 32 bit area), see the implementation of
 262  * lib/swiotlb.c. The hpzx1 architecture has an IO TLB but cannot use that
 263  * in kdump case. See the comment in sba_init() in sba_iommu.c.
 264  *
 265  * So, the only machvec that really supports loading the kdump kernel
 266  * over 4 GB is "uv".
 267  */
 268 static int __init check_crashkernel_memory(unsigned long pbase, size_t size)
 269 {
 270         if (is_uv_system())
 271                 return 1;
 272         else
 273                 return pbase < (1UL << 32);
 274 }
 275
 276 static void __init setup_crashkernel(unsigned long total, int *n)
 277 {
 278         unsigned long long base = 0, size = 0;
 279         int ret;
 280
 281         ret = parse_crashkernel(boot_command_line, total,
 282                         &size, &base);
 283         if (ret == 0 && size > 0) {
 284                 if (!base) {
 285                         sort_regions(rsvd_region, *n);
 286                         *n = merge_regions(rsvd_region, *n);
 287                         base = kdump_find_rsvd_region(size,
 288                                         rsvd_region, *n);
 289                 }
 290
 291                 if (!check_crashkernel_memory(base, size)) {
 292                         pr_warning("crashkernel: There would be kdump memory "
 293                                 "at %ld GB but this is unusable because it "
 294                                 "must\nbe below 4 GB. Change the memory "
 295                                 "configuration of the machine.\n",
 296                                 (unsigned long)(base >> 30));
 297                         return;
 298                 }
 299
 300                 if (base != ~0UL) {
 301                         printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
 302                                         "for crashkernel (System RAM: %ldMB)\n",
 303                                         (unsigned long)(size >> 20),
 304                                         (unsigned long)(base >> 20),
 305                                         (unsigned long)(total >> 20));
 306                         rsvd_region[*n].start =
 307                                 (unsigned long)__va(base);
 308                         rsvd_region[*n].end =
 309                                 (unsigned long)__va(base + size);
 310                         (*n)++;
 311                         crashk_res.start = base;
 312                         crashk_res.end = base + size - 1;
 313                 }
 314         }
 315         efi_memmap_res.start = ia64_boot_param->efi_memmap;
 316         efi_memmap_res.end = efi_memmap_res.start +
 317                 ia64_boot_param->efi_memmap_size;
 318         boot_param_res.start = __pa(ia64_boot_param);
 319         boot_param_res.end = boot_param_res.start +
 320                 sizeof(*ia64_boot_param);
 321 }
 322 #else
 323 static inline void __init setup_crashkernel(unsigned long total, int *n)
 324 {}
 325 #endif
 326
 327 /**
 328  * reserve_memory - setup reserved memory areas
 329  *
 330  * Setup the reserved memory areas set aside for the boot parameters,
 331  * initrd, etc.  There are currently %IA64_MAX_RSVD_REGIONS defined,
 332  * see arch/ia64/include/asm/meminit.h if you need to define more.
 333  */
 334 void __init
 335 reserve_memory (void)
 336 {
 337         int n = 0;
 338         unsigned long total_memory;
 339
 340         /*
 341          * none of the entries in this table overlap
 342          */
 343         rsvd_region[n].start = (unsigned long) ia64_boot_param;
 344         rsvd_region[n].end   = rsvd_region[n].start + sizeof(*ia64_boot_param);
 345         n++;
 346
 347         rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
 348         rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
 349         n++;
 350
 351         rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
 352         rsvd_region[n].end   = (rsvd_region[n].start
 353                                 + strlen(__va(ia64_boot_param->command_line)) + 1);
 354         n++;
 355
 356         rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
 357         rsvd_region[n].end   = (unsigned long) ia64_imva(_end);
 358         n++;
 359
 360 #ifdef CONFIG_BLK_DEV_INITRD
 361         if (ia64_boot_param->initrd_start) {
 362                 rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
 363                 rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->initrd_size;
 364                 n++;
 365         }
 366 #endif
 367
 368 #ifdef CONFIG_CRASH_DUMP
 369         if (reserve_elfcorehdr(&rsvd_region[n].start,
 370                                &rsvd_region[n].end) == 0)
 371                 n++;
 372 #endif
 373
 374         total_memory = efi_memmap_init(&rsvd_region[n].start, &rsvd_region[n].end);
 375         n++;
 376
 377         setup_crashkernel(total_memory, &n);
 378
 379         /* end of memory marker */
 380         rsvd_region[n].start = ~0UL;
 381         rsvd_region[n].end   = ~0UL;
 382         n++;
 383
 384         num_rsvd_regions = n;
 385         BUG_ON(IA64_MAX_RSVD_REGIONS + 1 < n);
 386
 387         sort_regions(rsvd_region, num_rsvd_regions);
 388         num_rsvd_regions = merge_regions(rsvd_region, num_rsvd_regions);
 389
 390         /* reserve all regions except the end of memory marker with memblock */
 391         for (n = 0; n < num_rsvd_regions - 1; n++) {
 392                 struct rsvd_region *region = &rsvd_region[n];
 393                 phys_addr_t addr = __pa(region->start);
 394                 phys_addr_t size = region->end - region->start;
 395
 396                 memblock_reserve(addr, size);
 397         }
 398 }
 399
 400 /**
 401  * find_initrd - get initrd parameters from the boot parameter structure
 402  *
 403  * Grab the initrd start and end from the boot parameter struct given us by
 404  * the boot loader.
 405  */
 406 void __init
 407 find_initrd (void)
 408 {
 409 #ifdef CONFIG_BLK_DEV_INITRD
 410         if (ia64_boot_param->initrd_start) {
 411                 initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
 412                 initrd_end   = initrd_start+ia64_boot_param->initrd_size;
 413
 414                 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%llu bytes)\n",
 415                        initrd_start, ia64_boot_param->initrd_size);
 416         }
 417 #endif
 418 }
 419
 420 static void __init
 421 io_port_init (void)
 422 {
 423         unsigned long phys_iobase;
 424
 425         /*
 426          * Set `iobase' based on the EFI memory map or, failing that, the
 427          * value firmware left in ar.k0.
 428          *
 429          * Note that in ia32 mode, IN/OUT instructions use ar.k0 to compute
 430          * the port's virtual address, so ia32_load_state() loads it with a
 431          * user virtual address.  But in ia64 mode, glibc uses the
 432          * *physical* address in ar.k0 to mmap the appropriate area from
 433          * /dev/mem, and the inX()/outX() interfaces use MMIO.  In both
 434          * cases, user-mode can only use the legacy 0-64K I/O port space.
 435          *
 436          * ar.k0 is not involved in kernel I/O port accesses, which can use
 437          * any of the I/O port spaces and are done via MMIO using the
 438          * virtual mmio_base from the appropriate io_space[].
 439          */
 440         phys_iobase = efi_get_iobase();
 441         if (!phys_iobase) {
 442                 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
 443                 printk(KERN_INFO "No I/O port range found in EFI memory map, "
 444                         "falling back to AR.KR0 (0x%lx)\n", phys_iobase);
 445         }
 446         ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
 447         ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
 448
 449         /* setup legacy IO port space */
 450         io_space[0].mmio_base = ia64_iobase;
 451         io_space[0].sparse = 1;
 452         num_io_spaces = 1;
 453 }
 454
 455 /**
 456  * early_console_setup - setup debugging console
 457  *
 458  * Consoles started here require little enough setup that we can start using
 459  * them very early in the boot process, either right after the machine
 460  * vector initialization, or even before if the drivers can detect their hw.
 461  *
 462  * Returns non-zero if a console couldn't be setup.
 463  */
 464 static inline int __init
 465 early_console_setup (char *cmdline)
 466 {
 467 #ifdef CONFIG_EFI_PCDP
 468         if (!efi_setup_pcdp_console(cmdline))
 469                 return 0;
 470 #endif
 471         return -1;
 472 }
 473
 474 static void __init
 475 screen_info_setup(void)
 476 {
 477         unsigned int orig_x, orig_y, num_cols, num_rows, font_height;
 478
 479         memset(&screen_info, 0, sizeof(screen_info));
 480
 481         if (!ia64_boot_param->console_info.num_rows ||
 482             !ia64_boot_param->console_info.num_cols) {
 483                 printk(KERN_WARNING "invalid screen-info, guessing 80x25\n");
 484                 orig_x = 0;
 485                 orig_y = 0;
 486                 num_cols = 80;
 487                 num_rows = 25;
 488                 font_height = 16;
 489         } else {
 490                 orig_x = ia64_boot_param->console_info.orig_x;
 491                 orig_y = ia64_boot_param->console_info.orig_y;
 492                 num_cols = ia64_boot_param->console_info.num_cols;
 493                 num_rows = ia64_boot_param->console_info.num_rows;
 494                 font_height = 400 / num_rows;
 495         }
 496
 497         screen_info.orig_x = orig_x;
 498         screen_info.orig_y = orig_y;
 499         screen_info.orig_video_cols  = num_cols;
 500         screen_info.orig_video_lines = num_rows;
 501         screen_info.orig_video_points = font_height;
 502         screen_info.orig_video_mode = 3;        /* XXX fake */
 503         screen_info.orig_video_isVGA = 1;       /* XXX fake */
 504         screen_info.orig_video_ega_bx = 3;      /* XXX fake */
 505 }
 506
 507 static inline void
 508 mark_bsp_online (void)
 509 {
 510 #ifdef CONFIG_SMP
 511         /* If we register an early console, allow CPU 0 to printk */
 512         set_cpu_online(smp_processor_id(), true);
 513 #endif
 514 }
 515
 516 static __initdata int nomca;
 517 static __init int setup_nomca(char *s)
 518 {
 519         nomca = 1;
 520         return 0;
 521 }
 522 early_param("nomca", setup_nomca);
 523
 524 #ifdef CONFIG_CRASH_DUMP
 525 int __init reserve_elfcorehdr(u64 *start, u64 *end)
 526 {
 527         u64 length;
 528
 529         /* We get the address using the kernel command line,
 530          * but the size is extracted from the EFI tables.
 531          * Both address and size are required for reservation
 532          * to work properly.
 533          */
 534
 535         if (!is_vmcore_usable())
 536                 return -EINVAL;
 537
 538         if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
 539                 vmcore_unusable();
 540                 return -EINVAL;
 541         }
 542
 543         *start = (unsigned long)__va(elfcorehdr_addr);
 544         *end = *start + length;
 545         return 0;
 546 }
 547
 548 #endif /* CONFIG_PROC_VMCORE */
 549
 550 void __init
 551 setup_arch (char **cmdline_p)
 552 {
 553         unw_init();
 554
 555         ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
 556
 557         *cmdline_p = __va(ia64_boot_param->command_line);
 558         strlcpy(boot_command_line, *cmdline_p, COMMAND_LINE_SIZE);
 559
 560         efi_init();
 561         io_port_init();
 562
 563         uv_probe_system_type();
 564         parse_early_param();
 565
 566         if (early_console_setup(*cmdline_p) == 0)
 567                 mark_bsp_online();
 568
 569         /* Initialize the ACPI boot-time table parser */
 570         acpi_table_init();
 571         early_acpi_boot_init();
 572 #ifdef CONFIG_ACPI_NUMA
 573         acpi_numa_init();
 574         acpi_numa_fixup();
 575 #ifdef CONFIG_ACPI_HOTPLUG_CPU
 576         prefill_possible_map();
 577 #endif
 578         per_cpu_scan_finalize((cpumask_weight(&early_cpu_possible_map) == 0 ?
 579                 32 : cpumask_weight(&early_cpu_possible_map)),
 580                 additional_cpus > 0 ? additional_cpus : 0);
 581 #endif /* CONFIG_ACPI_NUMA */
 582
 583 #ifdef CONFIG_SMP
 584         smp_build_cpu_map();
 585 #endif
 586         find_memory();
 587
 588         /* process SAL system table: */
 589         ia64_sal_init(__va(sal_systab_phys));
 590
 591 #ifdef CONFIG_ITANIUM
 592         ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
 593 #else
 594         {
 595                 unsigned long num_phys_stacked;
 596
 597                 if (ia64_pal_rse_info(&num_phys_stacked, 0) == 0 && num_phys_stacked > 96)
 598                         ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
 599         }
 600 #endif
 601
 602 #ifdef CONFIG_SMP
 603         cpu_physical_id(0) = hard_smp_processor_id();
 604 #endif
 605
 606         cpu_init();     /* initialize the bootstrap CPU */
 607         mmu_context_init();     /* initialize context_id bitmap */
 608
 609 #ifdef CONFIG_VT
 610         if (!conswitchp) {
 611 # if defined(CONFIG_DUMMY_CONSOLE)
 612                 conswitchp = &dummy_con;
 613 # endif
 614 # if defined(CONFIG_VGA_CONSOLE)
 615                 /*
 616                  * Non-legacy systems may route legacy VGA MMIO range to system
 617                  * memory.  vga_con probes the MMIO hole, so memory looks like
 618                  * a VGA device to it.  The EFI memory map can tell us if it's
 619                  * memory so we can avoid this problem.
 620                  */
 621                 if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
 622                         conswitchp = &vga_con;
 623 # endif
 624         }
 625 #endif
 626
 627         /* enable IA-64 Machine Check Abort Handling unless disabled */
 628         if (!nomca)
 629                 ia64_mca_init();
 630
 631         /*
 632          * Default to /dev/sda2.  This assumes that the EFI partition
 633          * is physical disk 1 partition 1 and the Linux root disk is
 634          * physical disk 1 partition 2.
 635          */
 636         ROOT_DEV = Root_SDA2;           /* default to second partition on first drive */
 637
 638         if (is_uv_system())
 639                 uv_setup(cmdline_p);
 640 #ifdef CONFIG_SMP
 641         else
 642                 init_smp_config();
 643 #endif
 644
 645         screen_info_setup();
 646         paging_init();
 647
 648         clear_sched_clock_stable();
 649 }
 650
 651 /*
 652  * Display cpu info for all CPUs.
 653  */
 654 static int
 655 show_cpuinfo (struct seq_file *m, void *v)
 656 {
 657 #ifdef CONFIG_SMP
 658 #       define lpj      c->loops_per_jiffy
 659 #       define cpunum   c->cpu
 660 #else
 661 #       define lpj      loops_per_jiffy
 662 #       define cpunum   0
 663 #endif
 664         static struct {
 665                 unsigned long mask;
 666                 const char *feature_name;
 667         } feature_bits[] = {
 668                 { 1UL << 0, "branchlong" },
 669                 { 1UL << 1, "spontaneous deferral"},
 670                 { 1UL << 2, "16-byte atomic ops" }
 671         };
 672         char features[128], *cp, *sep;
 673         struct cpuinfo_ia64 *c = v;
 674         unsigned long mask;
 675         unsigned long proc_freq;
 676         int i, size;
 677
 678         mask = c->features;
 679
 680         /* build the feature string: */
 681         memcpy(features, "standard", 9);
 682         cp = features;
 683         size = sizeof(features);
 684         sep = "";
 685         for (i = 0; i < ARRAY_SIZE(feature_bits) && size > 1; ++i) {
 686                 if (mask & feature_bits[i].mask) {
 687                         cp += snprintf(cp, size, "%s%s", sep,
 688                                        feature_bits[i].feature_name),
 689                         sep = ", ";
 690                         mask &= ~feature_bits[i].mask;
 691                         size = sizeof(features) - (cp - features);
 692                 }
 693         }
 694         if (mask && size > 1) {
 695                 /* print unknown features as a hex value */
 696                 snprintf(cp, size, "%s0x%lx", sep, mask);
 697         }
 698
 699         proc_freq = cpufreq_quick_get(cpunum);
 700         if (!proc_freq)
 701                 proc_freq = c->proc_freq / 1000;
 702
 703         seq_printf(m,
 704                    "processor  : %d\n"
 705                    "vendor     : %s\n"
 706                    "arch       : IA-64\n"
 707                    "family     : %u\n"
 708                    "model      : %u\n"
 709                    "model name : %s\n"
 710                    "revision   : %u\n"
 711                    "archrev    : %u\n"
 712                    "features   : %s\n"
 713                    "cpu number : %lu\n"
 714                    "cpu regs   : %u\n"
 715                    "cpu MHz    : %lu.%03lu\n"
 716                    "itc MHz    : %lu.%06lu\n"
 717                    "BogoMIPS   : %lu.%02lu\n",
 718                    cpunum, c->vendor, c->family, c->model,
 719                    c->model_name, c->revision, c->archrev,
 720                    features, c->ppn, c->number,
 721                    proc_freq / 1000, proc_freq % 1000,
 722                    c->itc_freq / 1000000, c->itc_freq % 1000000,
 723                    lpj*HZ/500000, (lpj*HZ/5000) % 100);
 724 #ifdef CONFIG_SMP
 725         seq_printf(m, "siblings   : %u\n",
 726                    cpumask_weight(&cpu_core_map[cpunum]));
 727         if (c->socket_id != -1)
 728                 seq_printf(m, "physical id: %u\n", c->socket_id);
 729         if (c->threads_per_core > 1 || c->cores_per_socket > 1)
 730                 seq_printf(m,
 731                            "core id    : %u\n"
 732                            "thread id  : %u\n",
 733                            c->core_id, c->thread_id);
 734 #endif
 735         seq_printf(m,"\n");
 736
 737         return 0;
 738 }
 739
 740 static void *
 741 c_start (struct seq_file *m, loff_t *pos)
 742 {
 743 #ifdef CONFIG_SMP
 744         while (*pos < nr_cpu_ids && !cpu_online(*pos))
 745                 ++*pos;
 746 #endif
 747         return *pos < nr_cpu_ids ? cpu_data(*pos) : NULL;
 748 }
 749
 750 static void *
 751 c_next (struct seq_file *m, void *v, loff_t *pos)
 752 {
 753         ++*pos;
 754         return c_start(m, pos);
 755 }
 756
 757 static void
 758 c_stop (struct seq_file *m, void *v)
 759 {
 760 }
 761
 762 const struct seq_operations cpuinfo_op = {
 763         .start =        c_start,
 764         .next =         c_next,
 765         .stop =         c_stop,
 766         .show =         show_cpuinfo
 767 };
 768
 769 #define MAX_BRANDS      8
 770 static char brandname[MAX_BRANDS][128];
 771
 772 static char *
 773 get_model_name(__u8 family, __u8 model)
 774 {
 775         static int overflow;
 776         char brand[128];
 777         int i;
 778
 779         memcpy(brand, "Unknown", 8);
 780         if (ia64_pal_get_brand_info(brand)) {
 781                 if (family == 0x7)
 782                         memcpy(brand, "Merced", 7);
 783                 else if (family == 0x1f) switch (model) {
 784                         case 0: memcpy(brand, "McKinley", 9); break;
 785                         case 1: memcpy(brand, "Madison", 8); break;
 786                         case 2: memcpy(brand, "Madison up to 9M cache", 23); break;
 787                 }
 788         }
 789         for (i = 0; i < MAX_BRANDS; i++)
 790                 if (strcmp(brandname[i], brand) == 0)
 791                         return brandname[i];
 792         for (i = 0; i < MAX_BRANDS; i++)
 793                 if (brandname[i][0] == '\0')
 794                         return strcpy(brandname[i], brand);
 795         if (overflow++ == 0)
 796                 printk(KERN_ERR
 797                        "%s: Table overflow. Some processor model information will be missing\n",
 798                        __func__);
 799         return "Unknown";
 800 }
 801
 802 static void
 803 identify_cpu (struct cpuinfo_ia64 *c)
 804 {
 805         union {
 806                 unsigned long bits[5];
 807                 struct {
 808                         /* id 0 & 1: */
 809                         char vendor[16];
 810
 811                         /* id 2 */
 812                         u64 ppn;                /* processor serial number */
 813
 814                         /* id 3: */
 815                         unsigned number         :  8;
 816                         unsigned revision       :  8;
 817                         unsigned model          :  8;
 818                         unsigned family         :  8;
 819                         unsigned archrev        :  8;
 820                         unsigned reserved       : 24;
 821
 822                         /* id 4: */
 823                         u64 features;
 824                 } field;
 825         } cpuid;
 826         pal_vm_info_1_u_t vm1;
 827         pal_vm_info_2_u_t vm2;
 828         pal_status_t status;
 829         unsigned long impl_va_msb = 50, phys_addr_size = 44;    /* Itanium defaults */
 830         int i;
 831         for (i = 0; i < 5; ++i)
 832                 cpuid.bits[i] = ia64_get_cpuid(i);
 833
 834         memcpy(c->vendor, cpuid.field.vendor, 16);
 835 #ifdef CONFIG_SMP
 836         c->cpu = smp_processor_id();
 837
 838         /* below default values will be overwritten  by identify_siblings()
 839          * for Multi-Threading/Multi-Core capable CPUs
 840          */
 841         c->threads_per_core = c->cores_per_socket = c->num_log = 1;
 842         c->socket_id = -1;
 843
 844         identify_siblings(c);
 845
 846         if (c->threads_per_core > smp_num_siblings)
 847                 smp_num_siblings = c->threads_per_core;
 848 #endif
 849         c->ppn = cpuid.field.ppn;
 850         c->number = cpuid.field.number;
 851         c->revision = cpuid.field.revision;
 852         c->model = cpuid.field.model;
 853         c->family = cpuid.field.family;
 854         c->archrev = cpuid.field.archrev;
 855         c->features = cpuid.field.features;
 856         c->model_name = get_model_name(c->family, c->model);
 857
 858         status = ia64_pal_vm_summary(&vm1, &vm2);
 859         if (status == PAL_STATUS_SUCCESS) {
 860                 impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
 861                 phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
 862         }
 863         c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
 864         c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
 865 }
 866
 867 /*
 868  * Do the following calculations:
 869  *
 870  * 1. the max. cache line size.
 871  * 2. the minimum of the i-cache stride sizes for "flush_icache_range()".
 872  * 3. the minimum of the cache stride sizes for "clflush_cache_range()".
 873  */
 874 static void
 875 get_cache_info(void)
 876 {
 877         unsigned long line_size, max = 1;
 878         unsigned long l, levels, unique_caches;
 879         pal_cache_config_info_t cci;
 880         long status;
 881
 882         status = ia64_pal_cache_summary(&levels, &unique_caches);
 883         if (status != 0) {
 884                 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
 885                        __func__, status);
 886                 max = SMP_CACHE_BYTES;
 887                 /* Safest setup for "flush_icache_range()" */
 888                 ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
 889                 /* Safest setup for "clflush_cache_range()" */
 890                 ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
 891                 goto out;
 892         }
 893
 894         for (l = 0; l < levels; ++l) {
 895                 /* cache_type (data_or_unified)=2 */
 896                 status = ia64_pal_cache_config_info(l, 2, &cci);
 897                 if (status != 0) {
 898                         printk(KERN_ERR "%s: ia64_pal_cache_config_info"
 899                                 "(l=%lu, 2) failed (status=%ld)\n",
 900                                 __func__, l, status);
 901                         max = SMP_CACHE_BYTES;
 902                         /* The safest setup for "flush_icache_range()" */
 903                         cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 904                         /* The safest setup for "clflush_cache_range()" */
 905                         ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
 906                         cci.pcci_unified = 1;
 907                 } else {
 908                         if (cci.pcci_stride < ia64_cache_stride_shift)
 909                                 ia64_cache_stride_shift = cci.pcci_stride;
 910
 911                         line_size = 1 << cci.pcci_line_size;
 912                         if (line_size > max)
 913                                 max = line_size;
 914                 }
 915
 916                 if (!cci.pcci_unified) {
 917                         /* cache_type (instruction)=1*/
 918                         status = ia64_pal_cache_config_info(l, 1, &cci);
 919                         if (status != 0) {
 920                                 printk(KERN_ERR "%s: ia64_pal_cache_config_info"
 921                                         "(l=%lu, 1) failed (status=%ld)\n",
 922                                         __func__, l, status);
 923                                 /* The safest setup for flush_icache_range() */
 924                                 cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 925                         }
 926                 }
 927                 if (cci.pcci_stride < ia64_i_cache_stride_shift)
 928                         ia64_i_cache_stride_shift = cci.pcci_stride;
 929         }
 930   out:
 931         if (max > ia64_max_cacheline_size)
 932                 ia64_max_cacheline_size = max;
 933 }
 934
 935 /*
 936  * cpu_init() initializes state that is per-CPU.  This function acts
 937  * as a 'CPU state barrier', nothing should get across.
 938  */
 939 void
 940 cpu_init (void)
 941 {
 942         extern void ia64_mmu_init(void *);
 943         static unsigned long max_num_phys_stacked = IA64_NUM_PHYS_STACK_REG;
 944         unsigned long num_phys_stacked;
 945         pal_vm_info_2_u_t vmi;
 946         unsigned int max_ctx;
 947         struct cpuinfo_ia64 *cpu_info;
 948         void *cpu_data;
 949
 950         cpu_data = per_cpu_init();
 951 #ifdef CONFIG_SMP
 952         /*
 953          * insert boot cpu into sibling and core mapes
 954          * (must be done after per_cpu area is setup)
 955          */
 956         if (smp_processor_id() == 0) {
 957                 cpumask_set_cpu(0, &per_cpu(cpu_sibling_map, 0));
 958                 cpumask_set_cpu(0, &cpu_core_map[0]);
 959         } else {
 960                 /*
 961                  * Set ar.k3 so that assembly code in MCA handler can compute
 962                  * physical addresses of per cpu variables with a simple:
 963                  *   phys = ar.k3 + &per_cpu_var
 964                  * and the alt-dtlb-miss handler can set per-cpu mapping into
 965                  * the TLB when needed. head.S already did this for cpu0.
 966                  */
 967                 ia64_set_kr(IA64_KR_PER_CPU_DATA,
 968                             ia64_tpa(cpu_data) - (long) __per_cpu_start);
 969         }
 970 #endif
 971
 972         get_cache_info();
 973
 974         /*
 975          * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
 976          * ia64_mmu_init() yet.  And we can't call ia64_mmu_init() first because it
 977          * depends on the data returned by identify_cpu().  We break the dependency by
 978          * accessing cpu_data() through the canonical per-CPU address.
 979          */
 980         cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(ia64_cpu_info) - __per_cpu_start);
 981         identify_cpu(cpu_info);
 982
 983 #ifdef CONFIG_MCKINLEY
 984         {
 985 #               define FEATURE_SET 16
 986                 struct ia64_pal_retval iprv;
 987
 988                 if (cpu_info->family == 0x1f) {
 989                         PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
 990                         if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
 991                                 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
 992                                               (iprv.v1 | 0x80), FEATURE_SET, 0);
 993                 }
 994         }
 995 #endif
 996
 997         /* Clear the stack memory reserved for pt_regs: */
 998         memset(task_pt_regs(current), 0, sizeof(struct pt_regs));
 999
1000         ia64_set_kr(IA64_KR_FPU_OWNER, 0);
1001
1002         /*
1003          * Initialize the page-table base register to a global
1004          * directory with all zeroes.  This ensure that we can handle
1005          * TLB-misses to user address-space even before we created the
1006          * first user address-space.  This may happen, e.g., due to
1007          * aggressive use of lfetch.fault.
1008          */
1009         ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
1010
1011         /*
1012          * Initialize default control register to defer speculative faults except
1013          * for those arising from TLB misses, which are not deferred.  The
1014          * kernel MUST NOT depend on a particular setting of these bits (in other words,
1015          * the kernel must have recovery code for all speculative accesses).  Turn on
1016          * dcr.lc as per recommendation by the architecture team.  Most IA-32 apps
1017          * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
1018          * be fine).
1019          */
1020         ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
1021                                         | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
1022         mmgrab(&init_mm);
1023         current->active_mm = &init_mm;
1024         BUG_ON(current->mm);
1025
1026         ia64_mmu_init(ia64_imva(cpu_data));
1027         ia64_mca_cpu_init(ia64_imva(cpu_data));
1028
1029         /* Clear ITC to eliminate sched_clock() overflows in human time.  */
1030         ia64_set_itc(0);
1031
1032         /* disable all local interrupt sources: */
1033         ia64_set_itv(1 << 16);
1034         ia64_set_lrr0(1 << 16);
1035         ia64_set_lrr1(1 << 16);
1036         ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
1037         ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
1038
1039         /* clear TPR & XTP to enable all interrupt classes: */
1040         ia64_setreg(_IA64_REG_CR_TPR, 0);
1041
1042         /* Clear any pending interrupts left by SAL/EFI */
1043         while (ia64_get_ivr() != IA64_SPURIOUS_INT_VECTOR)
1044                 ia64_eoi();
1045
1046 #ifdef CONFIG_SMP
1047         normal_xtp();
1048 #endif
1049
1050         /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
1051         if (ia64_pal_vm_summary(NULL, &vmi) == 0) {
1052                 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
1053                 setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
1054         } else {
1055                 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
1056                 max_ctx = (1U << 15) - 1;       /* use architected minimum */
1057         }
1058         while (max_ctx < ia64_ctx.max_ctx) {
1059                 unsigned int old = ia64_ctx.max_ctx;
1060                 if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
1061                         break;
1062         }
1063
1064         if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
1065                 printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
1066                        "stacked regs\n");
1067                 num_phys_stacked = 96;
1068         }
1069         /* size of physical stacked register partition plus 8 bytes: */
1070         if (num_phys_stacked > max_num_phys_stacked) {
1071                 ia64_patch_phys_stack_reg(num_phys_stacked*8 + 8);
1072                 max_num_phys_stacked = num_phys_stacked;
1073         }
1074 }
1075
1076 void __init
1077 check_bugs (void)
1078 {
1079         ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
1080                                (unsigned long) __end___mckinley_e9_bundles);
1081 }
1082
1083 static int __init run_dmi_scan(void)
1084 {
1085         dmi_setup();
1086         return 0;
1087 }
1088 core_initcall(run_dmi_scan);