arch/ia64/kernel/mca.c

   1 /*
   2  * File:        mca.c
   3  * Purpose:     Generic MCA handling layer
   4  *
   5  * Updated for latest kernel
   6  * Copyright (C) 2003 Hewlett-Packard Co
   7  *      David Mosberger-Tang <davidm@hpl.hp.com>
   8  *
   9  * Copyright (C) 2002 Dell Inc.
  10  * Copyright (C) Matt Domsch (Matt_Domsch@dell.com)
  11  *
  12  * Copyright (C) 2002 Intel
  13  * Copyright (C) Jenna Hall (jenna.s.hall@intel.com)
  14  *
  15  * Copyright (C) 2001 Intel
  16  * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com)
  17  *
  18  * Copyright (C) 2000 Intel
  19  * Copyright (C) Chuck Fleckenstein (cfleck@co.intel.com)
  20  *
  21  * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
  22  * Copyright (C) Vijay Chander(vijay@engr.sgi.com)
  23  *
  24  * 03/04/15 D. Mosberger Added INIT backtrace support.
  25  * 02/03/25 M. Domsch   GUID cleanups
  26  *
  27  * 02/01/04 J. Hall     Aligned MCA stack to 16 bytes, added platform vs. CPU
  28  *                      error flag, set SAL default return values, changed
  29  *                      error record structure to linked list, added init call
  30  *                      to sal_get_state_info_size().
  31  *
  32  * 01/01/03 F. Lewis    Added setup of CMCI and CPEI IRQs, logging of corrected
  33  *                      platform errors, completed code for logging of
  34  *                      corrected & uncorrected machine check errors, and
  35  *                      updated for conformance with Nov. 2000 revision of the
  36  *                      SAL 3.0 spec.
  37  * 00/03/29 C. Fleckenstein  Fixed PAL/SAL update issues, began MCA bug fixes, logging issues,
  38  *                           added min save state dump, added INIT handler.
  39  *
  40  * 2003-12-08 Keith Owens <kaos@sgi.com>
  41  *            smp_call_function() must not be called from interrupt context (can
  42  *            deadlock on tasklist_lock).  Use keventd to call smp_call_function().
  43  *
  44  * 2004-02-01 Keith Owens <kaos@sgi.com>
  45  *            Avoid deadlock when using printk() for MCA and INIT records.
  46  *            Delete all record printing code, moved to salinfo_decode in user space.
  47  *            Mark variables and functions static where possible.
  48  *            Delete dead variables and functions.
  49  *            Reorder to remove the need for forward declarations and to consolidate
  50  *            related code.
  51  *
  52  * 2005-08-12 Keith Owens <kaos@sgi.com>
  53  *            Convert MCA/INIT handlers to use per event stacks and SAL/OS state.
  54  *
  55  * 2005-10-07 Keith Owens <kaos@sgi.com>
  56  *            Add notify_die() hooks.
  57  *
  58  * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
  59  *            Add printing support for MCA/INIT.
  60  */
  61 #include <linux/types.h>
  62 #include <linux/init.h>
  63 #include <linux/sched.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/irq.h>
  66 #include <linux/smp_lock.h>
  67 #include <linux/bootmem.h>
  68 #include <linux/acpi.h>
  69 #include <linux/timer.h>
  70 #include <linux/module.h>
  71 #include <linux/kernel.h>
  72 #include <linux/smp.h>
  73 #include <linux/workqueue.h>
  74 #include <linux/cpumask.h>
  75
  76 #include <asm/delay.h>
  77 #include <asm/kdebug.h>
  78 #include <asm/machvec.h>
  79 #include <asm/meminit.h>
  80 #include <asm/page.h>
  81 #include <asm/ptrace.h>
  82 #include <asm/system.h>
  83 #include <asm/sal.h>
  84 #include <asm/mca.h>
  85
  86 #include <asm/irq.h>
  87 #include <asm/hw_irq.h>
  88
  89 #include "mca_drv.h"
  90 #include "entry.h"
  91
  92 #if defined(IA64_MCA_DEBUG_INFO)
  93 # define IA64_MCA_DEBUG(fmt...) printk(fmt)
  94 #else
  95 # define IA64_MCA_DEBUG(fmt...)
  96 #endif
  97
  98 /* Used by mca_asm.S */
  99 u32                             ia64_mca_serialize;
 100 DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
 101 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
 102 DEFINE_PER_CPU(u64, ia64_mca_pal_pte);      /* PTE to map PAL code */
 103 DEFINE_PER_CPU(u64, ia64_mca_pal_base);    /* vaddr PAL code granule */
 104
 105 unsigned long __per_cpu_mca[NR_CPUS];
 106
 107 /* In mca_asm.S */
 108 extern void                     ia64_os_init_dispatch_monarch (void);
 109 extern void                     ia64_os_init_dispatch_slave (void);
 110
 111 static int monarch_cpu = -1;
 112
 113 static ia64_mc_info_t           ia64_mc_info;
 114
 115 #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
 116 #define MIN_CPE_POLL_INTERVAL (2*60*HZ)  /* 2 minutes */
 117 #define CMC_POLL_INTERVAL     (1*60*HZ)  /* 1 minute */
 118 #define CPE_HISTORY_LENGTH    5
 119 #define CMC_HISTORY_LENGTH    5
 120
 121 static struct timer_list cpe_poll_timer;
 122 static struct timer_list cmc_poll_timer;
 123 /*
 124  * This variable tells whether we are currently in polling mode.
 125  * Start with this in the wrong state so we won't play w/ timers
 126  * before the system is ready.
 127  */
 128 static int cmc_polling_enabled = 1;
 129
 130 /*
 131  * Clearing this variable prevents CPE polling from getting activated
 132  * in mca_late_init.  Use it if your system doesn't provide a CPEI,
 133  * but encounters problems retrieving CPE logs.  This should only be
 134  * necessary for debugging.
 135  */
 136 static int cpe_poll_enabled = 1;
 137
 138 extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
 139
 140 static int mca_init __initdata;
 141
 142 /*
 143  * limited & delayed printing support for MCA/INIT handler
 144  */
 145
 146 #define mprintk(fmt...) ia64_mca_printk(fmt)
 147
 148 #define MLOGBUF_SIZE (512+256*NR_CPUS)
 149 #define MLOGBUF_MSGMAX 256
 150 static char mlogbuf[MLOGBUF_SIZE];
 151 static DEFINE_SPINLOCK(mlogbuf_wlock);  /* mca context only */
 152 static DEFINE_SPINLOCK(mlogbuf_rlock);  /* normal context only */
 153 static unsigned long mlogbuf_start;
 154 static unsigned long mlogbuf_end;
 155 static unsigned int mlogbuf_finished = 0;
 156 static unsigned long mlogbuf_timestamp = 0;
 157
 158 static int loglevel_save = -1;
 159 #define BREAK_LOGLEVEL(__console_loglevel)              \
 160         oops_in_progress = 1;                           \
 161         if (loglevel_save < 0)                          \
 162                 loglevel_save = __console_loglevel;     \
 163         __console_loglevel = 15;
 164
 165 #define RESTORE_LOGLEVEL(__console_loglevel)            \
 166         if (loglevel_save >= 0) {                       \
 167                 __console_loglevel = loglevel_save;     \
 168                 loglevel_save = -1;                     \
 169         }                                               \
 170         mlogbuf_finished = 0;                           \
 171         oops_in_progress = 0;
 172
 173 /*
 174  * Push messages into buffer, print them later if not urgent.
 175  */
 176 void ia64_mca_printk(const char *fmt, ...)
 177 {
 178         va_list args;
 179         int printed_len;
 180         char temp_buf[MLOGBUF_MSGMAX];
 181         char *p;
 182
 183         va_start(args, fmt);
 184         printed_len = vscnprintf(temp_buf, sizeof(temp_buf), fmt, args);
 185         va_end(args);
 186
 187         /* Copy the output into mlogbuf */
 188         if (oops_in_progress) {
 189                 /* mlogbuf was abandoned, use printk directly instead. */
 190                 printk(temp_buf);
 191         } else {
 192                 spin_lock(&mlogbuf_wlock);
 193                 for (p = temp_buf; *p; p++) {
 194                         unsigned long next = (mlogbuf_end + 1) % MLOGBUF_SIZE;
 195                         if (next != mlogbuf_start) {
 196                                 mlogbuf[mlogbuf_end] = *p;
 197                                 mlogbuf_end = next;
 198                         } else {
 199                                 /* buffer full */
 200                                 break;
 201                         }
 202                 }
 203                 mlogbuf[mlogbuf_end] = '\0';
 204                 spin_unlock(&mlogbuf_wlock);
 205         }
 206 }
 207 EXPORT_SYMBOL(ia64_mca_printk);
 208
 209 /*
 210  * Print buffered messages.
 211  *  NOTE: call this after returning normal context. (ex. from salinfod)
 212  */
 213 void ia64_mlogbuf_dump(void)
 214 {
 215         char temp_buf[MLOGBUF_MSGMAX];
 216         char *p;
 217         unsigned long index;
 218         unsigned long flags;
 219         unsigned int printed_len;
 220
 221         /* Get output from mlogbuf */
 222         while (mlogbuf_start != mlogbuf_end) {
 223                 temp_buf[0] = '\0';
 224                 p = temp_buf;
 225                 printed_len = 0;
 226
 227                 spin_lock_irqsave(&mlogbuf_rlock, flags);
 228
 229                 index = mlogbuf_start;
 230                 while (index != mlogbuf_end) {
 231                         *p = mlogbuf[index];
 232                         index = (index + 1) % MLOGBUF_SIZE;
 233                         if (!*p)
 234                                 break;
 235                         p++;
 236                         if (++printed_len >= MLOGBUF_MSGMAX - 1)
 237                                 break;
 238                 }
 239                 *p = '\0';
 240                 if (temp_buf[0])
 241                         printk(temp_buf);
 242                 mlogbuf_start = index;
 243
 244                 mlogbuf_timestamp = 0;
 245                 spin_unlock_irqrestore(&mlogbuf_rlock, flags);
 246         }
 247 }
 248 EXPORT_SYMBOL(ia64_mlogbuf_dump);
 249
 250 /*
 251  * Call this if system is going to down or if immediate flushing messages to
 252  * console is required. (ex. recovery was failed, crash dump is going to be
 253  * invoked, long-wait rendezvous etc.)
 254  *  NOTE: this should be called from monarch.
 255  */
 256 static void ia64_mlogbuf_finish(int wait)
 257 {
 258         BREAK_LOGLEVEL(console_loglevel);
 259
 260         spin_lock_init(&mlogbuf_rlock);
 261         ia64_mlogbuf_dump();
 262         printk(KERN_EMERG "mlogbuf_finish: printing switched to urgent mode, "
 263                 "MCA/INIT might be dodgy or fail.\n");
 264
 265         if (!wait)
 266                 return;
 267
 268         /* wait for console */
 269         printk("Delaying for 5 seconds...\n");
 270         udelay(5*1000000);
 271
 272         mlogbuf_finished = 1;
 273 }
 274 EXPORT_SYMBOL(ia64_mlogbuf_finish);
 275
 276 /*
 277  * Print buffered messages from INIT context.
 278  */
 279 static void ia64_mlogbuf_dump_from_init(void)
 280 {
 281         if (mlogbuf_finished)
 282                 return;
 283
 284         if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
 285                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
 286                         " and the system seems to be messed up.\n");
 287                 ia64_mlogbuf_finish(0);
 288                 return;
 289         }
 290
 291         if (!spin_trylock(&mlogbuf_rlock)) {
 292                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT. "
 293                         "Generated messages other than stack dump will be "
 294                         "buffered to mlogbuf and will be printed later.\n");
 295                 printk(KERN_ERR "INIT: If messages would not printed after "
 296                         "this INIT, wait 30sec and assert INIT again.\n");
 297                 if (!mlogbuf_timestamp)
 298                         mlogbuf_timestamp = jiffies;
 299                 return;
 300         }
 301         spin_unlock(&mlogbuf_rlock);
 302         ia64_mlogbuf_dump();
 303 }
 304
 305 static void inline
 306 ia64_mca_spin(const char *func)
 307 {
 308         if (monarch_cpu == smp_processor_id())
 309                 ia64_mlogbuf_finish(0);
 310         mprintk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
 311         while (1)
 312                 cpu_relax();
 313 }
 314 /*
 315  * IA64_MCA log support
 316  */
 317 #define IA64_MAX_LOGS           2       /* Double-buffering for nested MCAs */
 318 #define IA64_MAX_LOG_TYPES      4   /* MCA, INIT, CMC, CPE */
 319
 320 typedef struct ia64_state_log_s
 321 {
 322         spinlock_t      isl_lock;
 323         int             isl_index;
 324         unsigned long   isl_count;
 325         ia64_err_rec_t  *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
 326 } ia64_state_log_t;
 327
 328 static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
 329
 330 #define IA64_LOG_ALLOCATE(it, size) \
 331         {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
 332                 (ia64_err_rec_t *)alloc_bootmem(size); \
 333         ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
 334                 (ia64_err_rec_t *)alloc_bootmem(size);}
 335 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
 336 #define IA64_LOG_LOCK(it)      spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
 337 #define IA64_LOG_UNLOCK(it)    spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
 338 #define IA64_LOG_NEXT_INDEX(it)    ia64_state_log[it].isl_index
 339 #define IA64_LOG_CURR_INDEX(it)    1 - ia64_state_log[it].isl_index
 340 #define IA64_LOG_INDEX_INC(it) \
 341     {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
 342     ia64_state_log[it].isl_count++;}
 343 #define IA64_LOG_INDEX_DEC(it) \
 344     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
 345 #define IA64_LOG_NEXT_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
 346 #define IA64_LOG_CURR_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
 347 #define IA64_LOG_COUNT(it)         ia64_state_log[it].isl_count
 348
 349 /*
 350  * ia64_log_init
 351  *      Reset the OS ia64 log buffer
 352  * Inputs   :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 353  * Outputs      :       None
 354  */
 355 static void __init
 356 ia64_log_init(int sal_info_type)
 357 {
 358         u64     max_size = 0;
 359
 360         IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
 361         IA64_LOG_LOCK_INIT(sal_info_type);
 362
 363         // SAL will tell us the maximum size of any error record of this type
 364         max_size = ia64_sal_get_state_info_size(sal_info_type);
 365         if (!max_size)
 366                 /* alloc_bootmem() doesn't like zero-sized allocations! */
 367                 return;
 368
 369         // set up OS data structures to hold error info
 370         IA64_LOG_ALLOCATE(sal_info_type, max_size);
 371         memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
 372         memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
 373 }
 374
 375 /*
 376  * ia64_log_get
 377  *
 378  *      Get the current MCA log from SAL and copy it into the OS log buffer.
 379  *
 380  *  Inputs  :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 381  *              irq_safe    whether you can use printk at this point
 382  *  Outputs :   size        (total record length)
 383  *              *buffer     (ptr to error record)
 384  *
 385  */
 386 static u64
 387 ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
 388 {
 389         sal_log_record_header_t     *log_buffer;
 390         u64                         total_len = 0;
 391         unsigned long               s;
 392
 393         IA64_LOG_LOCK(sal_info_type);
 394
 395         /* Get the process state information */
 396         log_buffer = IA64_LOG_NEXT_BUFFER(sal_info_type);
 397
 398         total_len = ia64_sal_get_state_info(sal_info_type, (u64 *)log_buffer);
 399
 400         if (total_len) {
 401                 IA64_LOG_INDEX_INC(sal_info_type);
 402                 IA64_LOG_UNLOCK(sal_info_type);
 403                 if (irq_safe) {
 404                         IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
 405                                        "Record length = %ld\n", __FUNCTION__, sal_info_type, total_len);
 406                 }
 407                 *buffer = (u8 *) log_buffer;
 408                 return total_len;
 409         } else {
 410                 IA64_LOG_UNLOCK(sal_info_type);
 411                 return 0;
 412         }
 413 }
 414
 415 /*
 416  *  ia64_mca_log_sal_error_record
 417  *
 418  *  This function retrieves a specified error record type from SAL
 419  *  and wakes up any processes waiting for error records.
 420  *
 421  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE)
 422  *              FIXME: remove MCA and irq_safe.
 423  */
 424 static void
 425 ia64_mca_log_sal_error_record(int sal_info_type)
 426 {
 427         u8 *buffer;
 428         sal_log_record_header_t *rh;
 429         u64 size;
 430         int irq_safe = sal_info_type != SAL_INFO_TYPE_MCA;
 431 #ifdef IA64_MCA_DEBUG_INFO
 432         static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };
 433 #endif
 434
 435         size = ia64_log_get(sal_info_type, &buffer, irq_safe);
 436         if (!size)
 437                 return;
 438
 439         salinfo_log_wakeup(sal_info_type, buffer, size, irq_safe);
 440
 441         if (irq_safe)
 442                 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
 443                         smp_processor_id(),
 444                         sal_info_type < ARRAY_SIZE(rec_name) ? rec_name[sal_info_type] : "UNKNOWN");
 445
 446         /* Clear logs from corrected errors in case there's no user-level logger */
 447         rh = (sal_log_record_header_t *)buffer;
 448         if (rh->severity == sal_log_severity_corrected)
 449                 ia64_sal_clear_state_info(sal_info_type);
 450 }
 451
 452 /*
 453  * search_mca_table
 454  *  See if the MCA surfaced in an instruction range
 455  *  that has been tagged as recoverable.
 456  *
 457  *  Inputs
 458  *      first   First address range to check
 459  *      last    Last address range to check
 460  *      ip      Instruction pointer, address we are looking for
 461  *
 462  * Return value:
 463  *      1 on Success (in the table)/ 0 on Failure (not in the  table)
 464  */
 465 int
 466 search_mca_table (const struct mca_table_entry *first,
 467                 const struct mca_table_entry *last,
 468                 unsigned long ip)
 469 {
 470         const struct mca_table_entry *curr;
 471         u64 curr_start, curr_end;
 472
 473         curr = first;
 474         while (curr <= last) {
 475                 curr_start = (u64) &curr->start_addr + curr->start_addr;
 476                 curr_end = (u64) &curr->end_addr + curr->end_addr;
 477
 478                 if ((ip >= curr_start) && (ip <= curr_end)) {
 479                         return 1;
 480                 }
 481                 curr++;
 482         }
 483         return 0;
 484 }
 485
 486 /* Given an address, look for it in the mca tables. */
 487 int mca_recover_range(unsigned long addr)
 488 {
 489         extern struct mca_table_entry __start___mca_table[];
 490         extern struct mca_table_entry __stop___mca_table[];
 491
 492         return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);
 493 }
 494 EXPORT_SYMBOL_GPL(mca_recover_range);
 495
 496 #ifdef CONFIG_ACPI
 497
 498 int cpe_vector = -1;
 499 int ia64_cpe_irq = -1;
 500
 501 static irqreturn_t
 502 ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
 503 {
 504         static unsigned long    cpe_history[CPE_HISTORY_LENGTH];
 505         static int              index;
 506         static DEFINE_SPINLOCK(cpe_history_lock);
 507
 508         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
 509                        __FUNCTION__, cpe_irq, smp_processor_id());
 510
 511         /* SAL spec states this should run w/ interrupts enabled */
 512         local_irq_enable();
 513
 514         spin_lock(&cpe_history_lock);
 515         if (!cpe_poll_enabled && cpe_vector >= 0) {
 516
 517                 int i, count = 1; /* we know 1 happened now */
 518                 unsigned long now = jiffies;
 519
 520                 for (i = 0; i < CPE_HISTORY_LENGTH; i++) {
 521                         if (now - cpe_history[i] <= HZ)
 522                                 count++;
 523                 }
 524
 525                 IA64_MCA_DEBUG(KERN_INFO "CPE threshold %d/%d\n", count, CPE_HISTORY_LENGTH);
 526                 if (count >= CPE_HISTORY_LENGTH) {
 527
 528                         cpe_poll_enabled = 1;
 529                         spin_unlock(&cpe_history_lock);
 530                         disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR));
 531
 532                         /*
 533                          * Corrected errors will still be corrected, but
 534                          * make sure there's a log somewhere that indicates
 535                          * something is generating more than we can handle.
 536                          */
 537                         printk(KERN_WARNING "WARNING: Switching to polling CPE handler; error records may be lost\n");
 538
 539                         mod_timer(&cpe_poll_timer, jiffies + MIN_CPE_POLL_INTERVAL);
 540
 541                         /* lock already released, get out now */
 542                         goto out;
 543                 } else {
 544                         cpe_history[index++] = now;
 545                         if (index == CPE_HISTORY_LENGTH)
 546                                 index = 0;
 547                 }
 548         }
 549         spin_unlock(&cpe_history_lock);
 550 out:
 551         /* Get the CPE error record and log it */
 552         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
 553
 554         return IRQ_HANDLED;
 555 }
 556
 557 #endif /* CONFIG_ACPI */
 558
 559 #ifdef CONFIG_ACPI
 560 /*
 561  * ia64_mca_register_cpev
 562  *
 563  *  Register the corrected platform error vector with SAL.
 564  *
 565  *  Inputs
 566  *      cpev        Corrected Platform Error Vector number
 567  *
 568  *  Outputs
 569  *      None
 570  */
 571 static void __init
 572 ia64_mca_register_cpev (int cpev)
 573 {
 574         /* Register the CPE interrupt vector with SAL */
 575         struct ia64_sal_retval isrv;
 576
 577         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
 578         if (isrv.status) {
 579                 printk(KERN_ERR "Failed to register Corrected Platform "
 580                        "Error interrupt vector with SAL (status %ld)\n", isrv.status);
 581                 return;
 582         }
 583
 584         IA64_MCA_DEBUG("%s: corrected platform error "
 585                        "vector %#x registered\n", __FUNCTION__, cpev);
 586 }
 587 #endif /* CONFIG_ACPI */
 588
 589 /*
 590  * ia64_mca_cmc_vector_setup
 591  *
 592  *  Setup the corrected machine check vector register in the processor.
 593  *  (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
 594  *  This function is invoked on a per-processor basis.
 595  *
 596  * Inputs
 597  *      None
 598  *
 599  * Outputs
 600  *      None
 601  */
 602 void __cpuinit
 603 ia64_mca_cmc_vector_setup (void)
 604 {
 605         cmcv_reg_t      cmcv;
 606
 607         cmcv.cmcv_regval        = 0;
 608         cmcv.cmcv_mask          = 1;        /* Mask/disable interrupt at first */
 609         cmcv.cmcv_vector        = IA64_CMC_VECTOR;
 610         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 611
 612         IA64_MCA_DEBUG("%s: CPU %d corrected "
 613                        "machine check vector %#x registered.\n",
 614                        __FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
 615
 616         IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
 617                        __FUNCTION__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
 618 }
 619
 620 /*
 621  * ia64_mca_cmc_vector_disable
 622  *
 623  *  Mask the corrected machine check vector register in the processor.
 624  *  This function is invoked on a per-processor basis.
 625  *
 626  * Inputs
 627  *      dummy(unused)
 628  *
 629  * Outputs
 630  *      None
 631  */
 632 static void
 633 ia64_mca_cmc_vector_disable (void *dummy)
 634 {
 635         cmcv_reg_t      cmcv;
 636
 637         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 638
 639         cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
 640         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 641
 642         IA64_MCA_DEBUG("%s: CPU %d corrected "
 643                        "machine check vector %#x disabled.\n",
 644                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 645 }
 646
 647 /*
 648  * ia64_mca_cmc_vector_enable
 649  *
 650  *  Unmask the corrected machine check vector register in the processor.
 651  *  This function is invoked on a per-processor basis.
 652  *
 653  * Inputs
 654  *      dummy(unused)
 655  *
 656  * Outputs
 657  *      None
 658  */
 659 static void
 660 ia64_mca_cmc_vector_enable (void *dummy)
 661 {
 662         cmcv_reg_t      cmcv;
 663
 664         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 665
 666         cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
 667         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 668
 669         IA64_MCA_DEBUG("%s: CPU %d corrected "
 670                        "machine check vector %#x enabled.\n",
 671                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 672 }
 673
 674 /*
 675  * ia64_mca_cmc_vector_disable_keventd
 676  *
 677  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 678  * disable the cmc interrupt vector.
 679  */
 680 static void
 681 ia64_mca_cmc_vector_disable_keventd(void *unused)
 682 {
 683         on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
 684 }
 685
 686 /*
 687  * ia64_mca_cmc_vector_enable_keventd
 688  *
 689  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 690  * enable the cmc interrupt vector.
 691  */
 692 static void
 693 ia64_mca_cmc_vector_enable_keventd(void *unused)
 694 {
 695         on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
 696 }
 697
 698 /*
 699  * ia64_mca_wakeup
 700  *
 701  *      Send an inter-cpu interrupt to wake-up a particular cpu
 702  *      and mark that cpu to be out of rendez.
 703  *
 704  *  Inputs  :   cpuid
 705  *  Outputs :   None
 706  */
 707 static void
 708 ia64_mca_wakeup(int cpu)
 709 {
 710         platform_send_ipi(cpu, IA64_MCA_WAKEUP_VECTOR, IA64_IPI_DM_INT, 0);
 711         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
 712
 713 }
 714
 715 /*
 716  * ia64_mca_wakeup_all
 717  *
 718  *      Wakeup all the cpus which have rendez'ed previously.
 719  *
 720  *  Inputs  :   None
 721  *  Outputs :   None
 722  */
 723 static void
 724 ia64_mca_wakeup_all(void)
 725 {
 726         int cpu;
 727
 728         /* Clear the Rendez checkin flag for all cpus */
 729         for_each_online_cpu(cpu) {
 730                 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
 731                         ia64_mca_wakeup(cpu);
 732         }
 733
 734 }
 735
 736 /*
 737  * ia64_mca_rendez_interrupt_handler
 738  *
 739  *      This is handler used to put slave processors into spinloop
 740  *      while the monarch processor does the mca handling and later
 741  *      wake each slave up once the monarch is done.
 742  *
 743  *  Inputs  :   None
 744  *  Outputs :   None
 745  */
 746 static irqreturn_t
 747 ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
 748 {
 749         unsigned long flags;
 750         int cpu = smp_processor_id();
 751         struct ia64_mca_notify_die nd =
 752                 { .sos = NULL, .monarch_cpu = &monarch_cpu };
 753
 754         /* Mask all interrupts */
 755         local_irq_save(flags);
 756         if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", get_irq_regs(),
 757                        (long)&nd, 0, 0) == NOTIFY_STOP)
 758                 ia64_mca_spin(__FUNCTION__);
 759
 760         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
 761         /* Register with the SAL monarch that the slave has
 762          * reached SAL
 763          */
 764         ia64_sal_mc_rendez();
 765
 766         if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", get_irq_regs(),
 767                        (long)&nd, 0, 0) == NOTIFY_STOP)
 768                 ia64_mca_spin(__FUNCTION__);
 769
 770         /* Wait for the monarch cpu to exit. */
 771         while (monarch_cpu != -1)
 772                cpu_relax();     /* spin until monarch leaves */
 773
 774         if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", get_irq_regs(),
 775                        (long)&nd, 0, 0) == NOTIFY_STOP)
 776                 ia64_mca_spin(__FUNCTION__);
 777
 778         /* Enable all interrupts */
 779         local_irq_restore(flags);
 780         return IRQ_HANDLED;
 781 }
 782
 783 /*
 784  * ia64_mca_wakeup_int_handler
 785  *
 786  *      The interrupt handler for processing the inter-cpu interrupt to the
 787  *      slave cpu which was spinning in the rendez loop.
 788  *      Since this spinning is done by turning off the interrupts and
 789  *      polling on the wakeup-interrupt bit in the IRR, there is
 790  *      nothing useful to be done in the handler.
 791  *
 792  *  Inputs  :   wakeup_irq  (Wakeup-interrupt bit)
 793  *      arg             (Interrupt handler specific argument)
 794  *  Outputs :   None
 795  *
 796  */
 797 static irqreturn_t
 798 ia64_mca_wakeup_int_handler(int wakeup_irq, void *arg)
 799 {
 800         return IRQ_HANDLED;
 801 }
 802
 803 /* Function pointer for extra MCA recovery */
 804 int (*ia64_mca_ucmc_extension)
 805         (void*,struct ia64_sal_os_state*)
 806         = NULL;
 807
 808 int
 809 ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *))
 810 {
 811         if (ia64_mca_ucmc_extension)
 812                 return 1;
 813
 814         ia64_mca_ucmc_extension = fn;
 815         return 0;
 816 }
 817
 818 void
 819 ia64_unreg_MCA_extension(void)
 820 {
 821         if (ia64_mca_ucmc_extension)
 822                 ia64_mca_ucmc_extension = NULL;
 823 }
 824
 825 EXPORT_SYMBOL(ia64_reg_MCA_extension);
 826 EXPORT_SYMBOL(ia64_unreg_MCA_extension);
 827
 828
 829 static inline void
 830 copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
 831 {
 832         u64 fslot, tslot, nat;
 833         *tr = *fr;
 834         fslot = ((unsigned long)fr >> 3) & 63;
 835         tslot = ((unsigned long)tr >> 3) & 63;
 836         *tnat &= ~(1UL << tslot);
 837         nat = (fnat >> fslot) & 1;
 838         *tnat |= (nat << tslot);
 839 }
 840
 841 /* Change the comm field on the MCA/INT task to include the pid that
 842  * was interrupted, it makes for easier debugging.  If that pid was 0
 843  * (swapper or nested MCA/INIT) then use the start of the previous comm
 844  * field suffixed with its cpu.
 845  */
 846
 847 static void
 848 ia64_mca_modify_comm(const struct task_struct *previous_current)
 849 {
 850         char *p, comm[sizeof(current->comm)];
 851         if (previous_current->pid)
 852                 snprintf(comm, sizeof(comm), "%s %d",
 853                         current->comm, previous_current->pid);
 854         else {
 855                 int l;
 856                 if ((p = strchr(previous_current->comm, ' ')))
 857                         l = p - previous_current->comm;
 858                 else
 859                         l = strlen(previous_current->comm);
 860                 snprintf(comm, sizeof(comm), "%s %*s %d",
 861                         current->comm, l, previous_current->comm,
 862                         task_thread_info(previous_current)->cpu);
 863         }
 864         memcpy(current->comm, comm, sizeof(current->comm));
 865 }
 866
 867 /* On entry to this routine, we are running on the per cpu stack, see
 868  * mca_asm.h.  The original stack has not been touched by this event.  Some of
 869  * the original stack's registers will be in the RBS on this stack.  This stack
 870  * also contains a partial pt_regs and switch_stack, the rest of the data is in
 871  * PAL minstate.
 872  *
 873  * The first thing to do is modify the original stack to look like a blocked
 874  * task so we can run backtrace on the original task.  Also mark the per cpu
 875  * stack as current to ensure that we use the correct task state, it also means
 876  * that we can do backtrace on the MCA/INIT handler code itself.
 877  */
 878
 879 static struct task_struct *
 880 ia64_mca_modify_original_stack(struct pt_regs *regs,
 881                 const struct switch_stack *sw,
 882                 struct ia64_sal_os_state *sos,
 883                 const char *type)
 884 {
 885         char *p;
 886         ia64_va va;
 887         extern char ia64_leave_kernel[];        /* Need asm address, not function descriptor */
 888         const pal_min_state_area_t *ms = sos->pal_min_state;
 889         struct task_struct *previous_current;
 890         struct pt_regs *old_regs;
 891         struct switch_stack *old_sw;
 892         unsigned size = sizeof(struct pt_regs) +
 893                         sizeof(struct switch_stack) + 16;
 894         u64 *old_bspstore, *old_bsp;
 895         u64 *new_bspstore, *new_bsp;
 896         u64 old_unat, old_rnat, new_rnat, nat;
 897         u64 slots, loadrs = regs->loadrs;
 898         u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
 899         u64 ar_bspstore = regs->ar_bspstore;
 900         u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
 901         const u64 *bank;
 902         const char *msg;
 903         int cpu = smp_processor_id();
 904
 905         previous_current = curr_task(cpu);
 906         set_curr_task(cpu, current);
 907         if ((p = strchr(current->comm, ' ')))
 908                 *p = '\0';
 909
 910         /* Best effort attempt to cope with MCA/INIT delivered while in
 911          * physical mode.
 912          */
 913         regs->cr_ipsr = ms->pmsa_ipsr;
 914         if (ia64_psr(regs)->dt == 0) {
 915                 va.l = r12;
 916                 if (va.f.reg == 0) {
 917                         va.f.reg = 7;
 918                         r12 = va.l;
 919                 }
 920                 va.l = r13;
 921                 if (va.f.reg == 0) {
 922                         va.f.reg = 7;
 923                         r13 = va.l;
 924                 }
 925         }
 926         if (ia64_psr(regs)->rt == 0) {
 927                 va.l = ar_bspstore;
 928                 if (va.f.reg == 0) {
 929                         va.f.reg = 7;
 930                         ar_bspstore = va.l;
 931                 }
 932                 va.l = ar_bsp;
 933                 if (va.f.reg == 0) {
 934                         va.f.reg = 7;
 935                         ar_bsp = va.l;
 936                 }
 937         }
 938
 939         /* mca_asm.S ia64_old_stack() cannot assume that the dirty registers
 940          * have been copied to the old stack, the old stack may fail the
 941          * validation tests below.  So ia64_old_stack() must restore the dirty
 942          * registers from the new stack.  The old and new bspstore probably
 943          * have different alignments, so loadrs calculated on the old bsp
 944          * cannot be used to restore from the new bsp.  Calculate a suitable
 945          * loadrs for the new stack and save it in the new pt_regs, where
 946          * ia64_old_stack() can get it.
 947          */
 948         old_bspstore = (u64 *)ar_bspstore;
 949         old_bsp = (u64 *)ar_bsp;
 950         slots = ia64_rse_num_regs(old_bspstore, old_bsp);
 951         new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
 952         new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
 953         regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
 954
 955         /* Verify the previous stack state before we change it */
 956         if (user_mode(regs)) {
 957                 msg = "occurred in user space";
 958                 /* previous_current is guaranteed to be valid when the task was
 959                  * in user space, so ...
 960                  */
 961                 ia64_mca_modify_comm(previous_current);
 962                 goto no_mod;
 963         }
 964
 965         if (!mca_recover_range(ms->pmsa_iip)) {
 966                 if (r13 != sos->prev_IA64_KR_CURRENT) {
 967                         msg = "inconsistent previous current and r13";
 968                         goto no_mod;
 969                 }
 970                 if ((r12 - r13) >= KERNEL_STACK_SIZE) {
 971                         msg = "inconsistent r12 and r13";
 972                         goto no_mod;
 973                 }
 974                 if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {
 975                         msg = "inconsistent ar.bspstore and r13";
 976                         goto no_mod;
 977                 }
 978                 va.p = old_bspstore;
 979                 if (va.f.reg < 5) {
 980                         msg = "old_bspstore is in the wrong region";
 981                         goto no_mod;
 982                 }
 983                 if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {
 984                         msg = "inconsistent ar.bsp and r13";
 985                         goto no_mod;
 986                 }
 987                 size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;
 988                 if (ar_bspstore + size > r12) {
 989                         msg = "no room for blocked state";
 990                         goto no_mod;
 991                 }
 992         }
 993
 994         ia64_mca_modify_comm(previous_current);
 995
 996         /* Make the original task look blocked.  First stack a struct pt_regs,
 997          * describing the state at the time of interrupt.  mca_asm.S built a
 998          * partial pt_regs, copy it and fill in the blanks using minstate.
 999          */
1000         p = (char *)r12 - sizeof(*regs);
1001         old_regs = (struct pt_regs *)p;
1002         memcpy(old_regs, regs, sizeof(*regs));
1003         /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
1004          * pmsa_{xip,xpsr,xfs}
1005          */
1006         if (ia64_psr(regs)->ic) {
1007                 old_regs->cr_iip = ms->pmsa_iip;
1008                 old_regs->cr_ipsr = ms->pmsa_ipsr;
1009                 old_regs->cr_ifs = ms->pmsa_ifs;
1010         } else {
1011                 old_regs->cr_iip = ms->pmsa_xip;
1012                 old_regs->cr_ipsr = ms->pmsa_xpsr;
1013                 old_regs->cr_ifs = ms->pmsa_xfs;
1014         }
1015         old_regs->pr = ms->pmsa_pr;
1016         old_regs->b0 = ms->pmsa_br0;
1017         old_regs->loadrs = loadrs;
1018         old_regs->ar_rsc = ms->pmsa_rsc;
1019         old_unat = old_regs->ar_unat;
1020         copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
1021         copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
1022         copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
1023         copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
1024         copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
1025         copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
1026         copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
1027         copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
1028         copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
1029         copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
1030         copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
1031         if (ia64_psr(old_regs)->bn)
1032                 bank = ms->pmsa_bank1_gr;
1033         else
1034                 bank = ms->pmsa_bank0_gr;
1035         copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
1036         copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
1037         copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
1038         copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
1039         copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
1040         copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
1041         copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
1042         copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
1043         copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
1044         copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
1045         copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
1046         copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
1047         copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
1048         copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
1049         copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
1050         copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
1051
1052         /* Next stack a struct switch_stack.  mca_asm.S built a partial
1053          * switch_stack, copy it and fill in the blanks using pt_regs and
1054          * minstate.
1055          *
1056          * In the synthesized switch_stack, b0 points to ia64_leave_kernel,
1057          * ar.pfs is set to 0.
1058          *
1059          * unwind.c::unw_unwind() does special processing for interrupt frames.
1060          * It checks if the PRED_NON_SYSCALL predicate is set, if the predicate
1061          * is clear then unw_unwind() does _not_ adjust bsp over pt_regs.  Not
1062          * that this is documented, of course.  Set PRED_NON_SYSCALL in the
1063          * switch_stack on the original stack so it will unwind correctly when
1064          * unwind.c reads pt_regs.
1065          *
1066          * thread.ksp is updated to point to the synthesized switch_stack.
1067          */
1068         p -= sizeof(struct switch_stack);
1069         old_sw = (struct switch_stack *)p;
1070         memcpy(old_sw, sw, sizeof(*sw));
1071         old_sw->caller_unat = old_unat;
1072         old_sw->ar_fpsr = old_regs->ar_fpsr;
1073         copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);
1074         copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);
1075         copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);
1076         copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);
1077         old_sw->b0 = (u64)ia64_leave_kernel;
1078         old_sw->b1 = ms->pmsa_br1;
1079         old_sw->ar_pfs = 0;
1080         old_sw->ar_unat = old_unat;
1081         old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);
1082         previous_current->thread.ksp = (u64)p - 16;
1083
1084         /* Finally copy the original stack's registers back to its RBS.
1085          * Registers from ar.bspstore through ar.bsp at the time of the event
1086          * are in the current RBS, copy them back to the original stack.  The
1087          * copy must be done register by register because the original bspstore
1088          * and the current one have different alignments, so the saved RNAT
1089          * data occurs at different places.
1090          *
1091          * mca_asm does cover, so the old_bsp already includes all registers at
1092          * the time of MCA/INIT.  It also does flushrs, so all registers before
1093          * this function have been written to backing store on the MCA/INIT
1094          * stack.
1095          */
1096         new_rnat = ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore));
1097         old_rnat = regs->ar_rnat;
1098         while (slots--) {
1099                 if (ia64_rse_is_rnat_slot(new_bspstore)) {
1100                         new_rnat = ia64_get_rnat(new_bspstore++);
1101                 }
1102                 if (ia64_rse_is_rnat_slot(old_bspstore)) {
1103                         *old_bspstore++ = old_rnat;
1104                         old_rnat = 0;
1105                 }
1106                 nat = (new_rnat >> ia64_rse_slot_num(new_bspstore)) & 1UL;
1107                 old_rnat &= ~(1UL << ia64_rse_slot_num(old_bspstore));
1108                 old_rnat |= (nat << ia64_rse_slot_num(old_bspstore));
1109                 *old_bspstore++ = *new_bspstore++;
1110         }
1111         old_sw->ar_bspstore = (unsigned long)old_bspstore;
1112         old_sw->ar_rnat = old_rnat;
1113
1114         sos->prev_task = previous_current;
1115         return previous_current;
1116
1117 no_mod:
1118         printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
1119                         smp_processor_id(), type, msg);
1120         return previous_current;
1121 }
1122
1123 /* The monarch/slave interaction is based on monarch_cpu and requires that all
1124  * slaves have entered rendezvous before the monarch leaves.  If any cpu has
1125  * not entered rendezvous yet then wait a bit.  The assumption is that any
1126  * slave that has not rendezvoused after a reasonable time is never going to do
1127  * so.  In this context, slave includes cpus that respond to the MCA rendezvous
1128  * interrupt, as well as cpus that receive the INIT slave event.
1129  */
1130
1131 static void
1132 ia64_wait_for_slaves(int monarch, const char *type)
1133 {
1134         int c, wait = 0, missing = 0;
1135         for_each_online_cpu(c) {
1136                 if (c == monarch)
1137                         continue;
1138                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1139                         udelay(1000);           /* short wait first */
1140                         wait = 1;
1141                         break;
1142                 }
1143         }
1144         if (!wait)
1145                 goto all_in;
1146         for_each_online_cpu(c) {
1147                 if (c == monarch)
1148                         continue;
1149                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1150                         udelay(5*1000000);      /* wait 5 seconds for slaves (arbitrary) */
1151                         if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1152                                 missing = 1;
1153                         break;
1154                 }
1155         }
1156         if (!missing)
1157                 goto all_in;
1158         /*
1159          * Maybe slave(s) dead. Print buffered messages immediately.
1160          */
1161         ia64_mlogbuf_finish(0);
1162         mprintk(KERN_INFO "OS %s slave did not rendezvous on cpu", type);
1163         for_each_online_cpu(c) {
1164                 if (c == monarch)
1165                         continue;
1166                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1167                         mprintk(" %d", c);
1168         }
1169         mprintk("\n");
1170         return;
1171
1172 all_in:
1173         mprintk(KERN_INFO "All OS %s slaves have reached rendezvous\n", type);
1174         return;
1175 }
1176
1177 /*
1178  * ia64_mca_handler
1179  *
1180  *      This is uncorrectable machine check handler called from OS_MCA
1181  *      dispatch code which is in turn called from SAL_CHECK().
1182  *      This is the place where the core of OS MCA handling is done.
1183  *      Right now the logs are extracted and displayed in a well-defined
1184  *      format. This handler code is supposed to be run only on the
1185  *      monarch processor. Once the monarch is done with MCA handling
1186  *      further MCA logging is enabled by clearing logs.
1187  *      Monarch also has the duty of sending wakeup-IPIs to pull the
1188  *      slave processors out of rendezvous spinloop.
1189  */
1190 void
1191 ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1192                  struct ia64_sal_os_state *sos)
1193 {
1194         pal_processor_state_info_t *psp = (pal_processor_state_info_t *)
1195                 &sos->proc_state_param;
1196         int recover, cpu = smp_processor_id();
1197         struct task_struct *previous_current;
1198         struct ia64_mca_notify_die nd =
1199                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1200
1201         mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
1202                 "monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
1203
1204         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
1205         monarch_cpu = cpu;
1206         if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
1207                         == NOTIFY_STOP)
1208                 ia64_mca_spin(__FUNCTION__);
1209         ia64_wait_for_slaves(cpu, "MCA");
1210
1211         /* Wakeup all the processors which are spinning in the rendezvous loop.
1212          * They will leave SAL, then spin in the OS with interrupts disabled
1213          * until this monarch cpu leaves the MCA handler.  That gets control
1214          * back to the OS so we can backtrace the other cpus, backtrace when
1215          * spinning in SAL does not work.
1216          */
1217         ia64_mca_wakeup_all();
1218         if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
1219                         == NOTIFY_STOP)
1220                 ia64_mca_spin(__FUNCTION__);
1221
1222         /* Get the MCA error record and log it */
1223         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
1224
1225         /* TLB error is only exist in this SAL error record */
1226         recover = (psp->tc && !(psp->cc || psp->bc || psp->rc || psp->uc))
1227         /* other error recovery */
1228            || (ia64_mca_ucmc_extension
1229                 && ia64_mca_ucmc_extension(
1230                         IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA),
1231                         sos));
1232
1233         if (recover) {
1234                 sal_log_record_header_t *rh = IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA);
1235                 rh->severity = sal_log_severity_corrected;
1236                 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
1237                 sos->os_status = IA64_MCA_CORRECTED;
1238         } else {
1239                 /* Dump buffered message to console */
1240                 ia64_mlogbuf_finish(1);
1241         }
1242         if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
1243                         == NOTIFY_STOP)
1244                 ia64_mca_spin(__FUNCTION__);
1245
1246         set_curr_task(cpu, previous_current);
1247         monarch_cpu = -1;
1248 }
1249
1250 static DECLARE_WORK(cmc_disable_work, ia64_mca_cmc_vector_disable_keventd, NULL);
1251 static DECLARE_WORK(cmc_enable_work, ia64_mca_cmc_vector_enable_keventd, NULL);
1252
1253 /*
1254  * ia64_mca_cmc_int_handler
1255  *
1256  *  This is corrected machine check interrupt handler.
1257  *      Right now the logs are extracted and displayed in a well-defined
1258  *      format.
1259  *
1260  * Inputs
1261  *      interrupt number
1262  *      client data arg ptr
1263  *
1264  * Outputs
1265  *      None
1266  */
1267 static irqreturn_t
1268 ia64_mca_cmc_int_handler(int cmc_irq, void *arg)
1269 {
1270         static unsigned long    cmc_history[CMC_HISTORY_LENGTH];
1271         static int              index;
1272         static DEFINE_SPINLOCK(cmc_history_lock);
1273
1274         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1275                        __FUNCTION__, cmc_irq, smp_processor_id());
1276
1277         /* SAL spec states this should run w/ interrupts enabled */
1278         local_irq_enable();
1279
1280         spin_lock(&cmc_history_lock);
1281         if (!cmc_polling_enabled) {
1282                 int i, count = 1; /* we know 1 happened now */
1283                 unsigned long now = jiffies;
1284
1285                 for (i = 0; i < CMC_HISTORY_LENGTH; i++) {
1286                         if (now - cmc_history[i] <= HZ)
1287                                 count++;
1288                 }
1289
1290                 IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);
1291                 if (count >= CMC_HISTORY_LENGTH) {
1292
1293                         cmc_polling_enabled = 1;
1294                         spin_unlock(&cmc_history_lock);
1295                         /* If we're being hit with CMC interrupts, we won't
1296                          * ever execute the schedule_work() below.  Need to
1297                          * disable CMC interrupts on this processor now.
1298                          */
1299                         ia64_mca_cmc_vector_disable(NULL);
1300                         schedule_work(&cmc_disable_work);
1301
1302                         /*
1303                          * Corrected errors will still be corrected, but
1304                          * make sure there's a log somewhere that indicates
1305                          * something is generating more than we can handle.
1306                          */
1307                         printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");
1308
1309                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1310
1311                         /* lock already released, get out now */
1312                         goto out;
1313                 } else {
1314                         cmc_history[index++] = now;
1315                         if (index == CMC_HISTORY_LENGTH)
1316                                 index = 0;
1317                 }
1318         }
1319         spin_unlock(&cmc_history_lock);
1320 out:
1321         /* Get the CMC error record and log it */
1322         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
1323
1324         return IRQ_HANDLED;
1325 }
1326
1327 /*
1328  *  ia64_mca_cmc_int_caller
1329  *
1330  *      Triggered by sw interrupt from CMC polling routine.  Calls
1331  *      real interrupt handler and either triggers a sw interrupt
1332  *      on the next cpu or does cleanup at the end.
1333  *
1334  * Inputs
1335  *      interrupt number
1336  *      client data arg ptr
1337  * Outputs
1338  *      handled
1339  */
1340 static irqreturn_t
1341 ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
1342 {
1343         static int start_count = -1;
1344         unsigned int cpuid;
1345
1346         cpuid = smp_processor_id();
1347
1348         /* If first cpu, update count */
1349         if (start_count == -1)
1350                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC);
1351
1352         ia64_mca_cmc_int_handler(cmc_irq, arg);
1353
1354         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1355
1356         if (cpuid < NR_CPUS) {
1357                 platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1358         } else {
1359                 /* If no log record, switch out of polling mode */
1360                 if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) {
1361
1362                         printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");
1363                         schedule_work(&cmc_enable_work);
1364                         cmc_polling_enabled = 0;
1365
1366                 } else {
1367
1368                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1369                 }
1370
1371                 start_count = -1;
1372         }
1373
1374         return IRQ_HANDLED;
1375 }
1376
1377 /*
1378  *  ia64_mca_cmc_poll
1379  *
1380  *      Poll for Corrected Machine Checks (CMCs)
1381  *
1382  * Inputs   :   dummy(unused)
1383  * Outputs  :   None
1384  *
1385  */
1386 static void
1387 ia64_mca_cmc_poll (unsigned long dummy)
1388 {
1389         /* Trigger a CMC interrupt cascade  */
1390         platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1391 }
1392
1393 /*
1394  *  ia64_mca_cpe_int_caller
1395  *
1396  *      Triggered by sw interrupt from CPE polling routine.  Calls
1397  *      real interrupt handler and either triggers a sw interrupt
1398  *      on the next cpu or does cleanup at the end.
1399  *
1400  * Inputs
1401  *      interrupt number
1402  *      client data arg ptr
1403  * Outputs
1404  *      handled
1405  */
1406 #ifdef CONFIG_ACPI
1407
1408 static irqreturn_t
1409 ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
1410 {
1411         static int start_count = -1;
1412         static int poll_time = MIN_CPE_POLL_INTERVAL;
1413         unsigned int cpuid;
1414
1415         cpuid = smp_processor_id();
1416
1417         /* If first cpu, update count */
1418         if (start_count == -1)
1419                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE);
1420
1421         ia64_mca_cpe_int_handler(cpe_irq, arg);
1422
1423         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1424
1425         if (cpuid < NR_CPUS) {
1426                 platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1427         } else {
1428                 /*
1429                  * If a log was recorded, increase our polling frequency,
1430                  * otherwise, backoff or return to interrupt mode.
1431                  */
1432                 if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) {
1433                         poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time / 2);
1434                 } else if (cpe_vector < 0) {
1435                         poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2);
1436                 } else {
1437                         poll_time = MIN_CPE_POLL_INTERVAL;
1438
1439                         printk(KERN_WARNING "Returning to interrupt driven CPE handler\n");
1440                         enable_irq(local_vector_to_irq(IA64_CPE_VECTOR));
1441                         cpe_poll_enabled = 0;
1442                 }
1443
1444                 if (cpe_poll_enabled)
1445                         mod_timer(&cpe_poll_timer, jiffies + poll_time);
1446                 start_count = -1;
1447         }
1448
1449         return IRQ_HANDLED;
1450 }
1451
1452 /*
1453  *  ia64_mca_cpe_poll
1454  *
1455  *      Poll for Corrected Platform Errors (CPEs), trigger interrupt
1456  *      on first cpu, from there it will trickle through all the cpus.
1457  *
1458  * Inputs   :   dummy(unused)
1459  * Outputs  :   None
1460  *
1461  */
1462 static void
1463 ia64_mca_cpe_poll (unsigned long dummy)
1464 {
1465         /* Trigger a CPE interrupt cascade  */
1466         platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1467 }
1468
1469 #endif /* CONFIG_ACPI */
1470
1471 static int
1472 default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
1473 {
1474         int c;
1475         struct task_struct *g, *t;
1476         if (val != DIE_INIT_MONARCH_PROCESS)
1477                 return NOTIFY_DONE;
1478
1479         /*
1480          * FIXME: mlogbuf will brim over with INIT stack dumps.
1481          * To enable show_stack from INIT, we use oops_in_progress which should
1482          * be used in real oops. This would cause something wrong after INIT.
1483          */
1484         BREAK_LOGLEVEL(console_loglevel);
1485         ia64_mlogbuf_dump_from_init();
1486
1487         printk(KERN_ERR "Processes interrupted by INIT -");
1488         for_each_online_cpu(c) {
1489                 struct ia64_sal_os_state *s;
1490                 t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
1491                 s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
1492                 g = s->prev_task;
1493                 if (g) {
1494                         if (g->pid)
1495                                 printk(" %d", g->pid);
1496                         else
1497                                 printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
1498                 }
1499         }
1500         printk("\n\n");
1501         if (read_trylock(&tasklist_lock)) {
1502                 do_each_thread (g, t) {
1503                         printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
1504                         show_stack(t, NULL);
1505                 } while_each_thread (g, t);
1506                 read_unlock(&tasklist_lock);
1507         }
1508         /* FIXME: This will not restore zapped printk locks. */
1509         RESTORE_LOGLEVEL(console_loglevel);
1510         return NOTIFY_DONE;
1511 }
1512
1513 /*
1514  * C portion of the OS INIT handler
1515  *
1516  * Called from ia64_os_init_dispatch
1517  *
1518  * Inputs: pointer to pt_regs where processor info was saved.  SAL/OS state for
1519  * this event.  This code is used for both monarch and slave INIT events, see
1520  * sos->monarch.
1521  *
1522  * All INIT events switch to the INIT stack and change the previous process to
1523  * blocked status.  If one of the INIT events is the monarch then we are
1524  * probably processing the nmi button/command.  Use the monarch cpu to dump all
1525  * the processes.  The slave INIT events all spin until the monarch cpu
1526  * returns.  We can also get INIT slave events for MCA, in which case the MCA
1527  * process is the monarch.
1528  */
1529
1530 void
1531 ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1532                   struct ia64_sal_os_state *sos)
1533 {
1534         static atomic_t slaves;
1535         static atomic_t monarchs;
1536         struct task_struct *previous_current;
1537         int cpu = smp_processor_id();
1538         struct ia64_mca_notify_die nd =
1539                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1540
1541         (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
1542
1543         mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1544                 sos->proc_state_param, cpu, sos->monarch);
1545         salinfo_log_wakeup(SAL_INFO_TYPE_INIT, NULL, 0, 0);
1546
1547         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "INIT");
1548         sos->os_status = IA64_INIT_RESUME;
1549
1550         /* FIXME: Workaround for broken proms that drive all INIT events as
1551          * slaves.  The last slave that enters is promoted to be a monarch.
1552          * Remove this code in September 2006, that gives platforms a year to
1553          * fix their proms and get their customers updated.
1554          */
1555         if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
1556                 mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
1557                        __FUNCTION__, cpu);
1558                 atomic_dec(&slaves);
1559                 sos->monarch = 1;
1560         }
1561
1562         /* FIXME: Workaround for broken proms that drive all INIT events as
1563          * monarchs.  Second and subsequent monarchs are demoted to slaves.
1564          * Remove this code in September 2006, that gives platforms a year to
1565          * fix their proms and get their customers updated.
1566          */
1567         if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
1568                 mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
1569                                __FUNCTION__, cpu);
1570                 atomic_dec(&monarchs);
1571                 sos->monarch = 0;
1572         }
1573
1574         if (!sos->monarch) {
1575                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
1576                 while (monarch_cpu == -1)
1577                        cpu_relax();     /* spin until monarch enters */
1578                 if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
1579                                 == NOTIFY_STOP)
1580                         ia64_mca_spin(__FUNCTION__);
1581                 if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1582                                 == NOTIFY_STOP)
1583                         ia64_mca_spin(__FUNCTION__);
1584                 while (monarch_cpu != -1)
1585                        cpu_relax();     /* spin until monarch leaves */
1586                 if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1587                                 == NOTIFY_STOP)
1588                         ia64_mca_spin(__FUNCTION__);
1589                 mprintk("Slave on cpu %d returning to normal service.\n", cpu);
1590                 set_curr_task(cpu, previous_current);
1591                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1592                 atomic_dec(&slaves);
1593                 return;
1594         }
1595
1596         monarch_cpu = cpu;
1597         if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
1598                         == NOTIFY_STOP)
1599                 ia64_mca_spin(__FUNCTION__);
1600
1601         /*
1602          * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
1603          * generated via the BMC's command-line interface, but since the console is on the
1604          * same serial line, the user will need some time to switch out of the BMC before
1605          * the dump begins.
1606          */
1607         mprintk("Delaying for 5 seconds...\n");
1608         udelay(5*1000000);
1609         ia64_wait_for_slaves(cpu, "INIT");
1610         /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
1611          * to default_monarch_init_process() above and just print all the
1612          * tasks.
1613          */
1614         if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1615                         == NOTIFY_STOP)
1616                 ia64_mca_spin(__FUNCTION__);
1617         if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1618                         == NOTIFY_STOP)
1619                 ia64_mca_spin(__FUNCTION__);
1620         mprintk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
1621         atomic_dec(&monarchs);
1622         set_curr_task(cpu, previous_current);
1623         monarch_cpu = -1;
1624         return;
1625 }
1626
1627 static int __init
1628 ia64_mca_disable_cpe_polling(char *str)
1629 {
1630         cpe_poll_enabled = 0;
1631         return 1;
1632 }
1633
1634 __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1635
1636 static struct irqaction cmci_irqaction = {
1637         .handler =      ia64_mca_cmc_int_handler,
1638         .flags =        IRQF_DISABLED,
1639         .name =         "cmc_hndlr"
1640 };
1641
1642 static struct irqaction cmcp_irqaction = {
1643         .handler =      ia64_mca_cmc_int_caller,
1644         .flags =        IRQF_DISABLED,
1645         .name =         "cmc_poll"
1646 };
1647
1648 static struct irqaction mca_rdzv_irqaction = {
1649         .handler =      ia64_mca_rendez_int_handler,
1650         .flags =        IRQF_DISABLED,
1651         .name =         "mca_rdzv"
1652 };
1653
1654 static struct irqaction mca_wkup_irqaction = {
1655         .handler =      ia64_mca_wakeup_int_handler,
1656         .flags =        IRQF_DISABLED,
1657         .name =         "mca_wkup"
1658 };
1659
1660 #ifdef CONFIG_ACPI
1661 static struct irqaction mca_cpe_irqaction = {
1662         .handler =      ia64_mca_cpe_int_handler,
1663         .flags =        IRQF_DISABLED,
1664         .name =         "cpe_hndlr"
1665 };
1666
1667 static struct irqaction mca_cpep_irqaction = {
1668         .handler =      ia64_mca_cpe_int_caller,
1669         .flags =        IRQF_DISABLED,
1670         .name =         "cpe_poll"
1671 };
1672 #endif /* CONFIG_ACPI */
1673
1674 /* Minimal format of the MCA/INIT stacks.  The pseudo processes that run on
1675  * these stacks can never sleep, they cannot return from the kernel to user
1676  * space, they do not appear in a normal ps listing.  So there is no need to
1677  * format most of the fields.
1678  */
1679
1680 static void __cpuinit
1681 format_mca_init_stack(void *mca_data, unsigned long offset,
1682                 const char *type, int cpu)
1683 {
1684         struct task_struct *p = (struct task_struct *)((char *)mca_data + offset);
1685         struct thread_info *ti;
1686         memset(p, 0, KERNEL_STACK_SIZE);
1687         ti = task_thread_info(p);
1688         ti->flags = _TIF_MCA_INIT;
1689         ti->preempt_count = 1;
1690         ti->task = p;
1691         ti->cpu = cpu;
1692         p->thread_info = ti;
1693         p->state = TASK_UNINTERRUPTIBLE;
1694         cpu_set(cpu, p->cpus_allowed);
1695         INIT_LIST_HEAD(&p->tasks);
1696         p->parent = p->real_parent = p->group_leader = p;
1697         INIT_LIST_HEAD(&p->children);
1698         INIT_LIST_HEAD(&p->sibling);
1699         strncpy(p->comm, type, sizeof(p->comm)-1);
1700 }
1701
1702 /* Do per-CPU MCA-related initialization.  */
1703
1704 void __cpuinit
1705 ia64_mca_cpu_init(void *cpu_data)
1706 {
1707         void *pal_vaddr;
1708         static int first_time = 1;
1709
1710         if (first_time) {
1711                 void *mca_data;
1712                 int cpu;
1713
1714                 first_time = 0;
1715                 mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu)
1716                                          * NR_CPUS + KERNEL_STACK_SIZE);
1717                 mca_data = (void *)(((unsigned long)mca_data +
1718                                         KERNEL_STACK_SIZE - 1) &
1719                                 (-KERNEL_STACK_SIZE));
1720                 for (cpu = 0; cpu < NR_CPUS; cpu++) {
1721                         format_mca_init_stack(mca_data,
1722                                         offsetof(struct ia64_mca_cpu, mca_stack),
1723                                         "MCA", cpu);
1724                         format_mca_init_stack(mca_data,
1725                                         offsetof(struct ia64_mca_cpu, init_stack),
1726                                         "INIT", cpu);
1727                         __per_cpu_mca[cpu] = __pa(mca_data);
1728                         mca_data += sizeof(struct ia64_mca_cpu);
1729                 }
1730         }
1731
1732         /*
1733          * The MCA info structure was allocated earlier and its
1734          * physical address saved in __per_cpu_mca[cpu].  Copy that
1735          * address * to ia64_mca_data so we can access it as a per-CPU
1736          * variable.
1737          */
1738         __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()];
1739
1740         /*
1741          * Stash away a copy of the PTE needed to map the per-CPU page.
1742          * We may need it during MCA recovery.
1743          */
1744         __get_cpu_var(ia64_mca_per_cpu_pte) =
1745                 pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
1746
1747         /*
1748          * Also, stash away a copy of the PAL address and the PTE
1749          * needed to map it.
1750          */
1751         pal_vaddr = efi_get_pal_addr();
1752         if (!pal_vaddr)
1753                 return;
1754         __get_cpu_var(ia64_mca_pal_base) =
1755                 GRANULEROUNDDOWN((unsigned long) pal_vaddr);
1756         __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
1757                                                               PAGE_KERNEL));
1758 }
1759
1760 /*
1761  * ia64_mca_init
1762  *
1763  *  Do all the system level mca specific initialization.
1764  *
1765  *      1. Register spinloop and wakeup request interrupt vectors
1766  *
1767  *      2. Register OS_MCA handler entry point
1768  *
1769  *      3. Register OS_INIT handler entry point
1770  *
1771  *  4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
1772  *
1773  *  Note that this initialization is done very early before some kernel
1774  *  services are available.
1775  *
1776  *  Inputs  :   None
1777  *
1778  *  Outputs :   None
1779  */
1780 void __init
1781 ia64_mca_init(void)
1782 {
1783         ia64_fptr_t *init_hldlr_ptr_monarch = (ia64_fptr_t *)ia64_os_init_dispatch_monarch;
1784         ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
1785         ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
1786         int i;
1787         s64 rc;
1788         struct ia64_sal_retval isrv;
1789         u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
1790         static struct notifier_block default_init_monarch_nb = {
1791                 .notifier_call = default_monarch_init_process,
1792                 .priority = 0/* we need to notified last */
1793         };
1794
1795         IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
1796
1797         /* Clear the Rendez checkin flag for all cpus */
1798         for(i = 0 ; i < NR_CPUS; i++)
1799                 ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1800
1801         /*
1802          * Register the rendezvous spinloop and wakeup mechanism with SAL
1803          */
1804
1805         /* Register the rendezvous interrupt vector with SAL */
1806         while (1) {
1807                 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
1808                                               SAL_MC_PARAM_MECHANISM_INT,
1809                                               IA64_MCA_RENDEZ_VECTOR,
1810                                               timeout,
1811                                               SAL_MC_PARAM_RZ_ALWAYS);
1812                 rc = isrv.status;
1813                 if (rc == 0)
1814                         break;
1815                 if (rc == -2) {
1816                         printk(KERN_INFO "Increasing MCA rendezvous timeout from "
1817                                 "%ld to %ld milliseconds\n", timeout, isrv.v0);
1818                         timeout = isrv.v0;
1819                         (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
1820                         continue;
1821                 }
1822                 printk(KERN_ERR "Failed to register rendezvous interrupt "
1823                        "with SAL (status %ld)\n", rc);
1824                 return;
1825         }
1826
1827         /* Register the wakeup interrupt vector with SAL */
1828         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
1829                                       SAL_MC_PARAM_MECHANISM_INT,
1830                                       IA64_MCA_WAKEUP_VECTOR,
1831                                       0, 0);
1832         rc = isrv.status;
1833         if (rc) {
1834                 printk(KERN_ERR "Failed to register wakeup interrupt with SAL "
1835                        "(status %ld)\n", rc);
1836                 return;
1837         }
1838
1839         IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__);
1840
1841         ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);
1842         /*
1843          * XXX - disable SAL checksum by setting size to 0; should be
1844          *      ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);
1845          */
1846         ia64_mc_info.imi_mca_handler_size       = 0;
1847
1848         /* Register the os mca handler with SAL */
1849         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_MCA,
1850                                        ia64_mc_info.imi_mca_handler,
1851                                        ia64_tpa(mca_hldlr_ptr->gp),
1852                                        ia64_mc_info.imi_mca_handler_size,
1853                                        0, 0, 0)))
1854         {
1855                 printk(KERN_ERR "Failed to register OS MCA handler with SAL "
1856                        "(status %ld)\n", rc);
1857                 return;
1858         }
1859
1860         IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__,
1861                        ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
1862
1863         /*
1864          * XXX - disable SAL checksum by setting size to 0, should be
1865          * size of the actual init handler in mca_asm.S.
1866          */
1867         ia64_mc_info.imi_monarch_init_handler           = ia64_tpa(init_hldlr_ptr_monarch->fp);
1868         ia64_mc_info.imi_monarch_init_handler_size      = 0;
1869         ia64_mc_info.imi_slave_init_handler             = ia64_tpa(init_hldlr_ptr_slave->fp);
1870         ia64_mc_info.imi_slave_init_handler_size        = 0;
1871
1872         IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__,
1873                        ia64_mc_info.imi_monarch_init_handler);
1874
1875         /* Register the os init handler with SAL */
1876         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_INIT,
1877                                        ia64_mc_info.imi_monarch_init_handler,
1878                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1879                                        ia64_mc_info.imi_monarch_init_handler_size,
1880                                        ia64_mc_info.imi_slave_init_handler,
1881                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1882                                        ia64_mc_info.imi_slave_init_handler_size)))
1883         {
1884                 printk(KERN_ERR "Failed to register m/s INIT handlers with SAL "
1885                        "(status %ld)\n", rc);
1886                 return;
1887         }
1888         if (register_die_notifier(&default_init_monarch_nb)) {
1889                 printk(KERN_ERR "Failed to register default monarch INIT process\n");
1890                 return;
1891         }
1892
1893         IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
1894
1895         /*
1896          *  Configure the CMCI/P vector and handler. Interrupts for CMC are
1897          *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
1898          */
1899         register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
1900         register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
1901         ia64_mca_cmc_vector_setup();       /* Setup vector on BSP */
1902
1903         /* Setup the MCA rendezvous interrupt vector */
1904         register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
1905
1906         /* Setup the MCA wakeup interrupt vector */
1907         register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1908
1909 #ifdef CONFIG_ACPI
1910         /* Setup the CPEI/P handler */
1911         register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
1912 #endif
1913
1914         /* Initialize the areas set aside by the OS to buffer the
1915          * platform/processor error states for MCA/INIT/CMC
1916          * handling.
1917          */
1918         ia64_log_init(SAL_INFO_TYPE_MCA);
1919         ia64_log_init(SAL_INFO_TYPE_INIT);
1920         ia64_log_init(SAL_INFO_TYPE_CMC);
1921         ia64_log_init(SAL_INFO_TYPE_CPE);
1922
1923         mca_init = 1;
1924         printk(KERN_INFO "MCA related initialization done\n");
1925 }
1926
1927 /*
1928  * ia64_mca_late_init
1929  *
1930  *      Opportunity to setup things that require initialization later
1931  *      than ia64_mca_init.  Setup a timer to poll for CPEs if the
1932  *      platform doesn't support an interrupt driven mechanism.
1933  *
1934  *  Inputs  :   None
1935  *  Outputs :   Status
1936  */
1937 static int __init
1938 ia64_mca_late_init(void)
1939 {
1940         if (!mca_init)
1941                 return 0;
1942
1943         /* Setup the CMCI/P vector and handler */
1944         init_timer(&cmc_poll_timer);
1945         cmc_poll_timer.function = ia64_mca_cmc_poll;
1946
1947         /* Unmask/enable the vector */
1948         cmc_polling_enabled = 0;
1949         schedule_work(&cmc_enable_work);
1950
1951         IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
1952
1953 #ifdef CONFIG_ACPI
1954         /* Setup the CPEI/P vector and handler */
1955         cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
1956         init_timer(&cpe_poll_timer);
1957         cpe_poll_timer.function = ia64_mca_cpe_poll;
1958
1959         {
1960                 irq_desc_t *desc;
1961                 unsigned int irq;
1962
1963                 if (cpe_vector >= 0) {
1964                         /* If platform supports CPEI, enable the irq. */
1965                         cpe_poll_enabled = 0;
1966                         for (irq = 0; irq < NR_IRQS; ++irq)
1967                                 if (irq_to_vector(irq) == cpe_vector) {
1968                                         desc = irq_desc + irq;
1969                                         desc->status |= IRQ_PER_CPU;
1970                                         setup_irq(irq, &mca_cpe_irqaction);
1971                                         ia64_cpe_irq = irq;
1972                                 }
1973                         ia64_mca_register_cpev(cpe_vector);
1974                         IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__);
1975                 } else {
1976                         /* If platform doesn't support CPEI, get the timer going. */
1977                         if (cpe_poll_enabled) {
1978                                 ia64_mca_cpe_poll(0UL);
1979                                 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
1980                         }
1981                 }
1982         }
1983 #endif
1984
1985         return 0;
1986 }
1987
1988 device_initcall(ia64_mca_late_init);