arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/threads.h>
  31 #include <linux/bitops.h>
  32 #include <linux/irq.h>
  33
  34 #include <asm/delay.h>
  35 #include <asm/intrinsics.h>
  36 #include <asm/io.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/machvec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42
  43 #ifdef CONFIG_PERFMON
  44 # include <asm/perfmon.h>
  45 #endif
  46
  47 #define IRQ_DEBUG       0
  48
  49 #define IRQ_VECTOR_UNASSIGNED   (0)
  50
  51 #define IRQ_UNUSED              (0)
  52 #define IRQ_USED                (1)
  53 #define IRQ_RSVD                (2)
  54
  55 /* These can be overridden in platform_irq_init */
  56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  58
  59 /* default base addr of IPI table */
  60 void __iomem *ipi_base_addr = ((void __iomem *)
  61                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  62
  63 static cpumask_t vector_allocation_domain(int cpu);
  64
  65 /*
  66  * Legacy IRQ to IA-64 vector translation table.
  67  */
  68 __u8 isa_irq_to_vector_map[16] = {
  69         /* 8259 IRQ translation, first 16 entries */
  70         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  71         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  72 };
  73 EXPORT_SYMBOL(isa_irq_to_vector_map);
  74
  75 DEFINE_SPINLOCK(vector_lock);
  76
  77 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
  78         [0 ... NR_IRQS - 1] = {
  79                 .vector = IRQ_VECTOR_UNASSIGNED,
  80                 .domain = CPU_MASK_NONE
  81         }
  82 };
  83
  84 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
  85         [0 ... IA64_NUM_VECTORS - 1] = -1
  86 };
  87
  88 static cpumask_t vector_table[IA64_NUM_VECTORS] = {
  89         [0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE
  90 };
  91
  92 static int irq_status[NR_IRQS] = {
  93         [0 ... NR_IRQS -1] = IRQ_UNUSED
  94 };
  95
  96 int check_irq_used(int irq)
  97 {
  98         if (irq_status[irq] == IRQ_USED)
  99                 return 1;
 100
 101         return -1;
 102 }
 103
 104 static inline int find_unassigned_irq(void)
 105 {
 106         int irq;
 107
 108         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
 109                 if (irq_status[irq] == IRQ_UNUSED)
 110                         return irq;
 111         return -ENOSPC;
 112 }
 113
 114 static inline int find_unassigned_vector(cpumask_t domain)
 115 {
 116         cpumask_t mask;
 117         int pos, vector;
 118
 119         cpus_and(mask, domain, cpu_online_map);
 120         if (cpus_empty(mask))
 121                 return -EINVAL;
 122
 123         for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
 124                 vector = IA64_FIRST_DEVICE_VECTOR + pos;
 125                 cpus_and(mask, domain, vector_table[vector]);
 126                 if (!cpus_empty(mask))
 127                         continue;
 128                 return vector;
 129         }
 130         return -ENOSPC;
 131 }
 132
 133 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
 134 {
 135         cpumask_t mask;
 136         int cpu;
 137         struct irq_cfg *cfg = &irq_cfg[irq];
 138
 139         BUG_ON((unsigned)irq >= NR_IRQS);
 140         BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
 141
 142         cpus_and(mask, domain, cpu_online_map);
 143         if (cpus_empty(mask))
 144                 return -EINVAL;
 145         if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
 146                 return 0;
 147         if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
 148                 return -EBUSY;
 149         for_each_cpu_mask(cpu, mask)
 150                 per_cpu(vector_irq, cpu)[vector] = irq;
 151         cfg->vector = vector;
 152         cfg->domain = domain;
 153         irq_status[irq] = IRQ_USED;
 154         cpus_or(vector_table[vector], vector_table[vector], domain);
 155         return 0;
 156 }
 157
 158 int bind_irq_vector(int irq, int vector, cpumask_t domain)
 159 {
 160         unsigned long flags;
 161         int ret;
 162
 163         spin_lock_irqsave(&vector_lock, flags);
 164         ret = __bind_irq_vector(irq, vector, domain);
 165         spin_unlock_irqrestore(&vector_lock, flags);
 166         return ret;
 167 }
 168
 169 static void __clear_irq_vector(int irq)
 170 {
 171         int vector, cpu;
 172         cpumask_t mask;
 173         cpumask_t domain;
 174         struct irq_cfg *cfg = &irq_cfg[irq];
 175
 176         BUG_ON((unsigned)irq >= NR_IRQS);
 177         BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
 178         vector = cfg->vector;
 179         domain = cfg->domain;
 180         cpus_and(mask, cfg->domain, cpu_online_map);
 181         for_each_cpu_mask(cpu, mask)
 182                 per_cpu(vector_irq, cpu)[vector] = -1;
 183         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 184         cfg->domain = CPU_MASK_NONE;
 185         irq_status[irq] = IRQ_UNUSED;
 186         cpus_andnot(vector_table[vector], vector_table[vector], domain);
 187 }
 188
 189 static void clear_irq_vector(int irq)
 190 {
 191         unsigned long flags;
 192
 193         spin_lock_irqsave(&vector_lock, flags);
 194         __clear_irq_vector(irq);
 195         spin_unlock_irqrestore(&vector_lock, flags);
 196 }
 197
 198 int
 199 assign_irq_vector (int irq)
 200 {
 201         unsigned long flags;
 202         int vector, cpu;
 203         cpumask_t domain = CPU_MASK_NONE;
 204
 205         vector = -ENOSPC;
 206
 207         spin_lock_irqsave(&vector_lock, flags);
 208         for_each_online_cpu(cpu) {
 209                 domain = vector_allocation_domain(cpu);
 210                 vector = find_unassigned_vector(domain);
 211                 if (vector >= 0)
 212                         break;
 213         }
 214         if (vector < 0)
 215                 goto out;
 216         if (irq == AUTO_ASSIGN)
 217                 irq = vector;
 218         BUG_ON(__bind_irq_vector(irq, vector, domain));
 219  out:
 220         spin_unlock_irqrestore(&vector_lock, flags);
 221         return vector;
 222 }
 223
 224 void
 225 free_irq_vector (int vector)
 226 {
 227         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 228             vector > IA64_LAST_DEVICE_VECTOR)
 229                 return;
 230         clear_irq_vector(vector);
 231 }
 232
 233 int
 234 reserve_irq_vector (int vector)
 235 {
 236         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 237             vector > IA64_LAST_DEVICE_VECTOR)
 238                 return -EINVAL;
 239         return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
 240 }
 241
 242 /*
 243  * Initialize vector_irq on a new cpu. This function must be called
 244  * with vector_lock held.
 245  */
 246 void __setup_vector_irq(int cpu)
 247 {
 248         int irq, vector;
 249
 250         /* Clear vector_irq */
 251         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
 252                 per_cpu(vector_irq, cpu)[vector] = -1;
 253         /* Mark the inuse vectors */
 254         for (irq = 0; irq < NR_IRQS; ++irq) {
 255                 if (!cpu_isset(cpu, irq_cfg[irq].domain))
 256                         continue;
 257                 vector = irq_to_vector(irq);
 258                 per_cpu(vector_irq, cpu)[vector] = irq;
 259         }
 260 }
 261
 262 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
 263 static enum vector_domain_type {
 264         VECTOR_DOMAIN_NONE,
 265         VECTOR_DOMAIN_PERCPU
 266 } vector_domain_type = VECTOR_DOMAIN_NONE;
 267
 268 static cpumask_t vector_allocation_domain(int cpu)
 269 {
 270         if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
 271                 return cpumask_of_cpu(cpu);
 272         return CPU_MASK_ALL;
 273 }
 274
 275 static int __init parse_vector_domain(char *arg)
 276 {
 277         if (!arg)
 278                 return -EINVAL;
 279         if (!strcmp(arg, "percpu")) {
 280                 vector_domain_type = VECTOR_DOMAIN_PERCPU;
 281                 no_int_routing = 1;
 282         }
 283         return 0;
 284 }
 285 early_param("vector", parse_vector_domain);
 286 #else
 287 static cpumask_t vector_allocation_domain(int cpu)
 288 {
 289         return CPU_MASK_ALL;
 290 }
 291 #endif
 292
 293
 294 void destroy_and_reserve_irq(unsigned int irq)
 295 {
 296         unsigned long flags;
 297
 298         dynamic_irq_cleanup(irq);
 299
 300         spin_lock_irqsave(&vector_lock, flags);
 301         __clear_irq_vector(irq);
 302         irq_status[irq] = IRQ_RSVD;
 303         spin_unlock_irqrestore(&vector_lock, flags);
 304 }
 305
 306 static int __reassign_irq_vector(int irq, int cpu)
 307 {
 308         struct irq_cfg *cfg = &irq_cfg[irq];
 309         int vector;
 310         cpumask_t domain;
 311
 312         if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
 313                 return -EINVAL;
 314         if (cpu_isset(cpu, cfg->domain))
 315                 return 0;
 316         domain = vector_allocation_domain(cpu);
 317         vector = find_unassigned_vector(domain);
 318         if (vector < 0)
 319                 return -ENOSPC;
 320         __clear_irq_vector(irq);
 321         BUG_ON(__bind_irq_vector(irq, vector, domain));
 322         return 0;
 323 }
 324
 325 int reassign_irq_vector(int irq, int cpu)
 326 {
 327         unsigned long flags;
 328         int ret;
 329
 330         spin_lock_irqsave(&vector_lock, flags);
 331         ret = __reassign_irq_vector(irq, cpu);
 332         spin_unlock_irqrestore(&vector_lock, flags);
 333         return ret;
 334 }
 335
 336 /*
 337  * Dynamic irq allocate and deallocation for MSI
 338  */
 339 int create_irq(void)
 340 {
 341         unsigned long flags;
 342         int irq, vector, cpu;
 343         cpumask_t domain = CPU_MASK_NONE;
 344
 345         irq = vector = -ENOSPC;
 346         spin_lock_irqsave(&vector_lock, flags);
 347         for_each_online_cpu(cpu) {
 348                 domain = vector_allocation_domain(cpu);
 349                 vector = find_unassigned_vector(domain);
 350                 if (vector >= 0)
 351                         break;
 352         }
 353         if (vector < 0)
 354                 goto out;
 355         irq = find_unassigned_irq();
 356         if (irq < 0)
 357                 goto out;
 358         BUG_ON(__bind_irq_vector(irq, vector, domain));
 359  out:
 360         spin_unlock_irqrestore(&vector_lock, flags);
 361         if (irq >= 0)
 362                 dynamic_irq_init(irq);
 363         return irq;
 364 }
 365
 366 void destroy_irq(unsigned int irq)
 367 {
 368         dynamic_irq_cleanup(irq);
 369         clear_irq_vector(irq);
 370 }
 371
 372 #ifdef CONFIG_SMP
 373 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 374 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 375 #else
 376 #       define IS_RESCHEDULE(vec)       (0)
 377 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 378 #endif
 379 /*
 380  * That's where the IVT branches when we get an external
 381  * interrupt. This branches to the correct hardware IRQ handler via
 382  * function ptr.
 383  */
 384 void
 385 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 386 {
 387         struct pt_regs *old_regs = set_irq_regs(regs);
 388         unsigned long saved_tpr;
 389
 390 #if IRQ_DEBUG
 391         {
 392                 unsigned long bsp, sp;
 393
 394                 /*
 395                  * Note: if the interrupt happened while executing in
 396                  * the context switch routine (ia64_switch_to), we may
 397                  * get a spurious stack overflow here.  This is
 398                  * because the register and the memory stack are not
 399                  * switched atomically.
 400                  */
 401                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 402                 sp = ia64_getreg(_IA64_REG_SP);
 403
 404                 if ((sp - bsp) < 1024) {
 405                         static unsigned char count;
 406                         static long last_time;
 407
 408                         if (jiffies - last_time > 5*HZ)
 409                                 count = 0;
 410                         if (++count < 5) {
 411                                 last_time = jiffies;
 412                                 printk("ia64_handle_irq: DANGER: less than "
 413                                        "1KB of free stack space!!\n"
 414                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 415                         }
 416                 }
 417         }
 418 #endif /* IRQ_DEBUG */
 419
 420         /*
 421          * Always set TPR to limit maximum interrupt nesting depth to
 422          * 16 (without this, it would be ~240, which could easily lead
 423          * to kernel stack overflows).
 424          */
 425         irq_enter();
 426         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 427         ia64_srlz_d();
 428         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 429                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 430                         smp_local_flush_tlb();
 431                         kstat_this_cpu.irqs[vector]++;
 432                 } else if (unlikely(IS_RESCHEDULE(vector)))
 433                         kstat_this_cpu.irqs[vector]++;
 434                 else {
 435                         int irq = local_vector_to_irq(vector);
 436
 437                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 438                         ia64_srlz_d();
 439
 440                         if (unlikely(irq < 0)) {
 441                                 printk(KERN_ERR "%s: Unexpected interrupt "
 442                                        "vector %d on CPU %d is not mapped "
 443                                        "to any IRQ!\n", __FUNCTION__, vector,
 444                                        smp_processor_id());
 445                         } else
 446                                 generic_handle_irq(irq);
 447
 448                         /*
 449                          * Disable interrupts and send EOI:
 450                          */
 451                         local_irq_disable();
 452                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 453                 }
 454                 ia64_eoi();
 455                 vector = ia64_get_ivr();
 456         }
 457         /*
 458          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 459          * handler needs to be able to wait for further keyboard interrupts, which can't
 460          * come through until ia64_eoi() has been done.
 461          */
 462         irq_exit();
 463         set_irq_regs(old_regs);
 464 }
 465
 466 #ifdef CONFIG_HOTPLUG_CPU
 467 /*
 468  * This function emulates a interrupt processing when a cpu is about to be
 469  * brought down.
 470  */
 471 void ia64_process_pending_intr(void)
 472 {
 473         ia64_vector vector;
 474         unsigned long saved_tpr;
 475         extern unsigned int vectors_in_migration[NR_IRQS];
 476
 477         vector = ia64_get_ivr();
 478
 479          irq_enter();
 480          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 481          ia64_srlz_d();
 482
 483          /*
 484           * Perform normal interrupt style processing
 485           */
 486         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 487                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 488                         smp_local_flush_tlb();
 489                         kstat_this_cpu.irqs[vector]++;
 490                 } else if (unlikely(IS_RESCHEDULE(vector)))
 491                         kstat_this_cpu.irqs[vector]++;
 492                 else {
 493                         struct pt_regs *old_regs = set_irq_regs(NULL);
 494                         int irq = local_vector_to_irq(vector);
 495
 496                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 497                         ia64_srlz_d();
 498
 499                         /*
 500                          * Now try calling normal ia64_handle_irq as it would have got called
 501                          * from a real intr handler. Try passing null for pt_regs, hopefully
 502                          * it will work. I hope it works!.
 503                          * Probably could shared code.
 504                          */
 505                         if (unlikely(irq < 0)) {
 506                                 printk(KERN_ERR "%s: Unexpected interrupt "
 507                                        "vector %d on CPU %d not being mapped "
 508                                        "to any IRQ!!\n", __FUNCTION__, vector,
 509                                        smp_processor_id());
 510                         } else {
 511                                 vectors_in_migration[irq]=0;
 512                                 generic_handle_irq(irq);
 513                         }
 514                         set_irq_regs(old_regs);
 515
 516                         /*
 517                          * Disable interrupts and send EOI
 518                          */
 519                         local_irq_disable();
 520                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 521                 }
 522                 ia64_eoi();
 523                 vector = ia64_get_ivr();
 524         }
 525         irq_exit();
 526 }
 527 #endif
 528
 529
 530 #ifdef CONFIG_SMP
 531
 532 static irqreturn_t dummy_handler (int irq, void *dev_id)
 533 {
 534         BUG();
 535 }
 536 extern irqreturn_t handle_IPI (int irq, void *dev_id);
 537
 538 static struct irqaction ipi_irqaction = {
 539         .handler =      handle_IPI,
 540         .flags =        IRQF_DISABLED,
 541         .name =         "IPI"
 542 };
 543
 544 static struct irqaction resched_irqaction = {
 545         .handler =      dummy_handler,
 546         .flags =        IRQF_DISABLED,
 547         .name =         "resched"
 548 };
 549
 550 static struct irqaction tlb_irqaction = {
 551         .handler =      dummy_handler,
 552         .flags =        IRQF_DISABLED,
 553         .name =         "tlb_flush"
 554 };
 555
 556 #endif
 557
 558 void
 559 register_percpu_irq (ia64_vector vec, struct irqaction *action)
 560 {
 561         irq_desc_t *desc;
 562         unsigned int irq;
 563
 564         irq = vec;
 565         BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
 566         desc = irq_desc + irq;
 567         desc->status |= IRQ_PER_CPU;
 568         desc->chip = &irq_type_ia64_lsapic;
 569         if (action)
 570                 setup_irq(irq, action);
 571 }
 572
 573 void __init
 574 init_IRQ (void)
 575 {
 576         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 577 #ifdef CONFIG_SMP
 578         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 579         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 580         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 581 #endif
 582 #ifdef CONFIG_PERFMON
 583         pfm_init_percpu();
 584 #endif
 585         platform_irq_init();
 586 }
 587
 588 void
 589 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 590 {
 591         void __iomem *ipi_addr;
 592         unsigned long ipi_data;
 593         unsigned long phys_cpu_id;
 594
 595 #ifdef CONFIG_SMP
 596         phys_cpu_id = cpu_physical_id(cpu);
 597 #else
 598         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
 599 #endif
 600
 601         /*
 602          * cpu number is in 8bit ID and 8bit EID
 603          */
 604
 605         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 606         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 607
 608         writeq(ipi_data, ipi_addr);
 609 }