IB/mthca: Use correct GID in MADs sent on port 2
[sfrench/cifs-2.6.git] / arch / i386 / kernel / quirks.c
1 /*
2  * This file contains work-arounds for x86 and x86_64 platform bugs.
3  */
4 #include <linux/config.h>
5 #include <linux/pci.h>
6 #include <linux/irq.h>
7
8 #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
9
10 static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
11 {
12         u8 config, rev;
13         u32 word;
14
15         /* BIOS may enable hardware IRQ balancing for
16          * E7520/E7320/E7525(revision ID 0x9 and below)
17          * based platforms.
18          * Disable SW irqbalance/affinity on those platforms.
19          */
20         pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
21         if (rev > 0x9)
22                 return;
23
24         printk(KERN_INFO "Intel E7520/7320/7525 detected.");
25
26         /* enable access to config space*/
27         pci_read_config_byte(dev, 0xf4, &config);
28         config |= 0x2;
29         pci_write_config_byte(dev, 0xf4, config);
30
31         /* read xTPR register */
32         raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
33
34         if (!(word & (1 << 13))) {
35                 printk(KERN_INFO "Disabling irq balancing and affinity\n");
36 #ifdef CONFIG_IRQBALANCE
37                 irqbalance_disable("");
38 #endif
39                 noirqdebug_setup("");
40 #ifdef CONFIG_PROC_FS
41                 no_irq_affinity = 1;
42 #endif
43         }
44
45         config &= ~0x2;
46         /* disable access to config space*/
47         pci_write_config_byte(dev, 0xf4, config);
48 }
49 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7320_MCH,  quirk_intel_irqbalance);
50 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7525_MCH,  quirk_intel_irqbalance);
51 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7520_MCH,  quirk_intel_irqbalance);
52 #endif