1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/module.h>
4 #include <linux/init.h>
5 #include <linux/kernel.h>
7 #include <linux/sched.h>
8 #include <linux/kernel_stat.h>
9 #include <linux/notifier.h>
10 #include <linux/cpu.h>
11 #include <linux/percpu.h>
12 #include <linux/delay.h>
13 #include <linux/err.h>
14 #include <linux/irq.h>
15 #include <linux/irqdomain.h>
17 #include <linux/sched/task_stack.h>
18 #include <linux/sched/mm.h>
20 #include <asm/traps.h>
21 #include <asm/sections.h>
22 #include <asm/mmu_context.h>
23 #include <asm/pgalloc.h>
25 struct ipi_data_struct {
26 unsigned long bits ____cacheline_aligned;
28 static DEFINE_PER_CPU(struct ipi_data_struct, ipi_data);
30 enum ipi_message_type {
37 static irqreturn_t handle_ipi(int irq, void *dev)
42 ops = xchg(&this_cpu_ptr(&ipi_data)->bits, 0);
46 if (ops & (1 << IPI_RESCHEDULE))
49 if (ops & (1 << IPI_CALL_FUNC))
50 generic_smp_call_function_interrupt();
52 BUG_ON((ops >> IPI_MAX) != 0);
58 static void (*send_arch_ipi)(const struct cpumask *mask);
61 void __init set_send_ipi(void (*func)(const struct cpumask *mask), int irq)
71 send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
75 for_each_cpu(i, to_whom)
76 set_bit(operation, &per_cpu_ptr(&ipi_data, i)->bits);
79 send_arch_ipi(to_whom);
82 void arch_send_call_function_ipi_mask(struct cpumask *mask)
84 send_ipi_message(mask, IPI_CALL_FUNC);
87 void arch_send_call_function_single_ipi(int cpu)
89 send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
92 static void ipi_stop(void *unused)
97 void smp_send_stop(void)
99 on_each_cpu(ipi_stop, NULL, 1);
102 void smp_send_reschedule(int cpu)
104 send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
107 void __init smp_prepare_boot_cpu(void)
111 void __init smp_prepare_cpus(unsigned int max_cpus)
115 static void __init enable_smp_ipi(void)
117 enable_percpu_irq(ipi_irq, 0);
120 static int ipi_dummy_dev;
121 void __init setup_smp_ipi(void)
126 panic("%s IRQ mapping failed\n", __func__);
128 rc = request_percpu_irq(ipi_irq, handle_ipi, "IPI Interrupt",
131 panic("%s IRQ request failed\n", __func__);
136 void __init setup_smp(void)
138 struct device_node *node = NULL;
141 while ((node = of_find_node_by_type(node, "cpu"))) {
142 if (!of_device_is_available(node))
145 if (of_property_read_u32(node, "reg", &cpu))
151 set_cpu_possible(cpu, true);
152 set_cpu_present(cpu, true);
156 extern void _start_smp_secondary(void);
158 volatile unsigned int secondary_hint;
159 volatile unsigned int secondary_ccr;
160 volatile unsigned int secondary_stack;
162 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
166 secondary_stack = (unsigned int)tidle->stack + THREAD_SIZE;
168 secondary_hint = mfcr("cr31");
170 secondary_ccr = mfcr("cr18");
173 * Because other CPUs are in reset status, we must flush data
174 * from cache to out and secondary CPUs use them in
175 * csky_start_secondary(void)
179 /* Enable cpu in SMP reset ctrl reg */
180 tmp = mfcr("cr<29, 0>");
182 mtcr("cr<29, 0>", tmp);
184 /* Wait for the cpu online */
185 while (!cpu_online(cpu));
192 void __init smp_cpus_done(unsigned int max_cpus)
196 int setup_profiling_timer(unsigned int multiplier)
201 void csky_start_secondary(void)
203 struct mm_struct *mm = &init_mm;
204 unsigned int cpu = smp_processor_id();
206 mtcr("cr31", secondary_hint);
207 mtcr("cr18", secondary_ccr);
209 mtcr("vbr", vec_base);
212 write_mmu_pagemask(0);
213 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir);
214 TLBMISS_HANDLER_SETUP_PGD_KERNEL(swapper_pg_dir);
216 asid_cache(smp_processor_id()) = ASID_FIRST_VERSION;
218 #ifdef CONFIG_CPU_HAS_FPU
226 current->active_mm = mm;
227 cpumask_set_cpu(cpu, mm_cpumask(mm));
229 notify_cpu_starting(cpu);
230 set_cpu_online(cpu, true);
232 pr_info("CPU%u Online: %s...\n", cpu, __func__);
236 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);