3 select ARCH_HAS_SYNC_DMA_FOR_CPU
4 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5 select ARCH_USE_BUILTIN_BSWAP
6 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
11 select DMA_NONCOHERENT_OPS
13 select HANDLE_DOMAIN_IRQ
14 select DW_APB_TIMER_OF
15 select GENERIC_LIB_ASHLDI3
16 select GENERIC_LIB_ASHRDI3
17 select GENERIC_LIB_LSHRDI3
18 select GENERIC_LIB_MULDI3
19 select GENERIC_LIB_CMPDI2
20 select GENERIC_LIB_UCMPDI2
21 select GENERIC_ALLOCATOR
22 select GENERIC_ATOMIC64
23 select GENERIC_CLOCKEVENTS
24 select GENERIC_CPU_DEVICES
25 select GENERIC_IRQ_CHIP
26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
28 select GENERIC_IRQ_MULTI_HANDLER
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_FUNCTION_TRACER
33 select HAVE_FUNCTION_GRAPH_TRACER
34 select HAVE_GENERIC_DMA_COHERENT
35 select HAVE_KERNEL_GZIP
36 select HAVE_KERNEL_LZO
37 select HAVE_KERNEL_LZMA
38 select HAVE_PERF_EVENTS
39 select HAVE_C_RECORDMCOUNT
40 select HAVE_DMA_API_DEBUG
41 select HAVE_DMA_CONTIGUOUS
42 select MAY_HAVE_SPARSE_IRQ
43 select MODULES_USE_ELF_RELA if MODULES
45 select OF_EARLY_FLATTREE
46 select OF_RESERVED_MEM
47 select PERF_USE_VMALLOC if CPU_CK610
50 select USB_ARCH_HAS_EHCI
51 select USB_ARCH_HAS_OHCI
53 config CPU_HAS_CACHEV2
68 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
70 config CPU_NEED_TLBSYNC
73 config CPU_NEED_SOFTALIGN
76 config CPU_NO_USER_BKPT
79 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
80 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
81 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
82 instruction exception.
83 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
85 config GENERIC_CALIBRATE_DELAY
91 config GENERIC_HWEIGHT
97 config RWSEM_GENERIC_SPINLOCK
100 config STACKTRACE_SUPPORT
106 config TRACE_IRQFLAGS_SUPPORT
111 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
112 default "1024" if (CPU_CK860)
116 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
117 default "12" if (CPU_CK860)
119 config L1_CACHE_SHIFT
121 default "4" if (CPU_CK610)
122 default "5" if (CPU_CK807 || CPU_CK810)
123 default "6" if (CPU_CK860)
125 menu "Processor type and features"
132 bool "CSKY CPU ck610"
133 select CPU_NEED_TLBSYNC
134 select CPU_NEED_SOFTALIGN
135 select CPU_NO_USER_BKPT
138 bool "CSKY CPU ck810"
140 select CPU_NEED_TLBSYNC
143 bool "CSKY CPU ck807"
147 bool "CSKY CPU ck860"
149 select CPU_HAS_CACHEV2
150 select CPU_HAS_LDSTEX
155 prompt "C-SKY PMU type"
156 depends on PERF_EVENTS
157 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
163 bool "Performance Monitoring Unit Ver.1"
168 prompt "Power Manager Instruction (wait/doze/stop)"
185 bool "CPU has VDSP coprocessor"
186 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
189 bool "CPU has FPU coprocessor"
190 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
193 bool "CPU has Trusted Execution Environment"
197 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
202 int "Maximum number of CPUs (2-32)"
208 bool "High Memory Support"
209 depends on !CPU_CK610
212 config FORCE_MAX_ZONEORDER
213 int "Maximum zone order"
217 hex "DRAM start addr (the same with memory-section in dts)"
221 bool "Support for hot-pluggable CPUs"
222 select GENERIC_IRQ_MIGRATION
225 Say Y here to allow turning CPUs off and on. CPUs can be
226 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
228 Say N if you want to disable CPU hotplug.
231 source "kernel/Kconfig.hz"