Merge branch 'akpm' (patches from Andrew)
[sfrench/cifs-2.6.git] / arch / csky / Kconfig
1 config CSKY
2         def_bool y
3         select ARCH_HAS_SYNC_DMA_FOR_CPU
4         select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5         select ARCH_USE_BUILTIN_BSWAP
6         select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
7         select COMMON_CLK
8         select CLKSRC_MMIO
9         select CLKSRC_OF
10         select DMA_DIRECT_REMAP
11         select IRQ_DOMAIN
12         select HANDLE_DOMAIN_IRQ
13         select DW_APB_TIMER_OF
14         select GENERIC_LIB_ASHLDI3
15         select GENERIC_LIB_ASHRDI3
16         select GENERIC_LIB_LSHRDI3
17         select GENERIC_LIB_MULDI3
18         select GENERIC_LIB_CMPDI2
19         select GENERIC_LIB_UCMPDI2
20         select GENERIC_ALLOCATOR
21         select GENERIC_ATOMIC64
22         select GENERIC_CLOCKEVENTS
23         select GENERIC_CPU_DEVICES
24         select GENERIC_IRQ_CHIP
25         select GENERIC_IRQ_PROBE
26         select GENERIC_IRQ_SHOW
27         select GENERIC_IRQ_MULTI_HANDLER
28         select GENERIC_SCHED_CLOCK
29         select GENERIC_SMP_IDLE_THREAD
30         select HAVE_ARCH_TRACEHOOK
31         select HAVE_GENERIC_DMA_COHERENT
32         select HAVE_KERNEL_GZIP
33         select HAVE_KERNEL_LZO
34         select HAVE_KERNEL_LZMA
35         select HAVE_C_RECORDMCOUNT
36         select HAVE_DMA_API_DEBUG
37         select HAVE_DMA_CONTIGUOUS
38         select MAY_HAVE_SPARSE_IRQ
39         select MODULES_USE_ELF_RELA if MODULES
40         select OF
41         select OF_EARLY_FLATTREE
42         select OF_RESERVED_MEM
43         select PERF_USE_VMALLOC
44         select RTC_LIB
45         select TIMER_OF
46         select USB_ARCH_HAS_EHCI
47         select USB_ARCH_HAS_OHCI
48
49 config CPU_HAS_CACHEV2
50         bool
51
52 config CPU_HAS_FPUV2
53         bool
54
55 config CPU_HAS_HILO
56         bool
57
58 config CPU_HAS_TLBI
59         bool
60
61 config CPU_HAS_LDSTEX
62         bool
63         help
64           For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
65
66 config CPU_NEED_TLBSYNC
67         bool
68
69 config CPU_NEED_SOFTALIGN
70         bool
71
72 config CPU_NO_USER_BKPT
73         bool
74         help
75           For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
76           abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
77           So we need a 16bit instruction as user space bkpt, and it will cause an illegal
78           instruction exception.
79           In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
80
81 config GENERIC_CALIBRATE_DELAY
82         def_bool y
83
84 config GENERIC_CSUM
85         def_bool y
86
87 config GENERIC_HWEIGHT
88         def_bool y
89
90 config MMU
91         def_bool y
92
93 config RWSEM_GENERIC_SPINLOCK
94         def_bool y
95
96 config TIME_LOW_RES
97         def_bool y
98
99 config TRACE_IRQFLAGS_SUPPORT
100         def_bool y
101
102 config CPU_TLB_SIZE
103         int
104         default "128"   if (CPU_CK610 || CPU_CK807 || CPU_CK810)
105         default "1024"  if (CPU_CK860)
106
107 config CPU_ASID_BITS
108         int
109         default "8"     if (CPU_CK610 || CPU_CK807 || CPU_CK810)
110         default "12"    if (CPU_CK860)
111
112 config L1_CACHE_SHIFT
113         int
114         default "4"     if (CPU_CK610)
115         default "5"     if (CPU_CK807 || CPU_CK810)
116         default "6"     if (CPU_CK860)
117
118 menu "Processor type and features"
119
120 choice
121         prompt "CPU MODEL"
122         default CPU_CK807
123
124 config CPU_CK610
125         bool "CSKY CPU ck610"
126         select CPU_NEED_TLBSYNC
127         select CPU_NEED_SOFTALIGN
128         select CPU_NO_USER_BKPT
129
130 config CPU_CK810
131         bool "CSKY CPU ck810"
132         select CPU_HAS_HILO
133         select CPU_NEED_TLBSYNC
134
135 config CPU_CK807
136         bool "CSKY CPU ck807"
137         select CPU_HAS_HILO
138
139 config CPU_CK860
140         bool "CSKY CPU ck860"
141         select CPU_HAS_TLBI
142         select CPU_HAS_CACHEV2
143         select CPU_HAS_LDSTEX
144         select CPU_HAS_FPUV2
145 endchoice
146
147 choice
148         prompt "Power Manager Instruction (wait/doze/stop)"
149         default CPU_PM_NONE
150
151 config CPU_PM_NONE
152         bool "None"
153
154 config CPU_PM_WAIT
155         bool "wait"
156
157 config CPU_PM_DOZE
158         bool "doze"
159
160 config CPU_PM_STOP
161         bool "stop"
162 endchoice
163
164 config CPU_HAS_VDSP
165         bool "CPU has VDSP coprocessor"
166         depends on CPU_HAS_FPU && CPU_HAS_FPUV2
167
168 config CPU_HAS_FPU
169         bool "CPU has FPU coprocessor"
170         depends on CPU_CK807 || CPU_CK810 || CPU_CK860
171
172 config CPU_HAS_TEE
173         bool "CPU has Trusted Execution Environment"
174         depends on CPU_CK810
175
176 config SMP
177         bool "Symmetric Multi-Processing (SMP) support for C-SKY"
178         depends on CPU_CK860
179         default n
180
181 config NR_CPUS
182         int "Maximum number of CPUs (2-32)"
183         range 2 32
184         depends on SMP
185         default "2"
186
187 config HIGHMEM
188         bool "High Memory Support"
189         depends on !CPU_CK610
190         default y
191
192 config FORCE_MAX_ZONEORDER
193         int "Maximum zone order"
194         default "11"
195
196 config RAM_BASE
197         hex "DRAM start addr (the same with memory-section in dts)"
198         default 0x0
199
200 endmenu
201
202 source "kernel/Kconfig.hz"