Merge branch 'perf/urgent' into perf/core, to resolve a conflict
[sfrench/cifs-2.6.git] / arch / cris / include / uapi / asm / elf_v32.h
1 #ifndef _ASM_CRIS_ELF_H
2 #define _ASM_CRIS_ELF_H
3
4 #define ELF_CORE_EFLAGS EF_CRIS_VARIANT_V32
5
6 /* Matches struct user_regs_struct */
7 #define ELF_NGREG 32
8
9 /*
10  * This is used to ensure we don't load something for the wrong architecture.
11  */
12 #define elf_check_arch(x)                       \
13  ((x)->e_machine == EM_CRIS                     \
14   && ((((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_V32     \
15       || (((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_COMMON_V10_V32))))
16
17 /* CRISv32 ELF register definitions. */
18
19 #include <asm/ptrace.h>
20
21 /* Explicitly zero out registers to increase determinism. */
22 #define ELF_PLAT_INIT(_r, load_addr)    do { \
23         (_r)->r13 = 0; (_r)->r12 = 0; (_r)->r11 = 0; (_r)->r10 = 0; \
24         (_r)->r9 = 0;  (_r)->r8 = 0;  (_r)->r7 = 0;  (_r)->r6 = 0;  \
25         (_r)->r5 = 0;  (_r)->r4 = 0;  (_r)->r3 = 0;  (_r)->r2 = 0;  \
26         (_r)->r1 = 0;  (_r)->r0 = 0;  (_r)->mof = 0; (_r)->srp = 0; \
27         (_r)->acr = 0; \
28 } while (0)
29
30 /*
31  * An executable for which elf_read_implies_exec() returns TRUE will
32  * have the READ_IMPLIES_EXEC personality flag set automatically.
33  */
34 #define elf_read_implies_exec_binary(ex, have_pt_gnu_stack)     (!(have_pt_gnu_stack))
35
36 /*
37  * This is basically a pt_regs with the additional definition
38  * of the stack pointer since it's needed in a core dump.
39  * pr_regs is a elf_gregset_t and should be filled according
40  * to the layout of user_regs_struct.
41  */
42 #define ELF_CORE_COPY_REGS(pr_reg, regs)                   \
43         pr_reg[0] = regs->r0;                              \
44         pr_reg[1] = regs->r1;                              \
45         pr_reg[2] = regs->r2;                              \
46         pr_reg[3] = regs->r3;                              \
47         pr_reg[4] = regs->r4;                              \
48         pr_reg[5] = regs->r5;                              \
49         pr_reg[6] = regs->r6;                              \
50         pr_reg[7] = regs->r7;                              \
51         pr_reg[8] = regs->r8;                              \
52         pr_reg[9] = regs->r9;                              \
53         pr_reg[10] = regs->r10;                            \
54         pr_reg[11] = regs->r11;                            \
55         pr_reg[12] = regs->r12;                            \
56         pr_reg[13] = regs->r13;                            \
57         pr_reg[14] = rdusp();               /* SP */       \
58         pr_reg[15] = regs->acr;             /* ACR */      \
59         pr_reg[16] = 0;                     /* BZ */       \
60         pr_reg[17] = rdvr();                /* VR */       \
61         pr_reg[18] = 0;                     /* PID */      \
62         pr_reg[19] = regs->srs;             /* SRS */      \
63         pr_reg[20] = 0;                     /* WZ */       \
64         pr_reg[21] = regs->exs;             /* EXS */      \
65         pr_reg[22] = regs->eda;             /* EDA */      \
66         pr_reg[23] = regs->mof;             /* MOF */      \
67         pr_reg[24] = 0;                     /* DZ */       \
68         pr_reg[25] = 0;                     /* EBP */      \
69         pr_reg[26] = regs->erp;             /* ERP */      \
70         pr_reg[27] = regs->srp;             /* SRP */      \
71         pr_reg[28] = 0;                     /* NRP */      \
72         pr_reg[29] = regs->ccs;             /* CCS */      \
73         pr_reg[30] = rdusp();               /* USP */      \
74         pr_reg[31] = regs->spc;             /* SPC */      \
75
76 #endif /* _ASM_CRIS_ELF_H */