arch/c6x/kernel/setup.c

   1 /*
   2  *  Port on Texas Instruments TMS320C6x architecture
   3  *
   4  *  Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
   5  *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2 as
   9  *  published by the Free Software Foundation.
  10  */
  11 #include <linux/dma-mapping.h>
  12 #include <linux/memblock.h>
  13 #include <linux/seq_file.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/clkdev.h>
  16 #include <linux/initrd.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/of_fdt.h>
  20 #include <linux/string.h>
  21 #include <linux/errno.h>
  22 #include <linux/cache.h>
  23 #include <linux/delay.h>
  24 #include <linux/sched.h>
  25 #include <linux/clk.h>
  26 #include <linux/cpu.h>
  27 #include <linux/fs.h>
  28 #include <linux/of.h>
  29 #include <linux/console.h>
  30 #include <linux/screen_info.h>
  31
  32 #include <asm/sections.h>
  33 #include <asm/div64.h>
  34 #include <asm/setup.h>
  35 #include <asm/dscr.h>
  36 #include <asm/clock.h>
  37 #include <asm/soc.h>
  38 #include <asm/special_insns.h>
  39
  40 static const char *c6x_soc_name;
  41
  42 struct screen_info screen_info;
  43
  44 int c6x_num_cores;
  45 EXPORT_SYMBOL_GPL(c6x_num_cores);
  46
  47 unsigned int c6x_silicon_rev;
  48 EXPORT_SYMBOL_GPL(c6x_silicon_rev);
  49
  50 /*
  51  * Device status register. This holds information
  52  * about device configuration needed by some drivers.
  53  */
  54 unsigned int c6x_devstat;
  55 EXPORT_SYMBOL_GPL(c6x_devstat);
  56
  57 /*
  58  * Some SoCs have fuse registers holding a unique MAC
  59  * address. This is parsed out of the device tree with
  60  * the resulting MAC being held here.
  61  */
  62 unsigned char c6x_fuse_mac[6];
  63
  64 unsigned long memory_start;
  65 unsigned long memory_end;
  66 EXPORT_SYMBOL(memory_end);
  67
  68 unsigned long ram_start;
  69 unsigned long ram_end;
  70
  71 /* Uncached memory for DMA consistent use (memdma=) */
  72 static unsigned long dma_start __initdata;
  73 static unsigned long dma_size __initdata;
  74
  75 struct cpuinfo_c6x {
  76         const char *cpu_name;
  77         const char *cpu_voltage;
  78         const char *mmu;
  79         const char *fpu;
  80         char *cpu_rev;
  81         unsigned int core_id;
  82         char __cpu_rev[5];
  83 };
  84
  85 static DEFINE_PER_CPU(struct cpuinfo_c6x, cpu_data);
  86
  87 unsigned int ticks_per_ns_scaled;
  88 EXPORT_SYMBOL(ticks_per_ns_scaled);
  89
  90 unsigned int c6x_core_freq;
  91
  92 static void __init get_cpuinfo(void)
  93 {
  94         unsigned cpu_id, rev_id, csr;
  95         struct clk *coreclk = clk_get_sys(NULL, "core");
  96         unsigned long core_khz;
  97         u64 tmp;
  98         struct cpuinfo_c6x *p;
  99         struct device_node *node;
 100
 101         p = &per_cpu(cpu_data, smp_processor_id());
 102
 103         if (!IS_ERR(coreclk))
 104                 c6x_core_freq = clk_get_rate(coreclk);
 105         else {
 106                 printk(KERN_WARNING
 107                        "Cannot find core clock frequency. Using 700MHz\n");
 108                 c6x_core_freq = 700000000;
 109         }
 110
 111         core_khz = c6x_core_freq / 1000;
 112
 113         tmp = (uint64_t)core_khz << C6X_NDELAY_SCALE;
 114         do_div(tmp, 1000000);
 115         ticks_per_ns_scaled = tmp;
 116
 117         csr = get_creg(CSR);
 118         cpu_id = csr >> 24;
 119         rev_id = (csr >> 16) & 0xff;
 120
 121         p->mmu = "none";
 122         p->fpu = "none";
 123         p->cpu_voltage = "unknown";
 124
 125         switch (cpu_id) {
 126         case 0:
 127                 p->cpu_name = "C67x";
 128                 p->fpu = "yes";
 129                 break;
 130         case 2:
 131                 p->cpu_name = "C62x";
 132                 break;
 133         case 8:
 134                 p->cpu_name = "C64x";
 135                 break;
 136         case 12:
 137                 p->cpu_name = "C64x";
 138                 break;
 139         case 16:
 140                 p->cpu_name = "C64x+";
 141                 p->cpu_voltage = "1.2";
 142                 break;
 143         case 21:
 144                 p->cpu_name = "C66X";
 145                 p->cpu_voltage = "1.2";
 146                 break;
 147         default:
 148                 p->cpu_name = "unknown";
 149                 break;
 150         }
 151
 152         if (cpu_id < 16) {
 153                 switch (rev_id) {
 154                 case 0x1:
 155                         if (cpu_id > 8) {
 156                                 p->cpu_rev = "DM640/DM641/DM642/DM643";
 157                                 p->cpu_voltage = "1.2 - 1.4";
 158                         } else {
 159                                 p->cpu_rev = "C6201";
 160                                 p->cpu_voltage = "2.5";
 161                         }
 162                         break;
 163                 case 0x2:
 164                         p->cpu_rev = "C6201B/C6202/C6211";
 165                         p->cpu_voltage = "1.8";
 166                         break;
 167                 case 0x3:
 168                         p->cpu_rev = "C6202B/C6203/C6204/C6205";
 169                         p->cpu_voltage = "1.5";
 170                         break;
 171                 case 0x201:
 172                         p->cpu_rev = "C6701 revision 0 (early CPU)";
 173                         p->cpu_voltage = "1.8";
 174                         break;
 175                 case 0x202:
 176                         p->cpu_rev = "C6701/C6711/C6712";
 177                         p->cpu_voltage = "1.8";
 178                         break;
 179                 case 0x801:
 180                         p->cpu_rev = "C64x";
 181                         p->cpu_voltage = "1.5";
 182                         break;
 183                 default:
 184                         p->cpu_rev = "unknown";
 185                 }
 186         } else {
 187                 p->cpu_rev = p->__cpu_rev;
 188                 snprintf(p->__cpu_rev, sizeof(p->__cpu_rev), "0x%x", cpu_id);
 189         }
 190
 191         p->core_id = get_coreid();
 192
 193         for_each_of_cpu_node(node)
 194                 ++c6x_num_cores;
 195
 196         node = of_find_node_by_name(NULL, "soc");
 197         if (node) {
 198                 if (of_property_read_string(node, "model", &c6x_soc_name))
 199                         c6x_soc_name = "unknown";
 200                 of_node_put(node);
 201         } else
 202                 c6x_soc_name = "unknown";
 203
 204         printk(KERN_INFO "CPU%d: %s rev %s, %s volts, %uMHz\n",
 205                p->core_id, p->cpu_name, p->cpu_rev,
 206                p->cpu_voltage, c6x_core_freq / 1000000);
 207 }
 208
 209 /*
 210  * Early parsing of the command line
 211  */
 212 static u32 mem_size __initdata;
 213
 214 /* "mem=" parsing. */
 215 static int __init early_mem(char *p)
 216 {
 217         if (!p)
 218                 return -EINVAL;
 219
 220         mem_size = memparse(p, &p);
 221         /* don't remove all of memory when handling "mem={invalid}" */
 222         if (mem_size == 0)
 223                 return -EINVAL;
 224
 225         return 0;
 226 }
 227 early_param("mem", early_mem);
 228
 229 /* "memdma=<size>[@<address>]" parsing. */
 230 static int __init early_memdma(char *p)
 231 {
 232         if (!p)
 233                 return -EINVAL;
 234
 235         dma_size = memparse(p, &p);
 236         if (*p == '@')
 237                 dma_start = memparse(p, &p);
 238
 239         return 0;
 240 }
 241 early_param("memdma", early_memdma);
 242
 243 int __init c6x_add_memory(phys_addr_t start, unsigned long size)
 244 {
 245         static int ram_found __initdata;
 246
 247         /* We only handle one bank (the one with PAGE_OFFSET) for now */
 248         if (ram_found)
 249                 return -EINVAL;
 250
 251         if (start > PAGE_OFFSET || PAGE_OFFSET >= (start + size))
 252                 return 0;
 253
 254         ram_start = start;
 255         ram_end = start + size;
 256
 257         ram_found = 1;
 258         return 0;
 259 }
 260
 261 /*
 262  * Do early machine setup and device tree parsing. This is called very
 263  * early on the boot process.
 264  */
 265 notrace void __init machine_init(unsigned long dt_ptr)
 266 {
 267         void *dtb = __va(dt_ptr);
 268         void *fdt = __dtb_start;
 269
 270         /* interrupts must be masked */
 271         set_creg(IER, 2);
 272
 273         /*
 274          * Set the Interrupt Service Table (IST) to the beginning of the
 275          * vector table.
 276          */
 277         set_ist(_vectors_start);
 278
 279         /*
 280          * dtb is passed in from bootloader.
 281          * fdt is linked in blob.
 282          */
 283         if (dtb && dtb != fdt)
 284                 fdt = dtb;
 285
 286         /* Do some early initialization based on the flat device tree */
 287         early_init_dt_scan(fdt);
 288
 289         parse_early_param();
 290 }
 291
 292 void __init setup_arch(char **cmdline_p)
 293 {
 294         int bootmap_size;
 295         struct memblock_region *reg;
 296
 297         printk(KERN_INFO "Initializing kernel\n");
 298
 299         /* Initialize command line */
 300         *cmdline_p = boot_command_line;
 301
 302         memory_end = ram_end;
 303         memory_end &= ~(PAGE_SIZE - 1);
 304
 305         if (mem_size && (PAGE_OFFSET + PAGE_ALIGN(mem_size)) < memory_end)
 306                 memory_end = PAGE_OFFSET + PAGE_ALIGN(mem_size);
 307
 308         /* add block that this kernel can use */
 309         memblock_add(PAGE_OFFSET, memory_end - PAGE_OFFSET);
 310
 311         /* reserve kernel text/data/bss */
 312         memblock_reserve(PAGE_OFFSET,
 313                          PAGE_ALIGN((unsigned long)&_end - PAGE_OFFSET));
 314
 315         if (dma_size) {
 316                 /* align to cacheability granularity */
 317                 dma_size = CACHE_REGION_END(dma_size);
 318
 319                 if (!dma_start)
 320                         dma_start = memory_end - dma_size;
 321
 322                 /* align to cacheability granularity */
 323                 dma_start = CACHE_REGION_START(dma_start);
 324
 325                 /* reserve DMA memory taken from kernel memory */
 326                 if (memblock_is_region_memory(dma_start, dma_size))
 327                         memblock_reserve(dma_start, dma_size);
 328         }
 329
 330         memory_start = PAGE_ALIGN((unsigned int) &_end);
 331
 332         printk(KERN_INFO "Memory Start=%08lx, Memory End=%08lx\n",
 333                memory_start, memory_end);
 334
 335 #ifdef CONFIG_BLK_DEV_INITRD
 336         /*
 337          * Reserve initrd memory if in kernel memory.
 338          */
 339         if (initrd_start < initrd_end)
 340                 if (memblock_is_region_memory(initrd_start,
 341                                               initrd_end - initrd_start))
 342                         memblock_reserve(initrd_start,
 343                                          initrd_end - initrd_start);
 344 #endif
 345
 346         init_mm.start_code = (unsigned long) &_stext;
 347         init_mm.end_code   = (unsigned long) &_etext;
 348         init_mm.end_data   = memory_start;
 349         init_mm.brk        = memory_start;
 350
 351         /*
 352          * Give all the memory to the bootmap allocator,  tell it to put the
 353          * boot mem_map at the start of memory
 354          */
 355         bootmap_size = init_bootmem_node(NODE_DATA(0),
 356                                          memory_start >> PAGE_SHIFT,
 357                                          PAGE_OFFSET >> PAGE_SHIFT,
 358                                          memory_end >> PAGE_SHIFT);
 359         memblock_reserve(memory_start, bootmap_size);
 360
 361         unflatten_and_copy_device_tree();
 362
 363         c6x_cache_init();
 364
 365         /* Set the whole external memory as non-cacheable */
 366         disable_caching(ram_start, ram_end - 1);
 367
 368         /* Set caching of external RAM used by Linux */
 369         for_each_memblock(memory, reg)
 370                 enable_caching(CACHE_REGION_START(reg->base),
 371                                CACHE_REGION_START(reg->base + reg->size - 1));
 372
 373 #ifdef CONFIG_BLK_DEV_INITRD
 374         /*
 375          * Enable caching for initrd which falls outside kernel memory.
 376          */
 377         if (initrd_start < initrd_end) {
 378                 if (!memblock_is_region_memory(initrd_start,
 379                                                initrd_end - initrd_start))
 380                         enable_caching(CACHE_REGION_START(initrd_start),
 381                                        CACHE_REGION_START(initrd_end - 1));
 382         }
 383 #endif
 384
 385         /*
 386          * Disable caching for dma coherent memory taken from kernel memory.
 387          */
 388         if (dma_size && memblock_is_region_memory(dma_start, dma_size))
 389                 disable_caching(dma_start,
 390                                 CACHE_REGION_START(dma_start + dma_size - 1));
 391
 392         /* Initialize the coherent memory allocator */
 393         coherent_mem_init(dma_start, dma_size);
 394
 395         /*
 396          * Free all memory as a starting point.
 397          */
 398         free_bootmem(PAGE_OFFSET, memory_end - PAGE_OFFSET);
 399
 400         /*
 401          * Then reserve memory which is already being used.
 402          */
 403         for_each_memblock(reserved, reg) {
 404                 pr_debug("reserved - 0x%08x-0x%08x\n",
 405                          (u32) reg->base, (u32) reg->size);
 406                 reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
 407         }
 408
 409         max_low_pfn = PFN_DOWN(memory_end);
 410         min_low_pfn = PFN_UP(memory_start);
 411         max_mapnr = max_low_pfn - min_low_pfn;
 412
 413         /* Get kmalloc into gear */
 414         paging_init();
 415
 416         /*
 417          * Probe for Device State Configuration Registers.
 418          * We have to do this early in case timer needs to be enabled
 419          * through DSCR.
 420          */
 421         dscr_probe();
 422
 423         /* We do this early for timer and core clock frequency */
 424         c64x_setup_clocks();
 425
 426         /* Get CPU info */
 427         get_cpuinfo();
 428
 429 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 430         conswitchp = &dummy_con;
 431 #endif
 432 }
 433
 434 #define cpu_to_ptr(n) ((void *)((long)(n)+1))
 435 #define ptr_to_cpu(p) ((long)(p) - 1)
 436
 437 static int show_cpuinfo(struct seq_file *m, void *v)
 438 {
 439         int n = ptr_to_cpu(v);
 440         struct cpuinfo_c6x *p = &per_cpu(cpu_data, n);
 441
 442         if (n == 0) {
 443                 seq_printf(m,
 444                            "soc\t\t: %s\n"
 445                            "soc revision\t: 0x%x\n"
 446                            "soc cores\t: %d\n",
 447                            c6x_soc_name, c6x_silicon_rev, c6x_num_cores);
 448         }
 449
 450         seq_printf(m,
 451                    "\n"
 452                    "processor\t: %d\n"
 453                    "cpu\t\t: %s\n"
 454                    "core revision\t: %s\n"
 455                    "core voltage\t: %s\n"
 456                    "core id\t\t: %d\n"
 457                    "mmu\t\t: %s\n"
 458                    "fpu\t\t: %s\n"
 459                    "cpu MHz\t\t: %u\n"
 460                    "bogomips\t: %lu.%02lu\n\n",
 461                    n,
 462                    p->cpu_name, p->cpu_rev, p->cpu_voltage,
 463                    p->core_id, p->mmu, p->fpu,
 464                    (c6x_core_freq + 500000) / 1000000,
 465                    (loops_per_jiffy/(500000/HZ)),
 466                    (loops_per_jiffy/(5000/HZ))%100);
 467
 468         return 0;
 469 }
 470
 471 static void *c_start(struct seq_file *m, loff_t *pos)
 472 {
 473         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 474 }
 475 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 476 {
 477         ++*pos;
 478         return NULL;
 479 }
 480 static void c_stop(struct seq_file *m, void *v)
 481 {
 482 }
 483
 484 const struct seq_operations cpuinfo_op = {
 485         c_start,
 486         c_stop,
 487         c_next,
 488         show_cpuinfo
 489 };
 490
 491 static struct cpu cpu_devices[NR_CPUS];
 492
 493 static int __init topology_init(void)
 494 {
 495         int i;
 496
 497         for_each_present_cpu(i)
 498                 register_cpu(&cpu_devices[i], i);
 499
 500         return 0;
 501 }
 502
 503 subsys_initcall(topology_init);