arch/blackfin/mach-bf548/include/mach/cdefBF549.h

   1 /*
   2  * Copyright 2007-2008 Analog Devices Inc.
   3  *
   4  * Licensed under the GPL-2 or later.
   5  */
   6
   7 #ifndef _CDEF_BF549_H
   8 #define _CDEF_BF549_H
   9
  10 /* include all Core registers and bit definitions */
  11 #include "defBF549.h"
  12
  13 /* include core sbfin_read_()ecific register pointer definitions */
  14 #include <asm/cdef_LPBlackfin.h>
  15
  16 /* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF549 */
  17
  18 /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
  19 #include "cdefBF54x_base.h"
  20
  21 /* The BF549 is like the BF544, but has MXVR */
  22 #include "cdefBF547.h"
  23
  24 /* MXVR Registers */
  25
  26 #define bfin_read_MXVR_CONFIG()                 bfin_read16(MXVR_CONFIG)
  27 #define bfin_write_MXVR_CONFIG(val)             bfin_write16(MXVR_CONFIG, val)
  28 #define bfin_read_MXVR_STATE_0()                bfin_read32(MXVR_STATE_0)
  29 #define bfin_write_MXVR_STATE_0(val)            bfin_write32(MXVR_STATE_0, val)
  30 #define bfin_read_MXVR_STATE_1()                bfin_read32(MXVR_STATE_1)
  31 #define bfin_write_MXVR_STATE_1(val)            bfin_write32(MXVR_STATE_1, val)
  32 #define bfin_read_MXVR_INT_STAT_0()             bfin_read32(MXVR_INT_STAT_0)
  33 #define bfin_write_MXVR_INT_STAT_0(val)         bfin_write32(MXVR_INT_STAT_0, val)
  34 #define bfin_read_MXVR_INT_STAT_1()             bfin_read32(MXVR_INT_STAT_1)
  35 #define bfin_write_MXVR_INT_STAT_1(val)         bfin_write32(MXVR_INT_STAT_1, val)
  36 #define bfin_read_MXVR_INT_EN_0()               bfin_read32(MXVR_INT_EN_0)
  37 #define bfin_write_MXVR_INT_EN_0(val)           bfin_write32(MXVR_INT_EN_0, val)
  38 #define bfin_read_MXVR_INT_EN_1()               bfin_read32(MXVR_INT_EN_1)
  39 #define bfin_write_MXVR_INT_EN_1(val)           bfin_write32(MXVR_INT_EN_1, val)
  40 #define bfin_read_MXVR_POSITION()               bfin_read16(MXVR_POSITION)
  41 #define bfin_write_MXVR_POSITION(val)           bfin_write16(MXVR_POSITION, val)
  42 #define bfin_read_MXVR_MAX_POSITION()           bfin_read16(MXVR_MAX_POSITION)
  43 #define bfin_write_MXVR_MAX_POSITION(val)       bfin_write16(MXVR_MAX_POSITION, val)
  44 #define bfin_read_MXVR_DELAY()                  bfin_read16(MXVR_DELAY)
  45 #define bfin_write_MXVR_DELAY(val)              bfin_write16(MXVR_DELAY, val)
  46 #define bfin_read_MXVR_MAX_DELAY()              bfin_read16(MXVR_MAX_DELAY)
  47 #define bfin_write_MXVR_MAX_DELAY(val)          bfin_write16(MXVR_MAX_DELAY, val)
  48 #define bfin_read_MXVR_LADDR()                  bfin_read32(MXVR_LADDR)
  49 #define bfin_write_MXVR_LADDR(val)              bfin_write32(MXVR_LADDR, val)
  50 #define bfin_read_MXVR_GADDR()                  bfin_read16(MXVR_GADDR)
  51 #define bfin_write_MXVR_GADDR(val)              bfin_write16(MXVR_GADDR, val)
  52 #define bfin_read_MXVR_AADDR()                  bfin_read32(MXVR_AADDR)
  53 #define bfin_write_MXVR_AADDR(val)              bfin_write32(MXVR_AADDR, val)
  54
  55 /* MXVR Allocation Table Registers */
  56
  57 #define bfin_read_MXVR_ALLOC_0()                bfin_read32(MXVR_ALLOC_0)
  58 #define bfin_write_MXVR_ALLOC_0(val)            bfin_write32(MXVR_ALLOC_0, val)
  59 #define bfin_read_MXVR_ALLOC_1()                bfin_read32(MXVR_ALLOC_1)
  60 #define bfin_write_MXVR_ALLOC_1(val)            bfin_write32(MXVR_ALLOC_1, val)
  61 #define bfin_read_MXVR_ALLOC_2()                bfin_read32(MXVR_ALLOC_2)
  62 #define bfin_write_MXVR_ALLOC_2(val)            bfin_write32(MXVR_ALLOC_2, val)
  63 #define bfin_read_MXVR_ALLOC_3()                bfin_read32(MXVR_ALLOC_3)
  64 #define bfin_write_MXVR_ALLOC_3(val)            bfin_write32(MXVR_ALLOC_3, val)
  65 #define bfin_read_MXVR_ALLOC_4()                bfin_read32(MXVR_ALLOC_4)
  66 #define bfin_write_MXVR_ALLOC_4(val)            bfin_write32(MXVR_ALLOC_4, val)
  67 #define bfin_read_MXVR_ALLOC_5()                bfin_read32(MXVR_ALLOC_5)
  68 #define bfin_write_MXVR_ALLOC_5(val)            bfin_write32(MXVR_ALLOC_5, val)
  69 #define bfin_read_MXVR_ALLOC_6()                bfin_read32(MXVR_ALLOC_6)
  70 #define bfin_write_MXVR_ALLOC_6(val)            bfin_write32(MXVR_ALLOC_6, val)
  71 #define bfin_read_MXVR_ALLOC_7()                bfin_read32(MXVR_ALLOC_7)
  72 #define bfin_write_MXVR_ALLOC_7(val)            bfin_write32(MXVR_ALLOC_7, val)
  73 #define bfin_read_MXVR_ALLOC_8()                bfin_read32(MXVR_ALLOC_8)
  74 #define bfin_write_MXVR_ALLOC_8(val)            bfin_write32(MXVR_ALLOC_8, val)
  75 #define bfin_read_MXVR_ALLOC_9()                bfin_read32(MXVR_ALLOC_9)
  76 #define bfin_write_MXVR_ALLOC_9(val)            bfin_write32(MXVR_ALLOC_9, val)
  77 #define bfin_read_MXVR_ALLOC_10()               bfin_read32(MXVR_ALLOC_10)
  78 #define bfin_write_MXVR_ALLOC_10(val)           bfin_write32(MXVR_ALLOC_10, val)
  79 #define bfin_read_MXVR_ALLOC_11()               bfin_read32(MXVR_ALLOC_11)
  80 #define bfin_write_MXVR_ALLOC_11(val)           bfin_write32(MXVR_ALLOC_11, val)
  81 #define bfin_read_MXVR_ALLOC_12()               bfin_read32(MXVR_ALLOC_12)
  82 #define bfin_write_MXVR_ALLOC_12(val)           bfin_write32(MXVR_ALLOC_12, val)
  83 #define bfin_read_MXVR_ALLOC_13()               bfin_read32(MXVR_ALLOC_13)
  84 #define bfin_write_MXVR_ALLOC_13(val)           bfin_write32(MXVR_ALLOC_13, val)
  85 #define bfin_read_MXVR_ALLOC_14()               bfin_read32(MXVR_ALLOC_14)
  86 #define bfin_write_MXVR_ALLOC_14(val)           bfin_write32(MXVR_ALLOC_14, val)
  87
  88 /* MXVR Channel Assign Registers */
  89
  90 #define bfin_read_MXVR_SYNC_LCHAN_0()           bfin_read32(MXVR_SYNC_LCHAN_0)
  91 #define bfin_write_MXVR_SYNC_LCHAN_0(val)       bfin_write32(MXVR_SYNC_LCHAN_0, val)
  92 #define bfin_read_MXVR_SYNC_LCHAN_1()           bfin_read32(MXVR_SYNC_LCHAN_1)
  93 #define bfin_write_MXVR_SYNC_LCHAN_1(val)       bfin_write32(MXVR_SYNC_LCHAN_1, val)
  94 #define bfin_read_MXVR_SYNC_LCHAN_2()           bfin_read32(MXVR_SYNC_LCHAN_2)
  95 #define bfin_write_MXVR_SYNC_LCHAN_2(val)       bfin_write32(MXVR_SYNC_LCHAN_2, val)
  96 #define bfin_read_MXVR_SYNC_LCHAN_3()           bfin_read32(MXVR_SYNC_LCHAN_3)
  97 #define bfin_write_MXVR_SYNC_LCHAN_3(val)       bfin_write32(MXVR_SYNC_LCHAN_3, val)
  98 #define bfin_read_MXVR_SYNC_LCHAN_4()           bfin_read32(MXVR_SYNC_LCHAN_4)
  99 #define bfin_write_MXVR_SYNC_LCHAN_4(val)       bfin_write32(MXVR_SYNC_LCHAN_4, val)
 100 #define bfin_read_MXVR_SYNC_LCHAN_5()           bfin_read32(MXVR_SYNC_LCHAN_5)
 101 #define bfin_write_MXVR_SYNC_LCHAN_5(val)       bfin_write32(MXVR_SYNC_LCHAN_5, val)
 102 #define bfin_read_MXVR_SYNC_LCHAN_6()           bfin_read32(MXVR_SYNC_LCHAN_6)
 103 #define bfin_write_MXVR_SYNC_LCHAN_6(val)       bfin_write32(MXVR_SYNC_LCHAN_6, val)
 104 #define bfin_read_MXVR_SYNC_LCHAN_7()           bfin_read32(MXVR_SYNC_LCHAN_7)
 105 #define bfin_write_MXVR_SYNC_LCHAN_7(val)       bfin_write32(MXVR_SYNC_LCHAN_7, val)
 106
 107 /* MXVR DMA0 Registers */
 108
 109 #define bfin_read_MXVR_DMA0_CONFIG()            bfin_read32(MXVR_DMA0_CONFIG)
 110 #define bfin_write_MXVR_DMA0_CONFIG(val)        bfin_write32(MXVR_DMA0_CONFIG, val)
 111 #define bfin_read_MXVR_DMA0_START_ADDR()        bfin_read32(MXVR_DMA0_START_ADDR)
 112 #define bfin_write_MXVR_DMA0_START_ADDR(val)    bfin_write32(MXVR_DMA0_START_ADDR)
 113 #define bfin_read_MXVR_DMA0_COUNT()             bfin_read16(MXVR_DMA0_COUNT)
 114 #define bfin_write_MXVR_DMA0_COUNT(val)         bfin_write16(MXVR_DMA0_COUNT, val)
 115 #define bfin_read_MXVR_DMA0_CURR_ADDR()         bfin_read32(MXVR_DMA0_CURR_ADDR)
 116 #define bfin_write_MXVR_DMA0_CURR_ADDR(val)     bfin_write32(MXVR_DMA0_CURR_ADDR)
 117 #define bfin_read_MXVR_DMA0_CURR_COUNT()        bfin_read16(MXVR_DMA0_CURR_COUNT)
 118 #define bfin_write_MXVR_DMA0_CURR_COUNT(val)    bfin_write16(MXVR_DMA0_CURR_COUNT, val)
 119
 120 /* MXVR DMA1 Registers */
 121
 122 #define bfin_read_MXVR_DMA1_CONFIG()            bfin_read32(MXVR_DMA1_CONFIG)
 123 #define bfin_write_MXVR_DMA1_CONFIG(val)        bfin_write32(MXVR_DMA1_CONFIG, val)
 124 #define bfin_read_MXVR_DMA1_START_ADDR()        bfin_read32(MXVR_DMA1_START_ADDR)
 125 #define bfin_write_MXVR_DMA1_START_ADDR(val)    bfin_write32(MXVR_DMA1_START_ADDR)
 126 #define bfin_read_MXVR_DMA1_COUNT()             bfin_read16(MXVR_DMA1_COUNT)
 127 #define bfin_write_MXVR_DMA1_COUNT(val)         bfin_write16(MXVR_DMA1_COUNT, val)
 128 #define bfin_read_MXVR_DMA1_CURR_ADDR()         bfin_read32(MXVR_DMA1_CURR_ADDR)
 129 #define bfin_write_MXVR_DMA1_CURR_ADDR(val)     bfin_write32(MXVR_DMA1_CURR_ADDR)
 130 #define bfin_read_MXVR_DMA1_CURR_COUNT()        bfin_read16(MXVR_DMA1_CURR_COUNT)
 131 #define bfin_write_MXVR_DMA1_CURR_COUNT(val)    bfin_write16(MXVR_DMA1_CURR_COUNT, val)
 132
 133 /* MXVR DMA2 Registers */
 134
 135 #define bfin_read_MXVR_DMA2_CONFIG()            bfin_read32(MXVR_DMA2_CONFIG)
 136 #define bfin_write_MXVR_DMA2_CONFIG(val)        bfin_write32(MXVR_DMA2_CONFIG, val)
 137 #define bfin_read_MXVR_DMA2_START_ADDR()        bfin_read32(MXVR_DMA2_START_ADDR)
 138 #define bfin_write_MXVR_DMA2_START_ADDR(val)    bfin_write32(MXVR_DMA2_START_ADDR)
 139 #define bfin_read_MXVR_DMA2_COUNT()             bfin_read16(MXVR_DMA2_COUNT)
 140 #define bfin_write_MXVR_DMA2_COUNT(val)         bfin_write16(MXVR_DMA2_COUNT, val)
 141 #define bfin_read_MXVR_DMA2_CURR_ADDR()         bfin_read32(MXVR_DMA2_CURR_ADDR)
 142 #define bfin_write_MXVR_DMA2_CURR_ADDR(val)     bfin_write32(MXVR_DMA2_CURR_ADDR)
 143 #define bfin_read_MXVR_DMA2_CURR_COUNT()        bfin_read16(MXVR_DMA2_CURR_COUNT)
 144 #define bfin_write_MXVR_DMA2_CURR_COUNT(val)    bfin_write16(MXVR_DMA2_CURR_COUNT, val)
 145
 146 /* MXVR DMA3 Registers */
 147
 148 #define bfin_read_MXVR_DMA3_CONFIG()            bfin_read32(MXVR_DMA3_CONFIG)
 149 #define bfin_write_MXVR_DMA3_CONFIG(val)        bfin_write32(MXVR_DMA3_CONFIG, val)
 150 #define bfin_read_MXVR_DMA3_START_ADDR()        bfin_read32(MXVR_DMA3_START_ADDR)
 151 #define bfin_write_MXVR_DMA3_START_ADDR(val)    bfin_write32(MXVR_DMA3_START_ADDR)
 152 #define bfin_read_MXVR_DMA3_COUNT()             bfin_read16(MXVR_DMA3_COUNT)
 153 #define bfin_write_MXVR_DMA3_COUNT(val)         bfin_write16(MXVR_DMA3_COUNT, val)
 154 #define bfin_read_MXVR_DMA3_CURR_ADDR()         bfin_read32(MXVR_DMA3_CURR_ADDR)
 155 #define bfin_write_MXVR_DMA3_CURR_ADDR(val)     bfin_write32(MXVR_DMA3_CURR_ADDR)
 156 #define bfin_read_MXVR_DMA3_CURR_COUNT()        bfin_read16(MXVR_DMA3_CURR_COUNT)
 157 #define bfin_write_MXVR_DMA3_CURR_COUNT(val)    bfin_write16(MXVR_DMA3_CURR_COUNT, val)
 158
 159 /* MXVR DMA4 Registers */
 160
 161 #define bfin_read_MXVR_DMA4_CONFIG()            bfin_read32(MXVR_DMA4_CONFIG)
 162 #define bfin_write_MXVR_DMA4_CONFIG(val)        bfin_write32(MXVR_DMA4_CONFIG, val)
 163 #define bfin_read_MXVR_DMA4_START_ADDR()        bfin_read32(MXVR_DMA4_START_ADDR)
 164 #define bfin_write_MXVR_DMA4_START_ADDR(val)    bfin_write32(MXVR_DMA4_START_ADDR)
 165 #define bfin_read_MXVR_DMA4_COUNT()             bfin_read16(MXVR_DMA4_COUNT)
 166 #define bfin_write_MXVR_DMA4_COUNT(val)         bfin_write16(MXVR_DMA4_COUNT, val)
 167 #define bfin_read_MXVR_DMA4_CURR_ADDR()         bfin_read32(MXVR_DMA4_CURR_ADDR)
 168 #define bfin_write_MXVR_DMA4_CURR_ADDR(val)     bfin_write32(MXVR_DMA4_CURR_ADDR)
 169 #define bfin_read_MXVR_DMA4_CURR_COUNT()        bfin_read16(MXVR_DMA4_CURR_COUNT)
 170 #define bfin_write_MXVR_DMA4_CURR_COUNT(val)    bfin_write16(MXVR_DMA4_CURR_COUNT, val)
 171
 172 /* MXVR DMA5 Registers */
 173
 174 #define bfin_read_MXVR_DMA5_CONFIG()            bfin_read32(MXVR_DMA5_CONFIG)
 175 #define bfin_write_MXVR_DMA5_CONFIG(val)        bfin_write32(MXVR_DMA5_CONFIG, val)
 176 #define bfin_read_MXVR_DMA5_START_ADDR()        bfin_read32(MXVR_DMA5_START_ADDR)
 177 #define bfin_write_MXVR_DMA5_START_ADDR(val)    bfin_write32(MXVR_DMA5_START_ADDR)
 178 #define bfin_read_MXVR_DMA5_COUNT()             bfin_read16(MXVR_DMA5_COUNT)
 179 #define bfin_write_MXVR_DMA5_COUNT(val)         bfin_write16(MXVR_DMA5_COUNT, val)
 180 #define bfin_read_MXVR_DMA5_CURR_ADDR()         bfin_read32(MXVR_DMA5_CURR_ADDR)
 181 #define bfin_write_MXVR_DMA5_CURR_ADDR(val)     bfin_write32(MXVR_DMA5_CURR_ADDR)
 182 #define bfin_read_MXVR_DMA5_CURR_COUNT()        bfin_read16(MXVR_DMA5_CURR_COUNT)
 183 #define bfin_write_MXVR_DMA5_CURR_COUNT(val)    bfin_write16(MXVR_DMA5_CURR_COUNT, val)
 184
 185 /* MXVR DMA6 Registers */
 186
 187 #define bfin_read_MXVR_DMA6_CONFIG()            bfin_read32(MXVR_DMA6_CONFIG)
 188 #define bfin_write_MXVR_DMA6_CONFIG(val)        bfin_write32(MXVR_DMA6_CONFIG, val)
 189 #define bfin_read_MXVR_DMA6_START_ADDR()        bfin_read32(MXVR_DMA6_START_ADDR)
 190 #define bfin_write_MXVR_DMA6_START_ADDR(val)    bfin_write32(MXVR_DMA6_START_ADDR)
 191 #define bfin_read_MXVR_DMA6_COUNT()             bfin_read16(MXVR_DMA6_COUNT)
 192 #define bfin_write_MXVR_DMA6_COUNT(val)         bfin_write16(MXVR_DMA6_COUNT, val)
 193 #define bfin_read_MXVR_DMA6_CURR_ADDR()         bfin_read32(MXVR_DMA6_CURR_ADDR)
 194 #define bfin_write_MXVR_DMA6_CURR_ADDR(val)     bfin_write32(MXVR_DMA6_CURR_ADDR)
 195 #define bfin_read_MXVR_DMA6_CURR_COUNT()        bfin_read16(MXVR_DMA6_CURR_COUNT)
 196 #define bfin_write_MXVR_DMA6_CURR_COUNT(val)    bfin_write16(MXVR_DMA6_CURR_COUNT, val)
 197
 198 /* MXVR DMA7 Registers */
 199
 200 #define bfin_read_MXVR_DMA7_CONFIG()            bfin_read32(MXVR_DMA7_CONFIG)
 201 #define bfin_write_MXVR_DMA7_CONFIG(val)        bfin_write32(MXVR_DMA7_CONFIG, val)
 202 #define bfin_read_MXVR_DMA7_START_ADDR()        bfin_read32(MXVR_DMA7_START_ADDR)
 203 #define bfin_write_MXVR_DMA7_START_ADDR(val)    bfin_write32(MXVR_DMA7_START_ADDR)
 204 #define bfin_read_MXVR_DMA7_COUNT()             bfin_read16(MXVR_DMA7_COUNT)
 205 #define bfin_write_MXVR_DMA7_COUNT(val)         bfin_write16(MXVR_DMA7_COUNT, val)
 206 #define bfin_read_MXVR_DMA7_CURR_ADDR()         bfin_read32(MXVR_DMA7_CURR_ADDR)
 207 #define bfin_write_MXVR_DMA7_CURR_ADDR(val)     bfin_write32(MXVR_DMA7_CURR_ADDR)
 208 #define bfin_read_MXVR_DMA7_CURR_COUNT()        bfin_read16(MXVR_DMA7_CURR_COUNT)
 209 #define bfin_write_MXVR_DMA7_CURR_COUNT(val)    bfin_write16(MXVR_DMA7_CURR_COUNT, val)
 210
 211 /* MXVR Asynch Packet Registers */
 212
 213 #define bfin_read_MXVR_AP_CTL()                 bfin_read16(MXVR_AP_CTL)
 214 #define bfin_write_MXVR_AP_CTL(val)             bfin_write16(MXVR_AP_CTL, val)
 215 #define bfin_read_MXVR_APRB_START_ADDR()        bfin_read32(MXVR_APRB_START_ADDR)
 216 #define bfin_write_MXVR_APRB_START_ADDR(val)    bfin_write32(MXVR_APRB_START_ADDR)
 217 #define bfin_read_MXVR_APRB_CURR_ADDR()         bfin_read32(MXVR_APRB_CURR_ADDR)
 218 #define bfin_write_MXVR_APRB_CURR_ADDR(val)     bfin_write32(MXVR_APRB_CURR_ADDR)
 219 #define bfin_read_MXVR_APTB_START_ADDR()        bfin_read32(MXVR_APTB_START_ADDR)
 220 #define bfin_write_MXVR_APTB_START_ADDR(val)    bfin_write32(MXVR_APTB_START_ADDR)
 221 #define bfin_read_MXVR_APTB_CURR_ADDR()         bfin_read32(MXVR_APTB_CURR_ADDR)
 222 #define bfin_write_MXVR_APTB_CURR_ADDR(val)     bfin_write32(MXVR_APTB_CURR_ADDR)
 223
 224 /* MXVR Control Message Registers */
 225
 226 #define bfin_read_MXVR_CM_CTL()                 bfin_read32(MXVR_CM_CTL)
 227 #define bfin_write_MXVR_CM_CTL(val)             bfin_write32(MXVR_CM_CTL, val)
 228 #define bfin_read_MXVR_CMRB_START_ADDR()        bfin_read32(MXVR_CMRB_START_ADDR)
 229 #define bfin_write_MXVR_CMRB_START_ADDR(val)    bfin_write32(MXVR_CMRB_START_ADDR)
 230 #define bfin_read_MXVR_CMRB_CURR_ADDR()         bfin_read32(MXVR_CMRB_CURR_ADDR)
 231 #define bfin_write_MXVR_CMRB_CURR_ADDR(val)     bfin_write32(MXVR_CMRB_CURR_ADDR)
 232 #define bfin_read_MXVR_CMTB_START_ADDR()        bfin_read32(MXVR_CMTB_START_ADDR)
 233 #define bfin_write_MXVR_CMTB_START_ADDR(val)    bfin_write32(MXVR_CMTB_START_ADDR)
 234 #define bfin_read_MXVR_CMTB_CURR_ADDR()         bfin_read32(MXVR_CMTB_CURR_ADDR)
 235 #define bfin_write_MXVR_CMTB_CURR_ADDR(val)     bfin_write32(MXVR_CMTB_CURR_ADDR)
 236
 237 /* MXVR Remote Read Registers */
 238
 239 #define bfin_read_MXVR_RRDB_START_ADDR()        bfin_read32(MXVR_RRDB_START_ADDR)
 240 #define bfin_write_MXVR_RRDB_START_ADDR(val)    bfin_write32(MXVR_RRDB_START_ADDR)
 241 #define bfin_read_MXVR_RRDB_CURR_ADDR()         bfin_read32(MXVR_RRDB_CURR_ADDR)
 242 #define bfin_write_MXVR_RRDB_CURR_ADDR(val)     bfin_write32(MXVR_RRDB_CURR_ADDR)
 243
 244 /* MXVR Pattern Data Registers */
 245
 246 #define bfin_read_MXVR_PAT_DATA_0()             bfin_read32(MXVR_PAT_DATA_0)
 247 #define bfin_write_MXVR_PAT_DATA_0(val)         bfin_write32(MXVR_PAT_DATA_0, val)
 248 #define bfin_read_MXVR_PAT_EN_0()               bfin_read32(MXVR_PAT_EN_0)
 249 #define bfin_write_MXVR_PAT_EN_0(val)           bfin_write32(MXVR_PAT_EN_0, val)
 250 #define bfin_read_MXVR_PAT_DATA_1()             bfin_read32(MXVR_PAT_DATA_1)
 251 #define bfin_write_MXVR_PAT_DATA_1(val)         bfin_write32(MXVR_PAT_DATA_1, val)
 252 #define bfin_read_MXVR_PAT_EN_1()               bfin_read32(MXVR_PAT_EN_1)
 253 #define bfin_write_MXVR_PAT_EN_1(val)           bfin_write32(MXVR_PAT_EN_1, val)
 254
 255 /* MXVR Frame Counter Registers */
 256
 257 #define bfin_read_MXVR_FRAME_CNT_0()            bfin_read16(MXVR_FRAME_CNT_0)
 258 #define bfin_write_MXVR_FRAME_CNT_0(val)        bfin_write16(MXVR_FRAME_CNT_0, val)
 259 #define bfin_read_MXVR_FRAME_CNT_1()            bfin_read16(MXVR_FRAME_CNT_1)
 260 #define bfin_write_MXVR_FRAME_CNT_1(val)        bfin_write16(MXVR_FRAME_CNT_1, val)
 261
 262 /* MXVR Routing Table Registers */
 263
 264 #define bfin_read_MXVR_ROUTING_0()              bfin_read32(MXVR_ROUTING_0)
 265 #define bfin_write_MXVR_ROUTING_0(val)          bfin_write32(MXVR_ROUTING_0, val)
 266 #define bfin_read_MXVR_ROUTING_1()              bfin_read32(MXVR_ROUTING_1)
 267 #define bfin_write_MXVR_ROUTING_1(val)          bfin_write32(MXVR_ROUTING_1, val)
 268 #define bfin_read_MXVR_ROUTING_2()              bfin_read32(MXVR_ROUTING_2)
 269 #define bfin_write_MXVR_ROUTING_2(val)          bfin_write32(MXVR_ROUTING_2, val)
 270 #define bfin_read_MXVR_ROUTING_3()              bfin_read32(MXVR_ROUTING_3)
 271 #define bfin_write_MXVR_ROUTING_3(val)          bfin_write32(MXVR_ROUTING_3, val)
 272 #define bfin_read_MXVR_ROUTING_4()              bfin_read32(MXVR_ROUTING_4)
 273 #define bfin_write_MXVR_ROUTING_4(val)          bfin_write32(MXVR_ROUTING_4, val)
 274 #define bfin_read_MXVR_ROUTING_5()              bfin_read32(MXVR_ROUTING_5)
 275 #define bfin_write_MXVR_ROUTING_5(val)          bfin_write32(MXVR_ROUTING_5, val)
 276 #define bfin_read_MXVR_ROUTING_6()              bfin_read32(MXVR_ROUTING_6)
 277 #define bfin_write_MXVR_ROUTING_6(val)          bfin_write32(MXVR_ROUTING_6, val)
 278 #define bfin_read_MXVR_ROUTING_7()              bfin_read32(MXVR_ROUTING_7)
 279 #define bfin_write_MXVR_ROUTING_7(val)          bfin_write32(MXVR_ROUTING_7, val)
 280 #define bfin_read_MXVR_ROUTING_8()              bfin_read32(MXVR_ROUTING_8)
 281 #define bfin_write_MXVR_ROUTING_8(val)          bfin_write32(MXVR_ROUTING_8, val)
 282 #define bfin_read_MXVR_ROUTING_9()              bfin_read32(MXVR_ROUTING_9)
 283 #define bfin_write_MXVR_ROUTING_9(val)          bfin_write32(MXVR_ROUTING_9, val)
 284 #define bfin_read_MXVR_ROUTING_10()             bfin_read32(MXVR_ROUTING_10)
 285 #define bfin_write_MXVR_ROUTING_10(val)         bfin_write32(MXVR_ROUTING_10, val)
 286 #define bfin_read_MXVR_ROUTING_11()             bfin_read32(MXVR_ROUTING_11)
 287 #define bfin_write_MXVR_ROUTING_11(val)         bfin_write32(MXVR_ROUTING_11, val)
 288 #define bfin_read_MXVR_ROUTING_12()             bfin_read32(MXVR_ROUTING_12)
 289 #define bfin_write_MXVR_ROUTING_12(val)         bfin_write32(MXVR_ROUTING_12, val)
 290 #define bfin_read_MXVR_ROUTING_13()             bfin_read32(MXVR_ROUTING_13)
 291 #define bfin_write_MXVR_ROUTING_13(val)         bfin_write32(MXVR_ROUTING_13, val)
 292 #define bfin_read_MXVR_ROUTING_14()             bfin_read32(MXVR_ROUTING_14)
 293 #define bfin_write_MXVR_ROUTING_14(val)         bfin_write32(MXVR_ROUTING_14, val)
 294
 295 /* MXVR Counter-Clock-Control Registers */
 296
 297 #define bfin_read_MXVR_BLOCK_CNT()              bfin_read16(MXVR_BLOCK_CNT)
 298 #define bfin_write_MXVR_BLOCK_CNT(val)          bfin_write16(MXVR_BLOCK_CNT, val)
 299 #define bfin_read_MXVR_CLK_CTL()                bfin_read32(MXVR_CLK_CTL)
 300 #define bfin_write_MXVR_CLK_CTL(val)            bfin_write32(MXVR_CLK_CTL, val)
 301 #define bfin_read_MXVR_CDRPLL_CTL()             bfin_read32(MXVR_CDRPLL_CTL)
 302 #define bfin_write_MXVR_CDRPLL_CTL(val)         bfin_write32(MXVR_CDRPLL_CTL, val)
 303 #define bfin_read_MXVR_FMPLL_CTL()              bfin_read32(MXVR_FMPLL_CTL)
 304 #define bfin_write_MXVR_FMPLL_CTL(val)          bfin_write32(MXVR_FMPLL_CTL, val)
 305 #define bfin_read_MXVR_PIN_CTL()                bfin_read16(MXVR_PIN_CTL)
 306 #define bfin_write_MXVR_PIN_CTL(val)            bfin_write16(MXVR_PIN_CTL, val)
 307 #define bfin_read_MXVR_SCLK_CNT()               bfin_read16(MXVR_SCLK_CNT)
 308 #define bfin_write_MXVR_SCLK_CNT(val)           bfin_write16(MXVR_SCLK_CNT, val)
 309
 310 #endif /* _CDEF_BF549_H */