arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * File:         arch/blackfin/mach-bf527/boards/ezbrd.c
   3  * Based on:     arch/blackfin/mach-bf537/boards/stamp.c
   4  * Author:       Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2008 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/mtd/physmap.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/irq.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/usb/musb.h>
  43 #include <asm/dma.h>
  44 #include <asm/bfin5xx_spi.h>
  45 #include <asm/reboot.h>
  46 #include <asm/nand.h>
  47 #include <asm/portmux.h>
  48 #include <asm/dpmc.h>
  49 #include <linux/spi/ad7877.h>
  50
  51 /*
  52  * Name the Board for the /proc/cpuinfo
  53  */
  54 const char bfin_board_name[] = "ADI BF526-EZBRD";
  55
  56 /*
  57  *  Driver needs to know address, irq and flag pin.
  58  */
  59
  60 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  61 static struct resource musb_resources[] = {
  62         [0] = {
  63                 .start  = 0xffc03800,
  64                 .end    = 0xffc03cff,
  65                 .flags  = IORESOURCE_MEM,
  66         },
  67         [1] = { /* general IRQ */
  68                 .start  = IRQ_USB_INT0,
  69                 .end    = IRQ_USB_INT0,
  70                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  71         },
  72         [2] = { /* DMA IRQ */
  73                 .start  = IRQ_USB_DMA,
  74                 .end    = IRQ_USB_DMA,
  75                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  76         },
  77 };
  78
  79 static struct musb_hdrc_config musb_config = {
  80         .multipoint     = 0,
  81         .dyn_fifo       = 0,
  82         .soft_con       = 1,
  83         .dma            = 1,
  84         .num_eps        = 8,
  85         .dma_channels   = 8,
  86         .gpio_vrsel     = GPIO_PG13,
  87 };
  88
  89 static struct musb_hdrc_platform_data musb_plat = {
  90 #if defined(CONFIG_USB_MUSB_OTG)
  91         .mode           = MUSB_OTG,
  92 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  93         .mode           = MUSB_HOST,
  94 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  95         .mode           = MUSB_PERIPHERAL,
  96 #endif
  97         .config         = &musb_config,
  98 };
  99
 100 static u64 musb_dmamask = ~(u32)0;
 101
 102 static struct platform_device musb_device = {
 103         .name           = "musb_hdrc",
 104         .id             = 0,
 105         .dev = {
 106                 .dma_mask               = &musb_dmamask,
 107                 .coherent_dma_mask      = 0xffffffff,
 108                 .platform_data          = &musb_plat,
 109         },
 110         .num_resources  = ARRAY_SIZE(musb_resources),
 111         .resource       = musb_resources,
 112 };
 113 #endif
 114
 115 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 116 static struct mtd_partition ezbrd_partitions[] = {
 117         {
 118                 .name       = "bootloader(nor)",
 119                 .size       = 0x40000,
 120                 .offset     = 0,
 121         }, {
 122                 .name       = "linux kernel(nor)",
 123                 .size       = 0x1C0000,
 124                 .offset     = MTDPART_OFS_APPEND,
 125         }, {
 126                 .name       = "file system(nor)",
 127                 .size       = MTDPART_SIZ_FULL,
 128                 .offset     = MTDPART_OFS_APPEND,
 129         }
 130 };
 131
 132 static struct physmap_flash_data ezbrd_flash_data = {
 133         .width      = 2,
 134         .parts      = ezbrd_partitions,
 135         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 136 };
 137
 138 static struct resource ezbrd_flash_resource = {
 139         .start = 0x20000000,
 140         .end   = 0x203fffff,
 141         .flags = IORESOURCE_MEM,
 142 };
 143
 144 static struct platform_device ezbrd_flash_device = {
 145         .name          = "physmap-flash",
 146         .id            = 0,
 147         .dev = {
 148                 .platform_data = &ezbrd_flash_data,
 149         },
 150         .num_resources = 1,
 151         .resource      = &ezbrd_flash_resource,
 152 };
 153 #endif
 154
 155 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 156 static struct mtd_partition partition_info[] = {
 157         {
 158                 .name = "linux kernel(nand)",
 159                 .offset = 0,
 160                 .size = 4 * 1024 * 1024,
 161         },
 162         {
 163                 .name = "file system(nand)",
 164                 .offset = MTDPART_OFS_APPEND,
 165                 .size = MTDPART_SIZ_FULL,
 166         },
 167 };
 168
 169 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 170         .page_size = NFC_PG_SIZE_256,
 171         .data_width = NFC_NWIDTH_8,
 172         .partitions = partition_info,
 173         .nr_partitions = ARRAY_SIZE(partition_info),
 174         .rd_dly = 3,
 175         .wr_dly = 3,
 176 };
 177
 178 static struct resource bf5xx_nand_resources[] = {
 179         {
 180                 .start = NFC_CTL,
 181                 .end = NFC_DATA_RD + 2,
 182                 .flags = IORESOURCE_MEM,
 183         },
 184         {
 185                 .start = CH_NFC,
 186                 .end = CH_NFC,
 187                 .flags = IORESOURCE_IRQ,
 188         },
 189 };
 190
 191 static struct platform_device bf5xx_nand_device = {
 192         .name = "bf5xx-nand",
 193         .id = 0,
 194         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 195         .resource = bf5xx_nand_resources,
 196         .dev = {
 197                 .platform_data = &bf5xx_nand_platform,
 198         },
 199 };
 200 #endif
 201
 202 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 203 static struct platform_device rtc_device = {
 204         .name = "rtc-bfin",
 205         .id   = -1,
 206 };
 207 #endif
 208
 209
 210 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 211 static struct platform_device bfin_mii_bus = {
 212         .name = "bfin_mii_bus",
 213 };
 214
 215 static struct platform_device bfin_mac_device = {
 216         .name = "bfin_mac",
 217         .dev.platform_data = &bfin_mii_bus,
 218 };
 219 #endif
 220
 221 #if defined(CONFIG_MTD_M25P80) \
 222         || defined(CONFIG_MTD_M25P80_MODULE)
 223 static struct mtd_partition bfin_spi_flash_partitions[] = {
 224         {
 225                 .name = "bootloader(spi)",
 226                 .size = 0x00040000,
 227                 .offset = 0,
 228                 .mask_flags = MTD_CAP_ROM
 229         }, {
 230                 .name = "linux kernel(spi)",
 231                 .size = MTDPART_SIZ_FULL,
 232                 .offset = MTDPART_OFS_APPEND,
 233         }
 234 };
 235
 236 static struct flash_platform_data bfin_spi_flash_data = {
 237         .name = "m25p80",
 238         .parts = bfin_spi_flash_partitions,
 239         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 240         .type = "m25p16",
 241 };
 242
 243 /* SPI flash chip (m25p64) */
 244 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 245         .enable_dma = 0,         /* use dma transfer with this chip*/
 246         .bits_per_word = 8,
 247 };
 248 #endif
 249
 250 #if defined(CONFIG_SPI_ADC_BF533) \
 251         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 252 /* SPI ADC chip */
 253 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 254         .enable_dma = 1,         /* use dma transfer with this chip*/
 255         .bits_per_word = 16,
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 260 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 261         .enable_dma = 1,
 262         .bits_per_word = 8,
 263 };
 264 #endif
 265
 266 #if defined(CONFIG_PBX)
 267 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 268         .ctl_reg        = 0x4, /* send zero */
 269         .enable_dma     = 0,
 270         .bits_per_word  = 8,
 271         .cs_change_per_word = 1,
 272 };
 273 #endif
 274
 275 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 276 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 277         .enable_dma = 0,
 278         .bits_per_word = 16,
 279 };
 280
 281 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 282         .model                  = 7877,
 283         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 284         .x_plate_ohms           = 419,
 285         .y_plate_ohms           = 486,
 286         .pressure_max           = 1000,
 287         .pressure_min           = 0,
 288         .stopacq_polarity       = 1,
 289         .first_conversion_delay = 3,
 290         .acquisition_time       = 1,
 291         .averaging              = 1,
 292         .pen_down_acc_interval  = 1,
 293 };
 294 #endif
 295
 296 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 297 #include <linux/spi/ad7879.h>
 298 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 299         .model                  = 7879, /* Model = AD7879 */
 300         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 301         .pressure_max           = 10000,
 302         .pressure_min           = 0,
 303         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 304         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 305         .median                 = 2,    /* do 8 measurements */
 306         .averaging              = 1,    /* take the average of 4 middle samples */
 307         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 308         .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
 309         .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
 310 };
 311 #endif
 312
 313 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 314 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 315         .enable_dma = 0,
 316         .bits_per_word = 16,
 317 };
 318 #endif
 319
 320 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 321          && defined(CONFIG_SND_SOC_WM8731_SPI)
 322 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 323         .enable_dma = 0,
 324         .bits_per_word = 16,
 325 };
 326 #endif
 327
 328 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 329 static struct bfin5xx_spi_chip spidev_chip_info = {
 330         .enable_dma = 0,
 331         .bits_per_word = 8,
 332 };
 333 #endif
 334
 335 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 336 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 337         .enable_dma = 0,
 338         .bits_per_word = 8,
 339 };
 340 #endif
 341
 342 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 343 #if defined(CONFIG_MTD_M25P80) \
 344         || defined(CONFIG_MTD_M25P80_MODULE)
 345         {
 346                 /* the modalias must be the same as spi device driver name */
 347                 .modalias = "m25p80", /* Name of spi_driver for this device */
 348                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 349                 .bus_num = 0, /* Framework bus number */
 350                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 351                 .platform_data = &bfin_spi_flash_data,
 352                 .controller_data = &spi_flash_chip_info,
 353                 .mode = SPI_MODE_3,
 354         },
 355 #endif
 356
 357 #if defined(CONFIG_SPI_ADC_BF533) \
 358         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 359         {
 360                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 361                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 362                 .bus_num = 0, /* Framework bus number */
 363                 .chip_select = 1, /* Framework chip select. */
 364                 .platform_data = NULL, /* No spi_driver specific config */
 365                 .controller_data = &spi_adc_chip_info,
 366         },
 367 #endif
 368
 369 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 370         {
 371                 .modalias = "spi_mmc_dummy",
 372                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 373                 .bus_num = 0,
 374                 .chip_select = 0,
 375                 .platform_data = NULL,
 376                 .controller_data = &spi_mmc_chip_info,
 377                 .mode = SPI_MODE_3,
 378         },
 379         {
 380                 .modalias = "spi_mmc",
 381                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 382                 .bus_num = 0,
 383                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 384                 .platform_data = NULL,
 385                 .controller_data = &spi_mmc_chip_info,
 386                 .mode = SPI_MODE_3,
 387         },
 388 #endif
 389 #if defined(CONFIG_PBX)
 390         {
 391                 .modalias = "fxs-spi",
 392                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 393                 .bus_num = 0,
 394                 .chip_select = 8 - CONFIG_J11_JUMPER,
 395                 .controller_data = &spi_si3xxx_chip_info,
 396                 .mode = SPI_MODE_3,
 397         },
 398         {
 399                 .modalias = "fxo-spi",
 400                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 401                 .bus_num = 0,
 402                 .chip_select = 8 - CONFIG_J19_JUMPER,
 403                 .controller_data = &spi_si3xxx_chip_info,
 404                 .mode = SPI_MODE_3,
 405         },
 406 #endif
 407 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 408         {
 409                 .modalias               = "ad7877",
 410                 .platform_data          = &bfin_ad7877_ts_info,
 411                 .irq                    = IRQ_PF8,
 412                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 413                 .bus_num        = 0,
 414                 .chip_select  = 2,
 415                 .controller_data = &spi_ad7877_chip_info,
 416         },
 417 #endif
 418 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 419         {
 420                 .modalias = "ad7879",
 421                 .platform_data = &bfin_ad7879_ts_info,
 422                 .irq = IRQ_PG0,
 423                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 424                 .bus_num = 0,
 425                 .chip_select = 5,
 426                 .controller_data = &spi_ad7879_chip_info,
 427                 .mode = SPI_CPHA | SPI_CPOL,
 428         },
 429 #endif
 430 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 431          && defined(CONFIG_SND_SOC_WM8731_SPI)
 432         {
 433                 .modalias       = "wm8731",
 434                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 435                 .bus_num        = 0,
 436                 .chip_select    = 5,
 437                 .controller_data = &spi_wm8731_chip_info,
 438                 .mode = SPI_MODE_0,
 439         },
 440 #endif
 441 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 442         {
 443                 .modalias = "spidev",
 444                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 445                 .bus_num = 0,
 446                 .chip_select = 1,
 447                 .controller_data = &spidev_chip_info,
 448         },
 449 #endif
 450 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 451         {
 452                 .modalias = "bfin-lq035q1-spi",
 453                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 454                 .bus_num = 0,
 455                 .chip_select = 1,
 456                 .controller_data = &lq035q1_spi_chip_info,
 457                 .mode = SPI_CPHA | SPI_CPOL,
 458         },
 459 #endif
 460 };
 461
 462 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 463 /* SPI controller data */
 464 static struct bfin5xx_spi_master bfin_spi0_info = {
 465         .num_chipselect = 8,
 466         .enable_dma = 1,  /* master has the ability to do dma transfer */
 467         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 468 };
 469
 470 /* SPI (0) */
 471 static struct resource bfin_spi0_resource[] = {
 472         [0] = {
 473                 .start = SPI0_REGBASE,
 474                 .end   = SPI0_REGBASE + 0xFF,
 475                 .flags = IORESOURCE_MEM,
 476                 },
 477         [1] = {
 478                 .start = CH_SPI,
 479                 .end   = CH_SPI,
 480                 .flags = IORESOURCE_IRQ,
 481         },
 482 };
 483
 484 static struct platform_device bfin_spi0_device = {
 485         .name = "bfin-spi",
 486         .id = 0, /* Bus number */
 487         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 488         .resource = bfin_spi0_resource,
 489         .dev = {
 490                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 491         },
 492 };
 493 #endif  /* spi master and devices */
 494
 495 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 496 static struct resource bfin_uart_resources[] = {
 497 #ifdef CONFIG_SERIAL_BFIN_UART0
 498         {
 499                 .start = 0xFFC00400,
 500                 .end = 0xFFC004FF,
 501                 .flags = IORESOURCE_MEM,
 502         },
 503 #endif
 504 #ifdef CONFIG_SERIAL_BFIN_UART1
 505         {
 506                 .start = 0xFFC02000,
 507                 .end = 0xFFC020FF,
 508                 .flags = IORESOURCE_MEM,
 509         },
 510 #endif
 511 };
 512
 513 static struct platform_device bfin_uart_device = {
 514         .name = "bfin-uart",
 515         .id = 1,
 516         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 517         .resource = bfin_uart_resources,
 518 };
 519 #endif
 520
 521 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 522 #ifdef CONFIG_BFIN_SIR0
 523 static struct resource bfin_sir0_resources[] = {
 524         {
 525                 .start = 0xFFC00400,
 526                 .end = 0xFFC004FF,
 527                 .flags = IORESOURCE_MEM,
 528         },
 529         {
 530                 .start = IRQ_UART0_RX,
 531                 .end = IRQ_UART0_RX+1,
 532                 .flags = IORESOURCE_IRQ,
 533         },
 534         {
 535                 .start = CH_UART0_RX,
 536                 .end = CH_UART0_RX+1,
 537                 .flags = IORESOURCE_DMA,
 538         },
 539 };
 540
 541 static struct platform_device bfin_sir0_device = {
 542         .name = "bfin_sir",
 543         .id = 0,
 544         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 545         .resource = bfin_sir0_resources,
 546 };
 547 #endif
 548 #ifdef CONFIG_BFIN_SIR1
 549 static struct resource bfin_sir1_resources[] = {
 550         {
 551                 .start = 0xFFC02000,
 552                 .end = 0xFFC020FF,
 553                 .flags = IORESOURCE_MEM,
 554         },
 555         {
 556                 .start = IRQ_UART1_RX,
 557                 .end = IRQ_UART1_RX+1,
 558                 .flags = IORESOURCE_IRQ,
 559         },
 560         {
 561                 .start = CH_UART1_RX,
 562                 .end = CH_UART1_RX+1,
 563                 .flags = IORESOURCE_DMA,
 564         },
 565 };
 566
 567 static struct platform_device bfin_sir1_device = {
 568         .name = "bfin_sir",
 569         .id = 1,
 570         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 571         .resource = bfin_sir1_resources,
 572 };
 573 #endif
 574 #endif
 575
 576 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 577 static struct resource bfin_twi0_resource[] = {
 578         [0] = {
 579                 .start = TWI0_REGBASE,
 580                 .end   = TWI0_REGBASE,
 581                 .flags = IORESOURCE_MEM,
 582         },
 583         [1] = {
 584                 .start = IRQ_TWI,
 585                 .end   = IRQ_TWI,
 586                 .flags = IORESOURCE_IRQ,
 587         },
 588 };
 589
 590 static struct platform_device i2c_bfin_twi_device = {
 591         .name = "i2c-bfin-twi",
 592         .id = 0,
 593         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 594         .resource = bfin_twi0_resource,
 595 };
 596 #endif
 597
 598 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 599 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 600         {
 601                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 602         },
 603 #endif
 604 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 605         {
 606                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 607                 .irq = IRQ_PF8,
 608         },
 609 #endif
 610 };
 611
 612 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 613 static struct platform_device bfin_sport0_uart_device = {
 614         .name = "bfin-sport-uart",
 615         .id = 0,
 616 };
 617
 618 static struct platform_device bfin_sport1_uart_device = {
 619         .name = "bfin-sport-uart",
 620         .id = 1,
 621 };
 622 #endif
 623
 624 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 625 #include <linux/input.h>
 626 #include <linux/gpio_keys.h>
 627
 628 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 629         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 630         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 631 };
 632
 633 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 634         .buttons        = bfin_gpio_keys_table,
 635         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 636 };
 637
 638 static struct platform_device bfin_device_gpiokeys = {
 639         .name      = "gpio-keys",
 640         .dev = {
 641                 .platform_data = &bfin_gpio_keys_data,
 642         },
 643 };
 644 #endif
 645
 646 static struct resource bfin_gpios_resources = {
 647         .start = 0,
 648         .end   = MAX_BLACKFIN_GPIOS - 1,
 649         .flags = IORESOURCE_IRQ,
 650 };
 651
 652 static struct platform_device bfin_gpios_device = {
 653         .name = "simple-gpio",
 654         .id = -1,
 655         .num_resources = 1,
 656         .resource = &bfin_gpios_resources,
 657 };
 658
 659 static const unsigned int cclk_vlev_datasheet[] =
 660 {
 661         VRPAIR(VLEV_100, 400000000),
 662         VRPAIR(VLEV_105, 426000000),
 663         VRPAIR(VLEV_110, 500000000),
 664         VRPAIR(VLEV_115, 533000000),
 665         VRPAIR(VLEV_120, 600000000),
 666 };
 667
 668 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 669         .tuple_tab = cclk_vlev_datasheet,
 670         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 671         .vr_settling_time = 25 /* us */,
 672 };
 673
 674 static struct platform_device bfin_dpmc = {
 675         .name = "bfin dpmc",
 676         .dev = {
 677                 .platform_data = &bfin_dmpc_vreg_data,
 678         },
 679 };
 680
 681 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 682 #include <asm/bfin-lq035q1.h>
 683
 684 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 685         .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 686         .use_bl =       1,
 687         .gpio_bl =      GPIO_PG12,
 688 };
 689
 690 static struct resource bfin_lq035q1_resources[] = {
 691         {
 692                 .start = IRQ_PPI_ERROR,
 693                 .end = IRQ_PPI_ERROR,
 694                 .flags = IORESOURCE_IRQ,
 695         },
 696 };
 697
 698 static struct platform_device bfin_lq035q1_device = {
 699         .name           = "bfin-lq035q1",
 700         .id             = -1,
 701         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 702         .resource       = bfin_lq035q1_resources,
 703         .dev            = {
 704                 .platform_data = &bfin_lq035q1_data,
 705         },
 706 };
 707 #endif
 708
 709 static struct platform_device *stamp_devices[] __initdata = {
 710
 711         &bfin_dpmc,
 712
 713 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 714         &bf5xx_nand_device,
 715 #endif
 716
 717 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 718         &rtc_device,
 719 #endif
 720
 721 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 722         &musb_device,
 723 #endif
 724
 725 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 726         &bfin_mii_bus,
 727         &bfin_mac_device,
 728 #endif
 729
 730 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 731         &bfin_spi0_device,
 732 #endif
 733
 734 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 735         &bfin_uart_device,
 736 #endif
 737
 738 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 739         &bfin_lq035q1_device,
 740 #endif
 741
 742 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 743 #ifdef CONFIG_BFIN_SIR0
 744         &bfin_sir0_device,
 745 #endif
 746 #ifdef CONFIG_BFIN_SIR1
 747         &bfin_sir1_device,
 748 #endif
 749 #endif
 750
 751 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 752         &i2c_bfin_twi_device,
 753 #endif
 754
 755 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 756         &bfin_sport0_uart_device,
 757         &bfin_sport1_uart_device,
 758 #endif
 759
 760 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 761         &bfin_device_gpiokeys,
 762 #endif
 763
 764 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 765         &ezbrd_flash_device,
 766 #endif
 767
 768         &bfin_gpios_device,
 769 };
 770
 771 static int __init ezbrd_init(void)
 772 {
 773         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 774         i2c_register_board_info(0, bfin_i2c_board_info,
 775                                 ARRAY_SIZE(bfin_i2c_board_info));
 776         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 777         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 778         return 0;
 779 }
 780
 781 arch_initcall(ezbrd_init);
 782
 783 void native_machine_restart(char *cmd)
 784 {
 785         /* workaround reboot hang when booting from SPI */
 786         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 787                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 788 }
 789
 790 void bfin_get_ether_addr(char *addr)
 791 {
 792         /* the MAC is stored in OTP memory page 0xDF */
 793         u32 ret;
 794         u64 otp_mac;
 795         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 796
 797         ret = otp_read(0xDF, 0x00, &otp_mac);
 798         if (!(ret & 0x1)) {
 799                 char *otp_mac_p = (char *)&otp_mac;
 800                 for (ret = 0; ret < 6; ++ret)
 801                         addr[ret] = otp_mac_p[5 - ret];
 802         }
 803 }
 804 EXPORT_SYMBOL(bfin_get_ether_addr);