arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/export.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17
  18 #include <linux/i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/interrupt.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/portmux.h>
  25 #include <asm/dpmc.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  39 static struct mtd_partition ezbrd_partitions[] = {
  40         {
  41                 .name       = "bootloader(nor)",
  42                 .size       = 0x40000,
  43                 .offset     = 0,
  44         }, {
  45                 .name       = "linux kernel(nor)",
  46                 .size       = 0x1C0000,
  47                 .offset     = MTDPART_OFS_APPEND,
  48         }, {
  49                 .name       = "file system(nor)",
  50                 .size       = MTDPART_SIZ_FULL,
  51                 .offset     = MTDPART_OFS_APPEND,
  52         }
  53 };
  54
  55 static struct physmap_flash_data ezbrd_flash_data = {
  56         .width      = 2,
  57         .parts      = ezbrd_partitions,
  58         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  59 };
  60
  61 static struct resource ezbrd_flash_resource = {
  62         .start = 0x20000000,
  63 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  64         .end   = 0x202fffff,
  65 #else
  66         .end   = 0x203fffff,
  67 #endif
  68         .flags = IORESOURCE_MEM,
  69 };
  70
  71 static struct platform_device ezbrd_flash_device = {
  72         .name          = "physmap-flash",
  73         .id            = 0,
  74         .dev = {
  75                 .platform_data = &ezbrd_flash_data,
  76         },
  77         .num_resources = 1,
  78         .resource      = &ezbrd_flash_resource,
  79 };
  80 #endif
  81
  82 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  83 static struct platform_device rtc_device = {
  84         .name = "rtc-bfin",
  85         .id   = -1,
  86 };
  87 #endif
  88
  89 #if IS_ENABLED(CONFIG_BFIN_MAC)
  90 #include <linux/bfin_mac.h>
  91 static const unsigned short bfin_mac_peripherals[] = {
  92         P_MII0_ETxD0,
  93         P_MII0_ETxD1,
  94         P_MII0_ETxEN,
  95         P_MII0_ERxD0,
  96         P_MII0_ERxD1,
  97         P_MII0_TxCLK,
  98         P_MII0_PHYINT,
  99         P_MII0_CRS,
 100         P_MII0_MDC,
 101         P_MII0_MDIO,
 102         0
 103 };
 104
 105 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 106         {
 107                 .addr = 1,
 108                 .irq = IRQ_MAC_PHYINT,
 109         },
 110 };
 111
 112 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 113         .phydev_number = 1,
 114         .phydev_data = bfin_phydev_data,
 115         .phy_mode = PHY_INTERFACE_MODE_MII,
 116         .mac_peripherals = bfin_mac_peripherals,
 117         .vlan1_mask = 1,
 118         .vlan2_mask = 2,
 119 };
 120
 121 static struct platform_device bfin_mii_bus = {
 122         .name = "bfin_mii_bus",
 123         .dev = {
 124                 .platform_data = &bfin_mii_bus_data,
 125         }
 126 };
 127
 128 static struct platform_device bfin_mac_device = {
 129         .name = "bfin_mac",
 130         .dev = {
 131                 .platform_data = &bfin_mii_bus,
 132         }
 133 };
 134
 135 #endif
 136
 137 #if IS_ENABLED(CONFIG_MTD_M25P80)
 138 static struct mtd_partition bfin_spi_flash_partitions[] = {
 139         {
 140                 .name = "bootloader(spi)",
 141                 .size = 0x00040000,
 142                 .offset = 0,
 143                 .mask_flags = MTD_CAP_ROM
 144         }, {
 145                 .name = "linux kernel(spi)",
 146                 .size = MTDPART_SIZ_FULL,
 147                 .offset = MTDPART_OFS_APPEND,
 148         }
 149 };
 150
 151 static struct flash_platform_data bfin_spi_flash_data = {
 152         .name = "m25p80",
 153         .parts = bfin_spi_flash_partitions,
 154         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 155         .type = "m25p16",
 156 };
 157
 158 /* SPI flash chip (m25p64) */
 159 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 160         .enable_dma = 0,         /* use dma transfer with this chip*/
 161 };
 162 #endif
 163
 164 #if IS_ENABLED(CONFIG_MMC_SPI)
 165 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 166         .enable_dma = 0,
 167 };
 168 #endif
 169
 170 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
 171 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 172         .model                  = 7877,
 173         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 174         .x_plate_ohms           = 419,
 175         .y_plate_ohms           = 486,
 176         .pressure_max           = 1000,
 177         .pressure_min           = 0,
 178         .stopacq_polarity       = 1,
 179         .first_conversion_delay = 3,
 180         .acquisition_time       = 1,
 181         .averaging              = 1,
 182         .pen_down_acc_interval  = 1,
 183 };
 184 #endif
 185
 186 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 187 #if IS_ENABLED(CONFIG_MTD_M25P80)
 188         {
 189                 /* the modalias must be the same as spi device driver name */
 190                 .modalias = "m25p80", /* Name of spi_driver for this device */
 191                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 192                 .bus_num = 0, /* Framework bus number */
 193                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 194                 .platform_data = &bfin_spi_flash_data,
 195                 .controller_data = &spi_flash_chip_info,
 196                 .mode = SPI_MODE_3,
 197         },
 198 #endif
 199
 200 #if IS_ENABLED(CONFIG_MMC_SPI)
 201         {
 202                 .modalias = "mmc_spi",
 203                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 204                 .bus_num = 0,
 205                 .chip_select = 5,
 206                 .controller_data = &mmc_spi_chip_info,
 207                 .mode = SPI_MODE_3,
 208         },
 209 #endif
 210 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
 211         {
 212                 .modalias               = "ad7877",
 213                 .platform_data          = &bfin_ad7877_ts_info,
 214                 .irq                    = IRQ_PF8,
 215                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 216                 .bus_num        = 0,
 217                 .chip_select  = 2,
 218         },
 219 #endif
 220 #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
 221          && defined(CONFIG_SND_SOC_WM8731_SPI)
 222         {
 223                 .modalias       = "wm8731",
 224                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 225                 .bus_num        = 0,
 226                 .chip_select    = 5,
 227                 .mode = SPI_MODE_0,
 228         },
 229 #endif
 230 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
 231         {
 232                 .modalias = "spidev",
 233                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 234                 .bus_num = 0,
 235                 .chip_select = 1,
 236         },
 237 #endif
 238 #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
 239         {
 240                 .modalias = "bfin-lq035q1-spi",
 241                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 242                 .bus_num = 0,
 243                 .chip_select = 1,
 244                 .mode = SPI_CPHA | SPI_CPOL,
 245         },
 246 #endif
 247 };
 248
 249 /* SPI controller data */
 250 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 251 /* SPI (0) */
 252 static struct bfin5xx_spi_master bfin_spi0_info = {
 253         .num_chipselect = 6,
 254         .enable_dma = 1,  /* master has the ability to do dma transfer */
 255         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 256 };
 257
 258 static struct resource bfin_spi0_resource[] = {
 259         [0] = {
 260                 .start = SPI0_REGBASE,
 261                 .end   = SPI0_REGBASE + 0xFF,
 262                 .flags = IORESOURCE_MEM,
 263                 },
 264         [1] = {
 265                 .start = CH_SPI0,
 266                 .end   = CH_SPI0,
 267                 .flags = IORESOURCE_DMA,
 268         },
 269         [2] = {
 270                 .start = IRQ_SPI0,
 271                 .end   = IRQ_SPI0,
 272                 .flags = IORESOURCE_IRQ,
 273         },
 274 };
 275
 276 static struct platform_device bfin_spi0_device = {
 277         .name = "bfin-spi",
 278         .id = 0, /* Bus number */
 279         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 280         .resource = bfin_spi0_resource,
 281         .dev = {
 282                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 283         },
 284 };
 285
 286 /* SPI (1) */
 287 static struct bfin5xx_spi_master bfin_spi1_info = {
 288         .num_chipselect = 6,
 289         .enable_dma = 1,  /* master has the ability to do dma transfer */
 290         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 291 };
 292
 293 static struct resource bfin_spi1_resource[] = {
 294         [0] = {
 295                 .start = SPI1_REGBASE,
 296                 .end   = SPI1_REGBASE + 0xFF,
 297                 .flags = IORESOURCE_MEM,
 298                 },
 299         [1] = {
 300                 .start = CH_SPI1,
 301                 .end   = CH_SPI1,
 302                 .flags = IORESOURCE_DMA,
 303         },
 304         [2] = {
 305                 .start = IRQ_SPI1,
 306                 .end   = IRQ_SPI1,
 307                 .flags = IORESOURCE_IRQ,
 308         },
 309 };
 310
 311 static struct platform_device bfin_spi1_device = {
 312         .name = "bfin-spi",
 313         .id = 1, /* Bus number */
 314         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 315         .resource = bfin_spi1_resource,
 316         .dev = {
 317                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 318         },
 319 };
 320 #endif  /* spi master and devices */
 321
 322 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 323 #ifdef CONFIG_SERIAL_BFIN_UART0
 324 static struct resource bfin_uart0_resources[] = {
 325         {
 326                 .start = UART0_THR,
 327                 .end = UART0_GCTL+2,
 328                 .flags = IORESOURCE_MEM,
 329         },
 330         {
 331                 .start = IRQ_UART0_TX,
 332                 .end = IRQ_UART0_TX,
 333                 .flags = IORESOURCE_IRQ,
 334         },
 335         {
 336                 .start = IRQ_UART0_RX,
 337                 .end = IRQ_UART0_RX,
 338                 .flags = IORESOURCE_IRQ,
 339         },
 340         {
 341                 .start = IRQ_UART0_ERROR,
 342                 .end = IRQ_UART0_ERROR,
 343                 .flags = IORESOURCE_IRQ,
 344         },
 345         {
 346                 .start = CH_UART0_TX,
 347                 .end = CH_UART0_TX,
 348                 .flags = IORESOURCE_DMA,
 349         },
 350         {
 351                 .start = CH_UART0_RX,
 352                 .end = CH_UART0_RX,
 353                 .flags = IORESOURCE_DMA,
 354         },
 355 };
 356
 357 static unsigned short bfin_uart0_peripherals[] = {
 358         P_UART0_TX, P_UART0_RX, 0
 359 };
 360
 361 static struct platform_device bfin_uart0_device = {
 362         .name = "bfin-uart",
 363         .id = 0,
 364         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 365         .resource = bfin_uart0_resources,
 366         .dev = {
 367                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 368         },
 369 };
 370 #endif
 371 #ifdef CONFIG_SERIAL_BFIN_UART1
 372 static struct resource bfin_uart1_resources[] = {
 373         {
 374                 .start = UART1_THR,
 375                 .end = UART1_GCTL+2,
 376                 .flags = IORESOURCE_MEM,
 377         },
 378         {
 379                 .start = IRQ_UART1_TX,
 380                 .end = IRQ_UART1_TX,
 381                 .flags = IORESOURCE_IRQ,
 382         },
 383         {
 384                 .start = IRQ_UART1_RX,
 385                 .end = IRQ_UART1_RX,
 386                 .flags = IORESOURCE_IRQ,
 387         },
 388         {
 389                 .start = IRQ_UART1_ERROR,
 390                 .end = IRQ_UART1_ERROR,
 391                 .flags = IORESOURCE_IRQ,
 392         },
 393         {
 394                 .start = CH_UART1_TX,
 395                 .end = CH_UART1_TX,
 396                 .flags = IORESOURCE_DMA,
 397         },
 398         {
 399                 .start = CH_UART1_RX,
 400                 .end = CH_UART1_RX,
 401                 .flags = IORESOURCE_DMA,
 402         },
 403 };
 404
 405 static unsigned short bfin_uart1_peripherals[] = {
 406         P_UART1_TX, P_UART1_RX, 0
 407 };
 408
 409 static struct platform_device bfin_uart1_device = {
 410         .name = "bfin-uart",
 411         .id = 1,
 412         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 413         .resource = bfin_uart1_resources,
 414         .dev = {
 415                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 416         },
 417 };
 418 #endif
 419 #endif
 420
 421 #if IS_ENABLED(CONFIG_BFIN_SIR)
 422 #ifdef CONFIG_BFIN_SIR0
 423 static struct resource bfin_sir0_resources[] = {
 424         {
 425                 .start = 0xFFC00400,
 426                 .end = 0xFFC004FF,
 427                 .flags = IORESOURCE_MEM,
 428         },
 429         {
 430                 .start = IRQ_UART0_RX,
 431                 .end = IRQ_UART0_RX+1,
 432                 .flags = IORESOURCE_IRQ,
 433         },
 434         {
 435                 .start = CH_UART0_RX,
 436                 .end = CH_UART0_RX+1,
 437                 .flags = IORESOURCE_DMA,
 438         },
 439 };
 440
 441 static struct platform_device bfin_sir0_device = {
 442         .name = "bfin_sir",
 443         .id = 0,
 444         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 445         .resource = bfin_sir0_resources,
 446 };
 447 #endif
 448 #ifdef CONFIG_BFIN_SIR1
 449 static struct resource bfin_sir1_resources[] = {
 450         {
 451                 .start = 0xFFC02000,
 452                 .end = 0xFFC020FF,
 453                 .flags = IORESOURCE_MEM,
 454         },
 455         {
 456                 .start = IRQ_UART1_RX,
 457                 .end = IRQ_UART1_RX+1,
 458                 .flags = IORESOURCE_IRQ,
 459         },
 460         {
 461                 .start = CH_UART1_RX,
 462                 .end = CH_UART1_RX+1,
 463                 .flags = IORESOURCE_DMA,
 464         },
 465 };
 466
 467 static struct platform_device bfin_sir1_device = {
 468         .name = "bfin_sir",
 469         .id = 1,
 470         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 471         .resource = bfin_sir1_resources,
 472 };
 473 #endif
 474 #endif
 475
 476 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
 477 static struct platform_device bfin_i2s = {
 478         .name = "bfin-i2s",
 479         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 480         /* TODO: add platform data here */
 481 };
 482 #endif
 483
 484 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
 485 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 486
 487 static struct resource bfin_twi0_resource[] = {
 488         [0] = {
 489                 .start = TWI0_REGBASE,
 490                 .end   = TWI0_REGBASE,
 491                 .flags = IORESOURCE_MEM,
 492         },
 493         [1] = {
 494                 .start = IRQ_TWI,
 495                 .end   = IRQ_TWI,
 496                 .flags = IORESOURCE_IRQ,
 497         },
 498 };
 499
 500 static struct platform_device i2c_bfin_twi_device = {
 501         .name = "i2c-bfin-twi",
 502         .id = 0,
 503         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 504         .resource = bfin_twi0_resource,
 505         .dev = {
 506                 .platform_data = &bfin_twi0_pins,
 507         },
 508 };
 509 #endif
 510
 511 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 512 #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
 513         {
 514                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 515         },
 516 #endif
 517 #if IS_ENABLED(CONFIG_INPUT_PCF8574)
 518         {
 519                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 520                 .irq = IRQ_PF8,
 521         },
 522 #endif
 523 #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
 524         {
 525                 I2C_BOARD_INFO("ssm2602", 0x1b),
 526         },
 527 #endif
 528 };
 529
 530 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
 531 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 532 static struct resource bfin_sport0_uart_resources[] = {
 533         {
 534                 .start = SPORT0_TCR1,
 535                 .end = SPORT0_MRCS3+4,
 536                 .flags = IORESOURCE_MEM,
 537         },
 538         {
 539                 .start = IRQ_SPORT0_RX,
 540                 .end = IRQ_SPORT0_RX+1,
 541                 .flags = IORESOURCE_IRQ,
 542         },
 543         {
 544                 .start = IRQ_SPORT0_ERROR,
 545                 .end = IRQ_SPORT0_ERROR,
 546                 .flags = IORESOURCE_IRQ,
 547         },
 548 };
 549
 550 static unsigned short bfin_sport0_peripherals[] = {
 551         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 552         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 553 };
 554
 555 static struct platform_device bfin_sport0_uart_device = {
 556         .name = "bfin-sport-uart",
 557         .id = 0,
 558         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 559         .resource = bfin_sport0_uart_resources,
 560         .dev = {
 561                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 562         },
 563 };
 564 #endif
 565 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 566 static struct resource bfin_sport1_uart_resources[] = {
 567         {
 568                 .start = SPORT1_TCR1,
 569                 .end = SPORT1_MRCS3+4,
 570                 .flags = IORESOURCE_MEM,
 571         },
 572         {
 573                 .start = IRQ_SPORT1_RX,
 574                 .end = IRQ_SPORT1_RX+1,
 575                 .flags = IORESOURCE_IRQ,
 576         },
 577         {
 578                 .start = IRQ_SPORT1_ERROR,
 579                 .end = IRQ_SPORT1_ERROR,
 580                 .flags = IORESOURCE_IRQ,
 581         },
 582 };
 583
 584 static unsigned short bfin_sport1_peripherals[] = {
 585         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 586         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 587 };
 588
 589 static struct platform_device bfin_sport1_uart_device = {
 590         .name = "bfin-sport-uart",
 591         .id = 1,
 592         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 593         .resource = bfin_sport1_uart_resources,
 594         .dev = {
 595                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 596         },
 597 };
 598 #endif
 599 #endif
 600
 601 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
 602 #include <linux/input.h>
 603 #include <linux/gpio_keys.h>
 604
 605 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 606         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 607         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 608 };
 609
 610 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 611         .buttons        = bfin_gpio_keys_table,
 612         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 613 };
 614
 615 static struct platform_device bfin_device_gpiokeys = {
 616         .name      = "gpio-keys",
 617         .dev = {
 618                 .platform_data = &bfin_gpio_keys_data,
 619         },
 620 };
 621 #endif
 622
 623 #if IS_ENABLED(CONFIG_SDH_BFIN)
 624
 625 static struct bfin_sd_host bfin_sdh_data = {
 626         .dma_chan = CH_RSI,
 627         .irq_int0 = IRQ_RSI_INT0,
 628         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 629 };
 630
 631 static struct platform_device bf51x_sdh_device = {
 632         .name = "bfin-sdh",
 633         .id = 0,
 634         .dev = {
 635                 .platform_data = &bfin_sdh_data,
 636         },
 637 };
 638 #endif
 639
 640 static const unsigned int cclk_vlev_datasheet[] =
 641 {
 642         VRPAIR(VLEV_100, 400000000),
 643         VRPAIR(VLEV_105, 426000000),
 644         VRPAIR(VLEV_110, 500000000),
 645         VRPAIR(VLEV_115, 533000000),
 646         VRPAIR(VLEV_120, 600000000),
 647 };
 648
 649 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 650         .tuple_tab = cclk_vlev_datasheet,
 651         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 652         .vr_settling_time = 25 /* us */,
 653 };
 654
 655 static struct platform_device bfin_dpmc = {
 656         .name = "bfin dpmc",
 657         .dev = {
 658                 .platform_data = &bfin_dmpc_vreg_data,
 659         },
 660 };
 661
 662 static struct platform_device *stamp_devices[] __initdata = {
 663
 664         &bfin_dpmc,
 665
 666 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
 667         &rtc_device,
 668 #endif
 669
 670 #if IS_ENABLED(CONFIG_BFIN_MAC)
 671         &bfin_mii_bus,
 672         &bfin_mac_device,
 673 #endif
 674
 675 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 676         &bfin_spi0_device,
 677         &bfin_spi1_device,
 678 #endif
 679
 680 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 681 #ifdef CONFIG_SERIAL_BFIN_UART0
 682         &bfin_uart0_device,
 683 #endif
 684 #ifdef CONFIG_SERIAL_BFIN_UART1
 685         &bfin_uart1_device,
 686 #endif
 687 #endif
 688
 689 #if IS_ENABLED(CONFIG_BFIN_SIR)
 690 #ifdef CONFIG_BFIN_SIR0
 691         &bfin_sir0_device,
 692 #endif
 693 #ifdef CONFIG_BFIN_SIR1
 694         &bfin_sir1_device,
 695 #endif
 696 #endif
 697
 698 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
 699         &i2c_bfin_twi_device,
 700 #endif
 701
 702 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
 703         &bfin_i2s,
 704 #endif
 705
 706 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
 707 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 708         &bfin_sport0_uart_device,
 709 #endif
 710 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 711         &bfin_sport1_uart_device,
 712 #endif
 713 #endif
 714
 715 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
 716         &bfin_device_gpiokeys,
 717 #endif
 718
 719 #if IS_ENABLED(CONFIG_SDH_BFIN)
 720         &bf51x_sdh_device,
 721 #endif
 722
 723 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
 724         &ezbrd_flash_device,
 725 #endif
 726 };
 727
 728 static int __init ezbrd_init(void)
 729 {
 730         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 731         i2c_register_board_info(0, bfin_i2c_board_info,
 732                                 ARRAY_SIZE(bfin_i2c_board_info));
 733         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 734         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 735         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 736         peripheral_request(P_AMS2, "ParaFlash");
 737 #if !IS_ENABLED(CONFIG_SPI_BFIN5XX)
 738         peripheral_request(P_AMS3, "ParaFlash");
 739 #endif
 740         return 0;
 741 }
 742
 743 arch_initcall(ezbrd_init);
 744
 745 static struct platform_device *ezbrd_early_devices[] __initdata = {
 746 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 747 #ifdef CONFIG_SERIAL_BFIN_UART0
 748         &bfin_uart0_device,
 749 #endif
 750 #ifdef CONFIG_SERIAL_BFIN_UART1
 751         &bfin_uart1_device,
 752 #endif
 753 #endif
 754
 755 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 756 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 757         &bfin_sport0_uart_device,
 758 #endif
 759 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 760         &bfin_sport1_uart_device,
 761 #endif
 762 #endif
 763 };
 764
 765 void __init native_machine_early_platform_add_devices(void)
 766 {
 767         printk(KERN_INFO "register early platform devices\n");
 768         early_platform_add_devices(ezbrd_early_devices,
 769                 ARRAY_SIZE(ezbrd_early_devices));
 770 }
 771
 772 void native_machine_restart(char *cmd)
 773 {
 774         /* workaround reboot hang when booting from SPI */
 775         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 776                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 777 }
 778
 779 int bfin_get_ether_addr(char *addr)
 780 {
 781         /* the MAC is stored in OTP memory page 0xDF */
 782         u32 ret;
 783         u64 otp_mac;
 784         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 785
 786         ret = otp_read(0xDF, 0x00, &otp_mac);
 787         if (!(ret & 0x1)) {
 788                 char *otp_mac_p = (char *)&otp_mac;
 789                 for (ret = 0; ret < 6; ++ret)
 790                         addr[ret] = otp_mac_p[5 - ret];
 791         }
 792         return 0;
 793 }
 794 EXPORT_SYMBOL(bfin_get_ether_addr);