2 * Copyright (C) 2006 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/platform_device.h>
25 extern struct platform_device at32_intc0_device;
28 * TODO: We may be able to implement mask/unmask by setting IxM flags
29 * in the status register.
31 static void intc_mask_irq(unsigned int irq)
36 static void intc_unmask_irq(unsigned int irq)
41 static struct intc intc0 = {
44 .mask = intc_mask_irq,
45 .unmask = intc_unmask_irq,
50 * All interrupts go via intc at some point.
52 asmlinkage void do_IRQ(int level, struct pt_regs *regs)
54 struct irq_desc *desc;
56 unsigned long status_reg;
62 irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
63 desc = irq_desc + irq;
64 desc->handle_irq(irq, desc, regs);
67 * Clear all interrupt level masks so that we may handle
68 * interrupts during softirq processing. If this is a nested
69 * interrupt, interrupts must stay globally disabled until we
72 status_reg = sysreg_read(SR);
73 status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
74 | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
75 sysreg_write(SR, status_reg);
80 void __init init_IRQ(void)
82 extern void _evba(void);
83 extern void irq_level0(void);
84 struct resource *regs;
89 regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
91 printk(KERN_EMERG "intc: no mmio resource defined\n");
94 pclk = clk_get(&at32_intc0_device.dev, "pclk");
96 printk(KERN_EMERG "intc: no clock defined\n");
102 intc0.regs = ioremap(regs->start, regs->end - regs->start + 1);
104 printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
105 (unsigned long)regs->start);
110 * Initialize all interrupts to level 0 (lowest priority). The
111 * priority level may be changed by calling
112 * irq_set_priority().
115 offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
116 for (i = 0; i < NR_INTERNAL_IRQS; i++) {
117 intc_writel(&intc0, INTPR0 + 4 * i, offset);
118 readback = intc_readl(&intc0, INTPR0 + 4 * i);
119 if (readback == offset)
120 set_irq_chip_and_handler(i, &intc0.chip,
124 /* Unmask all interrupt levels */
125 sysreg_write(SR, (sysreg_read(SR)
126 & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
131 panic("Interrupt controller initialization failed!\n");