fscrypt: correct collision claim for digested names
[sfrench/cifs-2.6.git] / arch / avr32 / kernel / time.c
1 /*
2  * Copyright (C) 2004-2007 Atmel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 #include <linux/clk.h>
9 #include <linux/clockchips.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/kernel.h>
14 #include <linux/time.h>
15 #include <linux/cpu.h>
16
17 #include <asm/sysreg.h>
18
19 #include <mach/pm.h>
20
21 static bool disable_cpu_idle_poll;
22
23 static u64 read_cycle_count(struct clocksource *cs)
24 {
25         return (u64)sysreg_read(COUNT);
26 }
27
28 /*
29  * The architectural cycle count registers are a fine clocksource unless
30  * the system idle loop use sleep states like "idle":  the CPU cycles
31  * measured by COUNT (and COMPARE) don't happen during sleep states.
32  * Their duration also changes if cpufreq changes the CPU clock rate.
33  * So we rate the clocksource using COUNT as very low quality.
34  */
35 static struct clocksource counter = {
36         .name           = "avr32_counter",
37         .rating         = 50,
38         .read           = read_cycle_count,
39         .mask           = CLOCKSOURCE_MASK(32),
40         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
41 };
42
43 static irqreturn_t timer_interrupt(int irq, void *dev_id)
44 {
45         struct clock_event_device *evdev = dev_id;
46
47         if (unlikely(!(intc_get_pending(0) & 1)))
48                 return IRQ_NONE;
49
50         /*
51          * Disable the interrupt until the clockevent subsystem
52          * reprograms it.
53          */
54         sysreg_write(COMPARE, 0);
55
56         evdev->event_handler(evdev);
57         return IRQ_HANDLED;
58 }
59
60 static struct irqaction timer_irqaction = {
61         .handler        = timer_interrupt,
62         /* Oprofile uses the same irq as the timer, so allow it to be shared */
63         .flags          = IRQF_TIMER | IRQF_SHARED,
64         .name           = "avr32_comparator",
65 };
66
67 static int comparator_next_event(unsigned long delta,
68                 struct clock_event_device *evdev)
69 {
70         unsigned long   flags;
71
72         raw_local_irq_save(flags);
73
74         /* The time to read COUNT then update COMPARE must be less
75          * than the min_delta_ns value for this clockevent source.
76          */
77         sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
78
79         raw_local_irq_restore(flags);
80
81         return 0;
82 }
83
84 static int comparator_shutdown(struct clock_event_device *evdev)
85 {
86         pr_debug("%s: %s\n", __func__, evdev->name);
87         sysreg_write(COMPARE, 0);
88
89         if (disable_cpu_idle_poll) {
90                 disable_cpu_idle_poll = false;
91                 /*
92                  * Only disable idle poll if we have forced that
93                  * in a previous call.
94                  */
95                 cpu_idle_poll_ctrl(false);
96         }
97         return 0;
98 }
99
100 static int comparator_set_oneshot(struct clock_event_device *evdev)
101 {
102         pr_debug("%s: %s\n", __func__, evdev->name);
103
104         disable_cpu_idle_poll = true;
105         /*
106          * If we're using the COUNT and COMPARE registers we
107          * need to force idle poll.
108          */
109         cpu_idle_poll_ctrl(true);
110
111         return 0;
112 }
113
114 static struct clock_event_device comparator = {
115         .name                   = "avr32_comparator",
116         .features               = CLOCK_EVT_FEAT_ONESHOT,
117         .shift                  = 16,
118         .rating                 = 50,
119         .set_next_event         = comparator_next_event,
120         .set_state_shutdown     = comparator_shutdown,
121         .set_state_oneshot      = comparator_set_oneshot,
122         .tick_resume            = comparator_set_oneshot,
123 };
124
125 void read_persistent_clock(struct timespec *ts)
126 {
127         ts->tv_sec = mktime(2007, 1, 1, 0, 0, 0);
128         ts->tv_nsec = 0;
129 }
130
131 void __init time_init(void)
132 {
133         unsigned long counter_hz;
134         int ret;
135
136         /* figure rate for counter */
137         counter_hz = clk_get_rate(boot_cpu_data.clk);
138         ret = clocksource_register_hz(&counter, counter_hz);
139         if (ret)
140                 pr_debug("timer: could not register clocksource: %d\n", ret);
141
142         /* setup COMPARE clockevent */
143         comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
144         comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
145         comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
146         comparator.cpumask = cpumask_of(0);
147
148         sysreg_write(COMPARE, 0);
149         timer_irqaction.dev_id = &comparator;
150
151         ret = setup_irq(0, &timer_irqaction);
152         if (ret)
153                 pr_debug("timer: could not request IRQ 0: %d\n", ret);
154         else {
155                 clockevents_register_device(&comparator);
156
157                 pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
158                                 ((counter_hz + 500) / 1000) / 1000,
159                                 ((counter_hz + 500) / 1000) % 1000);
160         }
161 }