arch/avr32/boards/atstk1000/atstk1002.c

   1 /*
   2  * ATSTK1002 daughterboard-specific init code
   3  *
   4  * Copyright (C) 2005-2006 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/string.h>
  16 #include <linux/types.h>
  17 #include <linux/spi/spi.h>
  18
  19 #include <video/atmel_lcdc.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/setup.h>
  23 #include <asm/arch/at32ap7000.h>
  24 #include <asm/arch/board.h>
  25 #include <asm/arch/init.h>
  26 #include <asm/arch/portmux.h>
  27
  28 #include "atstk1000.h"
  29
  30
  31 struct eth_addr {
  32         u8 addr[6];
  33 };
  34
  35 static struct eth_addr __initdata hw_addr[2];
  36 static struct eth_platform_data __initdata eth_data[2] = {
  37         {
  38                 /*
  39                  * The MDIO pullups on STK1000 are a bit too weak for
  40                  * the autodetection to work properly, so we have to
  41                  * mask out everything but the correct address.
  42                  */
  43                 .phy_mask       = ~(1U << 16),
  44         },
  45         {
  46                 .phy_mask       = ~(1U << 17),
  47         },
  48 };
  49
  50 #ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
  51 static struct spi_board_info spi0_board_info[] __initdata = {
  52         {
  53                 /* QVGA display */
  54                 .modalias       = "ltv350qv",
  55                 .max_speed_hz   = 16000000,
  56                 .chip_select    = 1,
  57                 .mode           = SPI_MODE_3,
  58         },
  59 };
  60 #endif
  61
  62 #ifdef CONFIG_BOARD_ATSTK1002_SPI1
  63 static struct spi_board_info spi1_board_info[] __initdata = { {
  64         /* patch in custom entries here */
  65 } };
  66 #endif
  67
  68 /*
  69  * The next two functions should go away as the boot loader is
  70  * supposed to initialize the macb address registers with a valid
  71  * ethernet address. But we need to keep it around for a while until
  72  * we can be reasonably sure the boot loader does this.
  73  *
  74  * The phy_id is ignored as the driver will probe for it.
  75  */
  76 static int __init parse_tag_ethernet(struct tag *tag)
  77 {
  78         int i;
  79
  80         i = tag->u.ethernet.mac_index;
  81         if (i < ARRAY_SIZE(hw_addr))
  82                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
  83                        sizeof(hw_addr[i].addr));
  84
  85         return 0;
  86 }
  87 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
  88
  89 static void __init set_hw_addr(struct platform_device *pdev)
  90 {
  91         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  92         const u8 *addr;
  93         void __iomem *regs;
  94         struct clk *pclk;
  95
  96         if (!res)
  97                 return;
  98         if (pdev->id >= ARRAY_SIZE(hw_addr))
  99                 return;
 100
 101         addr = hw_addr[pdev->id].addr;
 102         if (!is_valid_ether_addr(addr))
 103                 return;
 104
 105         /*
 106          * Since this is board-specific code, we'll cheat and use the
 107          * physical address directly as we happen to know that it's
 108          * the same as the virtual address.
 109          */
 110         regs = (void __iomem __force *)res->start;
 111         pclk = clk_get(&pdev->dev, "pclk");
 112         if (!pclk)
 113                 return;
 114
 115         clk_enable(pclk);
 116         __raw_writel((addr[3] << 24) | (addr[2] << 16)
 117                      | (addr[1] << 8) | addr[0], regs + 0x98);
 118         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
 119         clk_disable(pclk);
 120         clk_put(pclk);
 121 }
 122
 123 void __init setup_board(void)
 124 {
 125 #ifdef  CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
 126         at32_map_usart(0, 1);   /* USART 0/B: /dev/ttyS1, IRDA */
 127 #else
 128         at32_map_usart(1, 0);   /* USART 1/A: /dev/ttyS0, DB9 */
 129 #endif
 130         /* USART 2/unused: expansion connector */
 131         at32_map_usart(3, 2);   /* USART 3/C: /dev/ttyS2, DB9 */
 132
 133         at32_setup_serial_console(0);
 134 }
 135
 136 static int __init atstk1002_init(void)
 137 {
 138         /*
 139          * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
 140          * SDRAM-specific pins so that nobody messes with them.
 141          */
 142         at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
 143         at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
 144         at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
 145         at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
 146         at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
 147         at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
 148         at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
 149         at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
 150         at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
 151         at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
 152         at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
 153         at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
 154         at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
 155         at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
 156         at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
 157         at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
 158         at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
 159
 160         at32_add_system_devices();
 161
 162 #ifdef  CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
 163         at32_add_device_usart(1);
 164 #else
 165         at32_add_device_usart(0);
 166 #endif
 167         at32_add_device_usart(2);
 168
 169 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
 170         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 171 #endif
 172 #ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
 173         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
 174 #endif
 175 #ifdef CONFIG_BOARD_ATSTK1002_SPI1
 176         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
 177 #endif
 178 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
 179         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
 180 #else
 181         at32_add_device_lcdc(0, &atstk1000_lcdc_data,
 182                              fbmem_start, fbmem_size);
 183 #endif
 184 #ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
 185         at32_add_device_ssc(0, ATMEL_SSC_TX);
 186 #endif
 187
 188         return 0;
 189 }
 190 postcore_initcall(atstk1002_init);