2 * BPF JIT compiler for ARM64
4 * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #define pr_fmt(fmt) "bpf_jit: " fmt
21 #include <linux/bpf.h>
22 #include <linux/filter.h>
23 #include <linux/printk.h>
24 #include <linux/skbuff.h>
25 #include <linux/slab.h>
27 #include <asm/byteorder.h>
28 #include <asm/cacheflush.h>
29 #include <asm/debug-monitors.h>
30 #include <asm/set_memory.h>
34 int bpf_jit_enable __read_mostly;
36 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
37 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
38 #define TCALL_CNT (MAX_BPF_JIT_REG + 2)
39 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
41 /* Map BPF registers to A64 registers */
42 static const int bpf2a64[] = {
43 /* return value from in-kernel function, and exit value from eBPF */
44 [BPF_REG_0] = A64_R(7),
45 /* arguments from eBPF program to in-kernel function */
46 [BPF_REG_1] = A64_R(0),
47 [BPF_REG_2] = A64_R(1),
48 [BPF_REG_3] = A64_R(2),
49 [BPF_REG_4] = A64_R(3),
50 [BPF_REG_5] = A64_R(4),
51 /* callee saved registers that in-kernel function will preserve */
52 [BPF_REG_6] = A64_R(19),
53 [BPF_REG_7] = A64_R(20),
54 [BPF_REG_8] = A64_R(21),
55 [BPF_REG_9] = A64_R(22),
56 /* read-only frame pointer to access stack */
57 [BPF_REG_FP] = A64_R(25),
58 /* temporary registers for internal BPF JIT */
59 [TMP_REG_1] = A64_R(10),
60 [TMP_REG_2] = A64_R(11),
61 [TMP_REG_3] = A64_R(12),
63 [TCALL_CNT] = A64_R(26),
64 /* temporary register for blinding constants */
65 [BPF_REG_AX] = A64_R(9),
69 const struct bpf_prog *prog;
77 static inline void emit(const u32 insn, struct jit_ctx *ctx)
79 if (ctx->image != NULL)
80 ctx->image[ctx->idx] = cpu_to_le32(insn);
85 static inline void emit_a64_mov_i64(const int reg, const u64 val,
91 emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
96 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
102 static inline void emit_a64_mov_i(const int is64, const int reg,
103 const s32 val, struct jit_ctx *ctx)
106 u16 lo = val & 0xffff;
110 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
112 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
113 emit(A64_MOVK(is64, reg, lo, 0), ctx);
116 emit(A64_MOVZ(is64, reg, lo, 0), ctx);
118 emit(A64_MOVK(is64, reg, hi, 16), ctx);
122 static inline int bpf2a64_offset(int bpf_to, int bpf_from,
123 const struct jit_ctx *ctx)
125 int to = ctx->offset[bpf_to];
126 /* -1 to account for the Branch instruction */
127 int from = ctx->offset[bpf_from] - 1;
132 static void jit_fill_hole(void *area, unsigned int size)
135 /* We are guaranteed to have aligned memory. */
136 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
137 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
140 static inline int epilogue_offset(const struct jit_ctx *ctx)
142 int to = ctx->epilogue_offset;
148 /* Stack must be multiples of 16B */
149 #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
151 /* Tail call offset to jump into */
152 #define PROLOGUE_OFFSET 7
154 static int build_prologue(struct jit_ctx *ctx)
156 const struct bpf_prog *prog = ctx->prog;
157 const u8 r6 = bpf2a64[BPF_REG_6];
158 const u8 r7 = bpf2a64[BPF_REG_7];
159 const u8 r8 = bpf2a64[BPF_REG_8];
160 const u8 r9 = bpf2a64[BPF_REG_9];
161 const u8 fp = bpf2a64[BPF_REG_FP];
162 const u8 tcc = bpf2a64[TCALL_CNT];
163 const int idx0 = ctx->idx;
167 * BPF prog stack layout
170 * original A64_SP => 0:+-----+ BPF prologue
172 * current A64_FP => -16:+-----+
173 * | ... | callee saved registers
174 * BPF fp register => -64:+-----+ <= (BPF_FP)
176 * | ... | BPF prog stack
178 * +-----+ <= (BPF_FP - prog->aux->stack_depth)
179 * |RSVD | JIT scratchpad
180 * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size)
182 * | ... | Function call stack
189 /* Save FP and LR registers to stay align with ARM64 AAPCS */
190 emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
191 emit(A64_MOV(1, A64_FP, A64_SP), ctx);
193 /* Save callee-saved registers */
194 emit(A64_PUSH(r6, r7, A64_SP), ctx);
195 emit(A64_PUSH(r8, r9, A64_SP), ctx);
196 emit(A64_PUSH(fp, tcc, A64_SP), ctx);
198 /* Set up BPF prog stack base register */
199 emit(A64_MOV(1, fp, A64_SP), ctx);
201 /* Initialize tail_call_cnt */
202 emit(A64_MOVZ(1, tcc, 0, 0), ctx);
204 cur_offset = ctx->idx - idx0;
205 if (cur_offset != PROLOGUE_OFFSET) {
206 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n",
207 cur_offset, PROLOGUE_OFFSET);
211 /* 4 byte extra for skb_copy_bits buffer */
212 ctx->stack_size = prog->aux->stack_depth + 4;
213 ctx->stack_size = STACK_ALIGN(ctx->stack_size);
215 /* Set up function call stack */
216 emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
220 static int out_offset = -1; /* initialized on the first pass of build_body() */
221 static int emit_bpf_tail_call(struct jit_ctx *ctx)
223 /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */
224 const u8 r2 = bpf2a64[BPF_REG_2];
225 const u8 r3 = bpf2a64[BPF_REG_3];
227 const u8 tmp = bpf2a64[TMP_REG_1];
228 const u8 prg = bpf2a64[TMP_REG_2];
229 const u8 tcc = bpf2a64[TCALL_CNT];
230 const int idx0 = ctx->idx;
231 #define cur_offset (ctx->idx - idx0)
232 #define jmp_offset (out_offset - (cur_offset))
235 /* if (index >= array->map.max_entries)
238 off = offsetof(struct bpf_array, map.max_entries);
239 emit_a64_mov_i64(tmp, off, ctx);
240 emit(A64_LDR32(tmp, r2, tmp), ctx);
241 emit(A64_CMP(0, r3, tmp), ctx);
242 emit(A64_B_(A64_COND_GE, jmp_offset), ctx);
244 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
248 emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx);
249 emit(A64_CMP(1, tcc, tmp), ctx);
250 emit(A64_B_(A64_COND_GT, jmp_offset), ctx);
251 emit(A64_ADD_I(1, tcc, tcc, 1), ctx);
253 /* prog = array->ptrs[index];
257 off = offsetof(struct bpf_array, ptrs);
258 emit_a64_mov_i64(tmp, off, ctx);
259 emit(A64_ADD(1, tmp, r2, tmp), ctx);
260 emit(A64_LSL(1, prg, r3, 3), ctx);
261 emit(A64_LDR64(prg, tmp, prg), ctx);
262 emit(A64_CBZ(1, prg, jmp_offset), ctx);
264 /* goto *(prog->bpf_func + prologue_offset); */
265 off = offsetof(struct bpf_prog, bpf_func);
266 emit_a64_mov_i64(tmp, off, ctx);
267 emit(A64_LDR64(tmp, prg, tmp), ctx);
268 emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx);
269 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
270 emit(A64_BR(tmp), ctx);
273 if (out_offset == -1)
274 out_offset = cur_offset;
275 if (cur_offset != out_offset) {
276 pr_err_once("tail_call out_offset = %d, expected %d!\n",
277 cur_offset, out_offset);
285 static void build_epilogue(struct jit_ctx *ctx)
287 const u8 r0 = bpf2a64[BPF_REG_0];
288 const u8 r6 = bpf2a64[BPF_REG_6];
289 const u8 r7 = bpf2a64[BPF_REG_7];
290 const u8 r8 = bpf2a64[BPF_REG_8];
291 const u8 r9 = bpf2a64[BPF_REG_9];
292 const u8 fp = bpf2a64[BPF_REG_FP];
294 /* We're done with BPF stack */
295 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
297 /* Restore fs (x25) and x26 */
298 emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
300 /* Restore callee-saved register */
301 emit(A64_POP(r8, r9, A64_SP), ctx);
302 emit(A64_POP(r6, r7, A64_SP), ctx);
304 /* Restore FP/LR registers */
305 emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
307 /* Set return value */
308 emit(A64_MOV(1, A64_R(0), r0), ctx);
310 emit(A64_RET(A64_LR), ctx);
313 /* JITs an eBPF instruction.
315 * 0 - successfully JITed an 8-byte eBPF instruction.
316 * >0 - successfully JITed a 16-byte eBPF instruction.
317 * <0 - failed to JIT.
319 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
321 const u8 code = insn->code;
322 const u8 dst = bpf2a64[insn->dst_reg];
323 const u8 src = bpf2a64[insn->src_reg];
324 const u8 tmp = bpf2a64[TMP_REG_1];
325 const u8 tmp2 = bpf2a64[TMP_REG_2];
326 const u8 tmp3 = bpf2a64[TMP_REG_3];
327 const s16 off = insn->off;
328 const s32 imm = insn->imm;
329 const int i = insn - ctx->prog->insnsi;
330 const bool is64 = BPF_CLASS(code) == BPF_ALU64;
331 const bool isdw = BPF_SIZE(code) == BPF_DW;
335 #define check_imm(bits, imm) do { \
336 if ((((imm) > 0) && ((imm) >> (bits))) || \
337 (((imm) < 0) && (~(imm) >> (bits)))) { \
338 pr_info("[%2d] imm=%d(0x%x) out of range\n", \
343 #define check_imm19(imm) check_imm(19, imm)
344 #define check_imm26(imm) check_imm(26, imm)
348 case BPF_ALU | BPF_MOV | BPF_X:
349 case BPF_ALU64 | BPF_MOV | BPF_X:
350 emit(A64_MOV(is64, dst, src), ctx);
352 /* dst = dst OP src */
353 case BPF_ALU | BPF_ADD | BPF_X:
354 case BPF_ALU64 | BPF_ADD | BPF_X:
355 emit(A64_ADD(is64, dst, dst, src), ctx);
357 case BPF_ALU | BPF_SUB | BPF_X:
358 case BPF_ALU64 | BPF_SUB | BPF_X:
359 emit(A64_SUB(is64, dst, dst, src), ctx);
361 case BPF_ALU | BPF_AND | BPF_X:
362 case BPF_ALU64 | BPF_AND | BPF_X:
363 emit(A64_AND(is64, dst, dst, src), ctx);
365 case BPF_ALU | BPF_OR | BPF_X:
366 case BPF_ALU64 | BPF_OR | BPF_X:
367 emit(A64_ORR(is64, dst, dst, src), ctx);
369 case BPF_ALU | BPF_XOR | BPF_X:
370 case BPF_ALU64 | BPF_XOR | BPF_X:
371 emit(A64_EOR(is64, dst, dst, src), ctx);
373 case BPF_ALU | BPF_MUL | BPF_X:
374 case BPF_ALU64 | BPF_MUL | BPF_X:
375 emit(A64_MUL(is64, dst, dst, src), ctx);
377 case BPF_ALU | BPF_DIV | BPF_X:
378 case BPF_ALU64 | BPF_DIV | BPF_X:
379 case BPF_ALU | BPF_MOD | BPF_X:
380 case BPF_ALU64 | BPF_MOD | BPF_X:
382 const u8 r0 = bpf2a64[BPF_REG_0];
384 /* if (src == 0) return 0 */
385 jmp_offset = 3; /* skip ahead to else path */
386 check_imm19(jmp_offset);
387 emit(A64_CBNZ(is64, src, jmp_offset), ctx);
388 emit(A64_MOVZ(1, r0, 0, 0), ctx);
389 jmp_offset = epilogue_offset(ctx);
390 check_imm26(jmp_offset);
391 emit(A64_B(jmp_offset), ctx);
393 switch (BPF_OP(code)) {
395 emit(A64_UDIV(is64, dst, dst, src), ctx);
398 emit(A64_UDIV(is64, tmp, dst, src), ctx);
399 emit(A64_MUL(is64, tmp, tmp, src), ctx);
400 emit(A64_SUB(is64, dst, dst, tmp), ctx);
405 case BPF_ALU | BPF_LSH | BPF_X:
406 case BPF_ALU64 | BPF_LSH | BPF_X:
407 emit(A64_LSLV(is64, dst, dst, src), ctx);
409 case BPF_ALU | BPF_RSH | BPF_X:
410 case BPF_ALU64 | BPF_RSH | BPF_X:
411 emit(A64_LSRV(is64, dst, dst, src), ctx);
413 case BPF_ALU | BPF_ARSH | BPF_X:
414 case BPF_ALU64 | BPF_ARSH | BPF_X:
415 emit(A64_ASRV(is64, dst, dst, src), ctx);
418 case BPF_ALU | BPF_NEG:
419 case BPF_ALU64 | BPF_NEG:
420 emit(A64_NEG(is64, dst, dst), ctx);
422 /* dst = BSWAP##imm(dst) */
423 case BPF_ALU | BPF_END | BPF_FROM_LE:
424 case BPF_ALU | BPF_END | BPF_FROM_BE:
425 #ifdef CONFIG_CPU_BIG_ENDIAN
426 if (BPF_SRC(code) == BPF_FROM_BE)
428 #else /* !CONFIG_CPU_BIG_ENDIAN */
429 if (BPF_SRC(code) == BPF_FROM_LE)
434 emit(A64_REV16(is64, dst, dst), ctx);
435 /* zero-extend 16 bits into 64 bits */
436 emit(A64_UXTH(is64, dst, dst), ctx);
439 emit(A64_REV32(is64, dst, dst), ctx);
440 /* upper 32 bits already cleared */
443 emit(A64_REV64(dst, dst), ctx);
450 /* zero-extend 16 bits into 64 bits */
451 emit(A64_UXTH(is64, dst, dst), ctx);
454 /* zero-extend 32 bits into 64 bits */
455 emit(A64_UXTW(is64, dst, dst), ctx);
463 case BPF_ALU | BPF_MOV | BPF_K:
464 case BPF_ALU64 | BPF_MOV | BPF_K:
465 emit_a64_mov_i(is64, dst, imm, ctx);
467 /* dst = dst OP imm */
468 case BPF_ALU | BPF_ADD | BPF_K:
469 case BPF_ALU64 | BPF_ADD | BPF_K:
470 emit_a64_mov_i(is64, tmp, imm, ctx);
471 emit(A64_ADD(is64, dst, dst, tmp), ctx);
473 case BPF_ALU | BPF_SUB | BPF_K:
474 case BPF_ALU64 | BPF_SUB | BPF_K:
475 emit_a64_mov_i(is64, tmp, imm, ctx);
476 emit(A64_SUB(is64, dst, dst, tmp), ctx);
478 case BPF_ALU | BPF_AND | BPF_K:
479 case BPF_ALU64 | BPF_AND | BPF_K:
480 emit_a64_mov_i(is64, tmp, imm, ctx);
481 emit(A64_AND(is64, dst, dst, tmp), ctx);
483 case BPF_ALU | BPF_OR | BPF_K:
484 case BPF_ALU64 | BPF_OR | BPF_K:
485 emit_a64_mov_i(is64, tmp, imm, ctx);
486 emit(A64_ORR(is64, dst, dst, tmp), ctx);
488 case BPF_ALU | BPF_XOR | BPF_K:
489 case BPF_ALU64 | BPF_XOR | BPF_K:
490 emit_a64_mov_i(is64, tmp, imm, ctx);
491 emit(A64_EOR(is64, dst, dst, tmp), ctx);
493 case BPF_ALU | BPF_MUL | BPF_K:
494 case BPF_ALU64 | BPF_MUL | BPF_K:
495 emit_a64_mov_i(is64, tmp, imm, ctx);
496 emit(A64_MUL(is64, dst, dst, tmp), ctx);
498 case BPF_ALU | BPF_DIV | BPF_K:
499 case BPF_ALU64 | BPF_DIV | BPF_K:
500 emit_a64_mov_i(is64, tmp, imm, ctx);
501 emit(A64_UDIV(is64, dst, dst, tmp), ctx);
503 case BPF_ALU | BPF_MOD | BPF_K:
504 case BPF_ALU64 | BPF_MOD | BPF_K:
505 emit_a64_mov_i(is64, tmp2, imm, ctx);
506 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
507 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
508 emit(A64_SUB(is64, dst, dst, tmp), ctx);
510 case BPF_ALU | BPF_LSH | BPF_K:
511 case BPF_ALU64 | BPF_LSH | BPF_K:
512 emit(A64_LSL(is64, dst, dst, imm), ctx);
514 case BPF_ALU | BPF_RSH | BPF_K:
515 case BPF_ALU64 | BPF_RSH | BPF_K:
516 emit(A64_LSR(is64, dst, dst, imm), ctx);
518 case BPF_ALU | BPF_ARSH | BPF_K:
519 case BPF_ALU64 | BPF_ARSH | BPF_K:
520 emit(A64_ASR(is64, dst, dst, imm), ctx);
524 case BPF_JMP | BPF_JA:
525 jmp_offset = bpf2a64_offset(i + off, i, ctx);
526 check_imm26(jmp_offset);
527 emit(A64_B(jmp_offset), ctx);
529 /* IF (dst COND src) JUMP off */
530 case BPF_JMP | BPF_JEQ | BPF_X:
531 case BPF_JMP | BPF_JGT | BPF_X:
532 case BPF_JMP | BPF_JLT | BPF_X:
533 case BPF_JMP | BPF_JGE | BPF_X:
534 case BPF_JMP | BPF_JLE | BPF_X:
535 case BPF_JMP | BPF_JNE | BPF_X:
536 case BPF_JMP | BPF_JSGT | BPF_X:
537 case BPF_JMP | BPF_JSLT | BPF_X:
538 case BPF_JMP | BPF_JSGE | BPF_X:
539 case BPF_JMP | BPF_JSLE | BPF_X:
540 emit(A64_CMP(1, dst, src), ctx);
542 jmp_offset = bpf2a64_offset(i + off, i, ctx);
543 check_imm19(jmp_offset);
544 switch (BPF_OP(code)) {
546 jmp_cond = A64_COND_EQ;
549 jmp_cond = A64_COND_HI;
552 jmp_cond = A64_COND_CC;
555 jmp_cond = A64_COND_CS;
558 jmp_cond = A64_COND_LS;
562 jmp_cond = A64_COND_NE;
565 jmp_cond = A64_COND_GT;
568 jmp_cond = A64_COND_LT;
571 jmp_cond = A64_COND_GE;
574 jmp_cond = A64_COND_LE;
579 emit(A64_B_(jmp_cond, jmp_offset), ctx);
581 case BPF_JMP | BPF_JSET | BPF_X:
582 emit(A64_TST(1, dst, src), ctx);
584 /* IF (dst COND imm) JUMP off */
585 case BPF_JMP | BPF_JEQ | BPF_K:
586 case BPF_JMP | BPF_JGT | BPF_K:
587 case BPF_JMP | BPF_JLT | BPF_K:
588 case BPF_JMP | BPF_JGE | BPF_K:
589 case BPF_JMP | BPF_JLE | BPF_K:
590 case BPF_JMP | BPF_JNE | BPF_K:
591 case BPF_JMP | BPF_JSGT | BPF_K:
592 case BPF_JMP | BPF_JSLT | BPF_K:
593 case BPF_JMP | BPF_JSGE | BPF_K:
594 case BPF_JMP | BPF_JSLE | BPF_K:
595 emit_a64_mov_i(1, tmp, imm, ctx);
596 emit(A64_CMP(1, dst, tmp), ctx);
598 case BPF_JMP | BPF_JSET | BPF_K:
599 emit_a64_mov_i(1, tmp, imm, ctx);
600 emit(A64_TST(1, dst, tmp), ctx);
603 case BPF_JMP | BPF_CALL:
605 const u8 r0 = bpf2a64[BPF_REG_0];
606 const u64 func = (u64)__bpf_call_base + imm;
608 emit_a64_mov_i64(tmp, func, ctx);
609 emit(A64_BLR(tmp), ctx);
610 emit(A64_MOV(1, r0, A64_R(0)), ctx);
614 case BPF_JMP | BPF_TAIL_CALL:
615 if (emit_bpf_tail_call(ctx))
618 /* function return */
619 case BPF_JMP | BPF_EXIT:
620 /* Optimization: when last instruction is EXIT,
621 simply fallthrough to epilogue. */
622 if (i == ctx->prog->len - 1)
624 jmp_offset = epilogue_offset(ctx);
625 check_imm26(jmp_offset);
626 emit(A64_B(jmp_offset), ctx);
630 case BPF_LD | BPF_IMM | BPF_DW:
632 const struct bpf_insn insn1 = insn[1];
635 imm64 = (u64)insn1.imm << 32 | (u32)imm;
636 emit_a64_mov_i64(dst, imm64, ctx);
641 /* LDX: dst = *(size *)(src + off) */
642 case BPF_LDX | BPF_MEM | BPF_W:
643 case BPF_LDX | BPF_MEM | BPF_H:
644 case BPF_LDX | BPF_MEM | BPF_B:
645 case BPF_LDX | BPF_MEM | BPF_DW:
646 emit_a64_mov_i(1, tmp, off, ctx);
647 switch (BPF_SIZE(code)) {
649 emit(A64_LDR32(dst, src, tmp), ctx);
652 emit(A64_LDRH(dst, src, tmp), ctx);
655 emit(A64_LDRB(dst, src, tmp), ctx);
658 emit(A64_LDR64(dst, src, tmp), ctx);
663 /* ST: *(size *)(dst + off) = imm */
664 case BPF_ST | BPF_MEM | BPF_W:
665 case BPF_ST | BPF_MEM | BPF_H:
666 case BPF_ST | BPF_MEM | BPF_B:
667 case BPF_ST | BPF_MEM | BPF_DW:
668 /* Load imm to a register then store it */
669 emit_a64_mov_i(1, tmp2, off, ctx);
670 emit_a64_mov_i(1, tmp, imm, ctx);
671 switch (BPF_SIZE(code)) {
673 emit(A64_STR32(tmp, dst, tmp2), ctx);
676 emit(A64_STRH(tmp, dst, tmp2), ctx);
679 emit(A64_STRB(tmp, dst, tmp2), ctx);
682 emit(A64_STR64(tmp, dst, tmp2), ctx);
687 /* STX: *(size *)(dst + off) = src */
688 case BPF_STX | BPF_MEM | BPF_W:
689 case BPF_STX | BPF_MEM | BPF_H:
690 case BPF_STX | BPF_MEM | BPF_B:
691 case BPF_STX | BPF_MEM | BPF_DW:
692 emit_a64_mov_i(1, tmp, off, ctx);
693 switch (BPF_SIZE(code)) {
695 emit(A64_STR32(src, dst, tmp), ctx);
698 emit(A64_STRH(src, dst, tmp), ctx);
701 emit(A64_STRB(src, dst, tmp), ctx);
704 emit(A64_STR64(src, dst, tmp), ctx);
708 /* STX XADD: lock *(u32 *)(dst + off) += src */
709 case BPF_STX | BPF_XADD | BPF_W:
710 /* STX XADD: lock *(u64 *)(dst + off) += src */
711 case BPF_STX | BPF_XADD | BPF_DW:
712 emit_a64_mov_i(1, tmp, off, ctx);
713 emit(A64_ADD(1, tmp, tmp, dst), ctx);
714 emit(A64_PRFM(tmp, PST, L1, STRM), ctx);
715 emit(A64_LDXR(isdw, tmp2, tmp), ctx);
716 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
717 emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx);
719 check_imm19(jmp_offset);
720 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
723 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
724 case BPF_LD | BPF_ABS | BPF_W:
725 case BPF_LD | BPF_ABS | BPF_H:
726 case BPF_LD | BPF_ABS | BPF_B:
727 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
728 case BPF_LD | BPF_IND | BPF_W:
729 case BPF_LD | BPF_IND | BPF_H:
730 case BPF_LD | BPF_IND | BPF_B:
732 const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
733 const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
734 const u8 fp = bpf2a64[BPF_REG_FP];
735 const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
736 const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
737 const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
738 const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
739 const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
742 emit(A64_MOV(1, r1, r6), ctx);
743 emit_a64_mov_i(0, r2, imm, ctx);
744 if (BPF_MODE(code) == BPF_IND)
745 emit(A64_ADD(0, r2, r2, src), ctx);
746 switch (BPF_SIZE(code)) {
759 emit_a64_mov_i64(r3, size, ctx);
760 emit(A64_SUB_I(1, r4, fp, ctx->stack_size), ctx);
761 emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
762 emit(A64_BLR(r5), ctx);
763 emit(A64_MOV(1, r0, A64_R(0)), ctx);
765 jmp_offset = epilogue_offset(ctx);
766 check_imm19(jmp_offset);
767 emit(A64_CBZ(1, r0, jmp_offset), ctx);
768 emit(A64_MOV(1, r5, r0), ctx);
769 switch (BPF_SIZE(code)) {
771 emit(A64_LDR32(r0, r5, A64_ZR), ctx);
772 #ifndef CONFIG_CPU_BIG_ENDIAN
773 emit(A64_REV32(0, r0, r0), ctx);
777 emit(A64_LDRH(r0, r5, A64_ZR), ctx);
778 #ifndef CONFIG_CPU_BIG_ENDIAN
779 emit(A64_REV16(0, r0, r0), ctx);
783 emit(A64_LDRB(r0, r5, A64_ZR), ctx);
789 pr_err_once("unknown opcode %02x\n", code);
796 static int build_body(struct jit_ctx *ctx)
798 const struct bpf_prog *prog = ctx->prog;
801 for (i = 0; i < prog->len; i++) {
802 const struct bpf_insn *insn = &prog->insnsi[i];
805 ret = build_insn(insn, ctx);
808 if (ctx->image == NULL)
809 ctx->offset[i] = ctx->idx;
812 if (ctx->image == NULL)
813 ctx->offset[i] = ctx->idx;
821 static int validate_code(struct jit_ctx *ctx)
825 for (i = 0; i < ctx->idx; i++) {
826 u32 a64_insn = le32_to_cpu(ctx->image[i]);
828 if (a64_insn == AARCH64_BREAK_FAULT)
835 static inline void bpf_flush_icache(void *start, void *end)
837 flush_icache_range((unsigned long)start, (unsigned long)end);
840 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
842 struct bpf_prog *tmp, *orig_prog = prog;
843 struct bpf_binary_header *header;
844 bool tmp_blinded = false;
852 tmp = bpf_jit_blind_constants(prog);
853 /* If blinding was requested and we failed during blinding,
854 * we must fall back to the interpreter.
863 memset(&ctx, 0, sizeof(ctx));
866 ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
867 if (ctx.offset == NULL) {
872 /* 1. Initial fake pass to compute ctx->idx. */
874 /* Fake pass to fill in ctx->offset. */
875 if (build_body(&ctx)) {
880 if (build_prologue(&ctx)) {
885 ctx.epilogue_offset = ctx.idx;
886 build_epilogue(&ctx);
888 /* Now we know the actual image size. */
889 image_size = sizeof(u32) * ctx.idx;
890 header = bpf_jit_binary_alloc(image_size, &image_ptr,
891 sizeof(u32), jit_fill_hole);
892 if (header == NULL) {
897 /* 2. Now, the actual pass. */
899 ctx.image = (__le32 *)image_ptr;
902 build_prologue(&ctx);
904 if (build_body(&ctx)) {
905 bpf_jit_binary_free(header);
910 build_epilogue(&ctx);
912 /* 3. Extra pass to validate JITed code. */
913 if (validate_code(&ctx)) {
914 bpf_jit_binary_free(header);
919 /* And we're done. */
920 if (bpf_jit_enable > 1)
921 bpf_jit_dump(prog->len, image_size, 2, ctx.image);
923 bpf_flush_icache(header, ctx.image + ctx.idx);
925 bpf_jit_binary_lock_ro(header);
926 prog->bpf_func = (void *)ctx.image;
928 prog->jited_len = image_size;
934 bpf_jit_prog_release_other(prog, prog == orig_prog ?