arch/arm64/kvm/hyp/sysreg-sr.c

   1 /*
   2  * Copyright (C) 2012-2015 - ARM Ltd
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/compiler.h>
  19 #include <linux/kvm_host.h>
  20
  21 #include <asm/kvm_asm.h>
  22 #include <asm/kvm_emulate.h>
  23 #include <asm/kvm_hyp.h>
  24
  25 /*
  26  * Non-VHE: Both host and guest must save everything.
  27  *
  28  * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and pstate,
  29  * which are handled as part of the el2 return state) on every switch.
  30  * tpidr_el0 and tpidrro_el0 only need to be switched when going
  31  * to host userspace or a different VCPU.  EL1 registers only need to be
  32  * switched when potentially going to run a different VCPU.  The latter two
  33  * classes are handled as part of kvm_arch_vcpu_load and kvm_arch_vcpu_put.
  34  */
  35
  36 static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
  37 {
  38         ctxt->sys_regs[MDSCR_EL1]       = read_sysreg(mdscr_el1);
  39
  40         /*
  41          * The host arm64 Linux uses sp_el0 to point to 'current' and it must
  42          * therefore be saved/restored on every entry/exit to/from the guest.
  43          */
  44         ctxt->gp_regs.regs.sp           = read_sysreg(sp_el0);
  45 }
  46
  47 static void __hyp_text __sysreg_save_user_state(struct kvm_cpu_context *ctxt)
  48 {
  49         ctxt->sys_regs[TPIDR_EL0]       = read_sysreg(tpidr_el0);
  50         ctxt->sys_regs[TPIDRRO_EL0]     = read_sysreg(tpidrro_el0);
  51 }
  52
  53 static void __hyp_text __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
  54 {
  55         ctxt->sys_regs[MPIDR_EL1]       = read_sysreg(vmpidr_el2);
  56         ctxt->sys_regs[CSSELR_EL1]      = read_sysreg(csselr_el1);
  57         ctxt->sys_regs[SCTLR_EL1]       = read_sysreg_el1(sctlr);
  58         ctxt->sys_regs[ACTLR_EL1]       = read_sysreg(actlr_el1);
  59         ctxt->sys_regs[CPACR_EL1]       = read_sysreg_el1(cpacr);
  60         ctxt->sys_regs[TTBR0_EL1]       = read_sysreg_el1(ttbr0);
  61         ctxt->sys_regs[TTBR1_EL1]       = read_sysreg_el1(ttbr1);
  62         ctxt->sys_regs[TCR_EL1]         = read_sysreg_el1(tcr);
  63         ctxt->sys_regs[ESR_EL1]         = read_sysreg_el1(esr);
  64         ctxt->sys_regs[AFSR0_EL1]       = read_sysreg_el1(afsr0);
  65         ctxt->sys_regs[AFSR1_EL1]       = read_sysreg_el1(afsr1);
  66         ctxt->sys_regs[FAR_EL1]         = read_sysreg_el1(far);
  67         ctxt->sys_regs[MAIR_EL1]        = read_sysreg_el1(mair);
  68         ctxt->sys_regs[VBAR_EL1]        = read_sysreg_el1(vbar);
  69         ctxt->sys_regs[CONTEXTIDR_EL1]  = read_sysreg_el1(contextidr);
  70         ctxt->sys_regs[AMAIR_EL1]       = read_sysreg_el1(amair);
  71         ctxt->sys_regs[CNTKCTL_EL1]     = read_sysreg_el1(cntkctl);
  72         ctxt->sys_regs[PAR_EL1]         = read_sysreg(par_el1);
  73         ctxt->sys_regs[TPIDR_EL1]       = read_sysreg(tpidr_el1);
  74
  75         ctxt->gp_regs.sp_el1            = read_sysreg(sp_el1);
  76         ctxt->gp_regs.elr_el1           = read_sysreg_el1(elr);
  77         ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
  78 }
  79
  80 static void __hyp_text __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
  81 {
  82         ctxt->gp_regs.regs.pc           = read_sysreg_el2(elr);
  83         ctxt->gp_regs.regs.pstate       = read_sysreg_el2(spsr);
  84
  85         if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
  86                 ctxt->sys_regs[DISR_EL1] = read_sysreg_s(SYS_VDISR_EL2);
  87 }
  88
  89 void __hyp_text __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt)
  90 {
  91         __sysreg_save_el1_state(ctxt);
  92         __sysreg_save_common_state(ctxt);
  93         __sysreg_save_user_state(ctxt);
  94         __sysreg_save_el2_return_state(ctxt);
  95 }
  96
  97 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt)
  98 {
  99         __sysreg_save_common_state(ctxt);
 100 }
 101
 102 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt)
 103 {
 104         __sysreg_save_common_state(ctxt);
 105         __sysreg_save_el2_return_state(ctxt);
 106 }
 107
 108 static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
 109 {
 110         write_sysreg(ctxt->sys_regs[MDSCR_EL1],   mdscr_el1);
 111
 112         /*
 113          * The host arm64 Linux uses sp_el0 to point to 'current' and it must
 114          * therefore be saved/restored on every entry/exit to/from the guest.
 115          */
 116         write_sysreg(ctxt->gp_regs.regs.sp,       sp_el0);
 117 }
 118
 119 static void __hyp_text __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)
 120 {
 121         write_sysreg(ctxt->sys_regs[TPIDR_EL0],         tpidr_el0);
 122         write_sysreg(ctxt->sys_regs[TPIDRRO_EL0],       tpidrro_el0);
 123 }
 124
 125 static void __hyp_text __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
 126 {
 127         write_sysreg(ctxt->sys_regs[MPIDR_EL1],         vmpidr_el2);
 128         write_sysreg(ctxt->sys_regs[CSSELR_EL1],        csselr_el1);
 129         write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1],     sctlr);
 130         write_sysreg(ctxt->sys_regs[ACTLR_EL1],         actlr_el1);
 131         write_sysreg_el1(ctxt->sys_regs[CPACR_EL1],     cpacr);
 132         write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1],     ttbr0);
 133         write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1],     ttbr1);
 134         write_sysreg_el1(ctxt->sys_regs[TCR_EL1],       tcr);
 135         write_sysreg_el1(ctxt->sys_regs[ESR_EL1],       esr);
 136         write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1],     afsr0);
 137         write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1],     afsr1);
 138         write_sysreg_el1(ctxt->sys_regs[FAR_EL1],       far);
 139         write_sysreg_el1(ctxt->sys_regs[MAIR_EL1],      mair);
 140         write_sysreg_el1(ctxt->sys_regs[VBAR_EL1],      vbar);
 141         write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
 142         write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1],     amair);
 143         write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1],   cntkctl);
 144         write_sysreg(ctxt->sys_regs[PAR_EL1],           par_el1);
 145         write_sysreg(ctxt->sys_regs[TPIDR_EL1],         tpidr_el1);
 146
 147         write_sysreg(ctxt->gp_regs.sp_el1,              sp_el1);
 148         write_sysreg_el1(ctxt->gp_regs.elr_el1,         elr);
 149         write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
 150 }
 151
 152 static void __hyp_text
 153 __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctxt)
 154 {
 155         u64 pstate = ctxt->gp_regs.regs.pstate;
 156         u64 mode = pstate & PSR_AA32_MODE_MASK;
 157
 158         /*
 159          * Safety check to ensure we're setting the CPU up to enter the guest
 160          * in a less privileged mode.
 161          *
 162          * If we are attempting a return to EL2 or higher in AArch64 state,
 163          * program SPSR_EL2 with M=EL2h and the IL bit set which ensures that
 164          * we'll take an illegal exception state exception immediately after
 165          * the ERET to the guest.  Attempts to return to AArch32 Hyp will
 166          * result in an illegal exception return because EL2's execution state
 167          * is determined by SCR_EL3.RW.
 168          */
 169         if (!(mode & PSR_MODE32_BIT) && mode >= PSR_MODE_EL2t)
 170                 pstate = PSR_MODE_EL2h | PSR_IL_BIT;
 171
 172         write_sysreg_el2(ctxt->gp_regs.regs.pc,         elr);
 173         write_sysreg_el2(pstate,                        spsr);
 174
 175         if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
 176                 write_sysreg_s(ctxt->sys_regs[DISR_EL1], SYS_VDISR_EL2);
 177 }
 178
 179 void __hyp_text __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt)
 180 {
 181         __sysreg_restore_el1_state(ctxt);
 182         __sysreg_restore_common_state(ctxt);
 183         __sysreg_restore_user_state(ctxt);
 184         __sysreg_restore_el2_return_state(ctxt);
 185 }
 186
 187 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt)
 188 {
 189         __sysreg_restore_common_state(ctxt);
 190 }
 191
 192 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt)
 193 {
 194         __sysreg_restore_common_state(ctxt);
 195         __sysreg_restore_el2_return_state(ctxt);
 196 }
 197
 198 void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
 199 {
 200         u64 *spsr, *sysreg;
 201
 202         if (!vcpu_el1_is_32bit(vcpu))
 203                 return;
 204
 205         spsr = vcpu->arch.ctxt.gp_regs.spsr;
 206         sysreg = vcpu->arch.ctxt.sys_regs;
 207
 208         spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
 209         spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
 210         spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
 211         spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
 212
 213         sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
 214         sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
 215
 216         if (has_vhe() || vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)
 217                 sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
 218 }
 219
 220 void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
 221 {
 222         u64 *spsr, *sysreg;
 223
 224         if (!vcpu_el1_is_32bit(vcpu))
 225                 return;
 226
 227         spsr = vcpu->arch.ctxt.gp_regs.spsr;
 228         sysreg = vcpu->arch.ctxt.sys_regs;
 229
 230         write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
 231         write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
 232         write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
 233         write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
 234
 235         write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
 236         write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
 237
 238         if (has_vhe() || vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)
 239                 write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
 240 }
 241
 242 /**
 243  * kvm_vcpu_load_sysregs - Load guest system registers to the physical CPU
 244  *
 245  * @vcpu: The VCPU pointer
 246  *
 247  * Load system registers that do not affect the host's execution, for
 248  * example EL1 system registers on a VHE system where the host kernel
 249  * runs at EL2.  This function is called from KVM's vcpu_load() function
 250  * and loading system register state early avoids having to load them on
 251  * every entry to the VM.
 252  */
 253 void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu)
 254 {
 255         struct kvm_cpu_context *host_ctxt = vcpu->arch.host_cpu_context;
 256         struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt;
 257
 258         if (!has_vhe())
 259                 return;
 260
 261         __sysreg_save_user_state(host_ctxt);
 262
 263         /*
 264          * Load guest EL1 and user state
 265          *
 266          * We must restore the 32-bit state before the sysregs, thanks
 267          * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72).
 268          */
 269         __sysreg32_restore_state(vcpu);
 270         __sysreg_restore_user_state(guest_ctxt);
 271         __sysreg_restore_el1_state(guest_ctxt);
 272
 273         vcpu->arch.sysregs_loaded_on_cpu = true;
 274
 275         activate_traps_vhe_load(vcpu);
 276 }
 277
 278 /**
 279  * kvm_vcpu_put_sysregs - Restore host system registers to the physical CPU
 280  *
 281  * @vcpu: The VCPU pointer
 282  *
 283  * Save guest system registers that do not affect the host's execution, for
 284  * example EL1 system registers on a VHE system where the host kernel
 285  * runs at EL2.  This function is called from KVM's vcpu_put() function
 286  * and deferring saving system register state until we're no longer running the
 287  * VCPU avoids having to save them on every exit from the VM.
 288  */
 289 void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu)
 290 {
 291         struct kvm_cpu_context *host_ctxt = vcpu->arch.host_cpu_context;
 292         struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt;
 293
 294         if (!has_vhe())
 295                 return;
 296
 297         deactivate_traps_vhe_put();
 298
 299         __sysreg_save_el1_state(guest_ctxt);
 300         __sysreg_save_user_state(guest_ctxt);
 301         __sysreg32_save_state(vcpu);
 302
 303         /* Restore host user state */
 304         __sysreg_restore_user_state(host_ctxt);
 305
 306         vcpu->arch.sysregs_loaded_on_cpu = false;
 307 }
 308
 309 void __hyp_text __kvm_enable_ssbs(void)
 310 {
 311         u64 tmp;
 312
 313         asm volatile(
 314         "mrs    %0, sctlr_el2\n"
 315         "orr    %0, %0, %1\n"
 316         "msr    sctlr_el2, %0"
 317         : "=&r" (tmp) : "L" (SCTLR_ELx_DSSBS));
 318 }