2 * Based on arch/arm/kernel/traps.c
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched/signal.h>
33 #include <linux/sched/debug.h>
34 #include <linux/sched/task_stack.h>
35 #include <linux/sizes.h>
36 #include <linux/syscalls.h>
37 #include <linux/mm_types.h>
39 #include <asm/atomic.h>
41 #include <asm/debug-monitors.h>
44 #include <asm/traps.h>
46 #include <asm/stack_pointer.h>
47 #include <asm/stacktrace.h>
48 #include <asm/exception.h>
49 #include <asm/system_misc.h>
50 #include <asm/sysreg.h>
52 static const char *handler[]= {
59 int show_unhandled_signals = 1;
62 * Dump out the contents of some kernel memory nicely...
64 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
72 * We need to switch to kernel mode so that we can use __get_user
73 * to safely read from kernel space.
78 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
80 for (first = bottom & ~31; first < top; first += 32) {
82 char str[sizeof(" 12345678") * 8 + 1];
84 memset(str, ' ', sizeof(str));
85 str[sizeof(str) - 1] = '\0';
87 for (p = first, i = 0; i < (32 / 8)
88 && p < top; i++, p += 8) {
89 if (p >= bottom && p < top) {
92 if (__get_user(val, (unsigned long *)p) == 0)
93 sprintf(str + i * 17, " %016lx", val);
95 sprintf(str + i * 17, " ????????????????");
98 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
104 static void dump_backtrace_entry(unsigned long where)
107 * Note that 'where' can have a physical address, but it's not handled.
112 static void __dump_instr(const char *lvl, struct pt_regs *regs)
114 unsigned long addr = instruction_pointer(regs);
115 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
118 for (i = -4; i < 1; i++) {
119 unsigned int val, bad;
121 bad = __get_user(val, &((u32 *)addr)[i]);
124 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
126 p += sprintf(p, "bad PC value");
130 printk("%sCode: %s\n", lvl, str);
133 static void dump_instr(const char *lvl, struct pt_regs *regs)
135 if (!user_mode(regs)) {
136 mm_segment_t fs = get_fs();
138 __dump_instr(lvl, regs);
141 __dump_instr(lvl, regs);
145 void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
147 struct stackframe frame;
150 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
155 if (!try_get_task_stack(tsk))
158 if (tsk == current) {
159 frame.fp = (unsigned long)__builtin_frame_address(0);
160 frame.pc = (unsigned long)dump_backtrace;
163 * task blocked in __switch_to
165 frame.fp = thread_saved_fp(tsk);
166 frame.pc = thread_saved_pc(tsk);
168 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
169 frame.graph = tsk->curr_ret_stack;
173 printk("Call trace:\n");
178 /* skip until specified stack frame */
180 dump_backtrace_entry(frame.pc);
181 } else if (frame.fp == regs->regs[29]) {
184 * Mostly, this is the case where this function is
185 * called in panic/abort. As exception handler's
186 * stack frame does not contain the corresponding pc
187 * at which an exception has taken place, use regs->pc
190 dump_backtrace_entry(regs->pc);
192 ret = unwind_frame(tsk, &frame);
195 if (in_entry_text(frame.pc)) {
196 stack = frame.fp - offsetof(struct pt_regs, stackframe);
198 if (on_accessible_stack(tsk, stack))
199 dump_mem("", "Exception stack", stack,
200 stack + sizeof(struct pt_regs));
207 void show_stack(struct task_struct *tsk, unsigned long *sp)
209 dump_backtrace(NULL, tsk);
213 #ifdef CONFIG_PREEMPT
214 #define S_PREEMPT " PREEMPT"
220 static int __die(const char *str, int err, struct pt_regs *regs)
222 struct task_struct *tsk = current;
223 static int die_counter;
226 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
227 str, err, ++die_counter);
229 /* trap and error numbers are mostly meaningless on ARM */
230 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
231 if (ret == NOTIFY_STOP)
236 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
237 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
240 if (!user_mode(regs)) {
241 dump_backtrace(regs, tsk);
242 dump_instr(KERN_EMERG, regs);
248 static DEFINE_RAW_SPINLOCK(die_lock);
251 * This function is protected against re-entrancy.
253 void die(const char *str, struct pt_regs *regs, int err)
258 raw_spin_lock_irqsave(&die_lock, flags);
264 ret = __die(str, err, regs);
266 if (regs && kexec_should_crash(current))
270 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
274 panic("Fatal exception in interrupt");
276 panic("Fatal exception");
278 raw_spin_unlock_irqrestore(&die_lock, flags);
280 if (ret != NOTIFY_STOP)
284 void arm64_notify_die(const char *str, struct pt_regs *regs,
285 struct siginfo *info, int err)
287 if (user_mode(regs)) {
288 current->thread.fault_address = 0;
289 current->thread.fault_code = err;
290 force_sig_info(info->si_signo, info, current);
296 static LIST_HEAD(undef_hook);
297 static DEFINE_RAW_SPINLOCK(undef_lock);
299 void register_undef_hook(struct undef_hook *hook)
303 raw_spin_lock_irqsave(&undef_lock, flags);
304 list_add(&hook->node, &undef_hook);
305 raw_spin_unlock_irqrestore(&undef_lock, flags);
308 void unregister_undef_hook(struct undef_hook *hook)
312 raw_spin_lock_irqsave(&undef_lock, flags);
313 list_del(&hook->node);
314 raw_spin_unlock_irqrestore(&undef_lock, flags);
317 static int call_undef_hook(struct pt_regs *regs)
319 struct undef_hook *hook;
322 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
323 void __user *pc = (void __user *)instruction_pointer(regs);
325 if (!user_mode(regs))
328 if (compat_thumb_mode(regs)) {
329 /* 16-bit Thumb instruction */
331 if (get_user(instr_le, (__le16 __user *)pc))
333 instr = le16_to_cpu(instr_le);
334 if (aarch32_insn_is_wide(instr)) {
337 if (get_user(instr_le, (__le16 __user *)(pc + 2)))
339 instr2 = le16_to_cpu(instr_le);
340 instr = (instr << 16) | instr2;
343 /* 32-bit ARM instruction */
345 if (get_user(instr_le, (__le32 __user *)pc))
347 instr = le32_to_cpu(instr_le);
350 raw_spin_lock_irqsave(&undef_lock, flags);
351 list_for_each_entry(hook, &undef_hook, node)
352 if ((instr & hook->instr_mask) == hook->instr_val &&
353 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
356 raw_spin_unlock_irqrestore(&undef_lock, flags);
358 return fn ? fn(regs, instr) : 1;
361 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
362 unsigned long address)
365 void __user *pc = (void __user *)instruction_pointer(regs);
370 desc = "undefined instruction";
373 desc = "illegal memory access";
380 if (unhandled_signal(current, signal) &&
381 show_unhandled_signals_ratelimited()) {
382 pr_info("%s[%d]: %s: pc=%p\n",
383 current->comm, task_pid_nr(current), desc, pc);
384 dump_instr(KERN_INFO, regs);
387 info.si_signo = signal;
392 arm64_notify_die(desc, regs, &info, 0);
396 * Set up process info to signal segmentation fault - called on access error.
398 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
402 down_read(¤t->mm->mmap_sem);
403 if (find_vma(current->mm, addr) == NULL)
407 up_read(¤t->mm->mmap_sem);
409 force_signal_inject(SIGSEGV, code, regs, addr);
412 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
414 /* check for AArch32 breakpoint instructions */
415 if (!aarch32_break_handler(regs))
418 if (call_undef_hook(regs) == 0)
421 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
424 int cpu_enable_cache_maint_trap(void *__unused)
426 config_sctlr_el1(SCTLR_EL1_UCI, 0);
430 #define __user_cache_maint(insn, address, res) \
431 if (address >= user_addr_max()) { \
434 uaccess_ttbr0_enable(); \
436 "1: " insn ", %1\n" \
439 " .pushsection .fixup,\"ax\"\n" \
441 "3: mov %w0, %w2\n" \
444 _ASM_EXTABLE(1b, 3b) \
446 : "r" (address), "i" (-EFAULT)); \
447 uaccess_ttbr0_disable(); \
450 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
452 unsigned long address;
453 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
454 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
457 address = untagged_addr(pt_regs_read_reg(regs, rt));
460 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
461 __user_cache_maint("dc civac", address, ret);
463 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
464 __user_cache_maint("dc civac", address, ret);
466 case ESR_ELx_SYS64_ISS_CRM_DC_CVAP: /* DC CVAP */
467 __user_cache_maint("sys 3, c7, c12, 1", address, ret);
469 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
470 __user_cache_maint("dc civac", address, ret);
472 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
473 __user_cache_maint("ic ivau", address, ret);
476 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
481 arm64_notify_segfault(regs, address);
486 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
488 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
489 unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
491 pt_regs_write_reg(regs, rt, val);
496 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
498 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
500 pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
504 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
506 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
508 pt_regs_write_reg(regs, rt, arch_timer_get_rate());
513 unsigned int esr_mask;
514 unsigned int esr_val;
515 void (*handler)(unsigned int esr, struct pt_regs *regs);
518 static struct sys64_hook sys64_hooks[] = {
520 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
521 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
522 .handler = user_cache_maint_handler,
525 /* Trap read access to CTR_EL0 */
526 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
527 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
528 .handler = ctr_read_handler,
531 /* Trap read access to CNTVCT_EL0 */
532 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
533 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
534 .handler = cntvct_read_handler,
537 /* Trap read access to CNTFRQ_EL0 */
538 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
539 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
540 .handler = cntfrq_read_handler,
545 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
547 struct sys64_hook *hook;
549 for (hook = sys64_hooks; hook->handler; hook++)
550 if ((hook->esr_mask & esr) == hook->esr_val) {
551 hook->handler(esr, regs);
556 * New SYS instructions may previously have been undefined at EL0. Fall
557 * back to our usual undefined instruction handler so that we handle
558 * these consistently.
563 long compat_arm_syscall(struct pt_regs *regs);
565 asmlinkage long do_ni_syscall(struct pt_regs *regs)
569 if (is_compat_task()) {
570 ret = compat_arm_syscall(regs);
576 if (show_unhandled_signals_ratelimited()) {
577 pr_info("%s[%d]: syscall %d\n", current->comm,
578 task_pid_nr(current), regs->syscallno);
579 dump_instr("", regs);
584 return sys_ni_syscall();
587 static const char *esr_class_str[] = {
588 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
589 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
590 [ESR_ELx_EC_WFx] = "WFI/WFE",
591 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
592 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
593 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
594 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
595 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
596 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
597 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
598 [ESR_ELx_EC_ILL] = "PSTATE.IL",
599 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
600 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
601 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
602 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
603 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
604 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
605 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
606 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
607 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
608 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
609 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
610 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
611 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
612 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
613 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
614 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
615 [ESR_ELx_EC_SERROR] = "SError",
616 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
617 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
618 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
619 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
620 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
621 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
622 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
623 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
624 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
627 const char *esr_get_class_string(u32 esr)
629 return esr_class_str[ESR_ELx_EC(esr)];
633 * bad_mode handles the impossible case in the exception vector. This is always
636 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
640 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
641 handler[reason], smp_processor_id(), esr,
642 esr_get_class_string(esr));
644 die("Oops - bad mode", regs, 0);
650 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
651 * exceptions taken from EL0. Unlike bad_mode, this returns.
653 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
656 void __user *pc = (void __user *)instruction_pointer(regs);
659 pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
660 smp_processor_id(), esr, esr_get_class_string(esr));
663 info.si_signo = SIGILL;
665 info.si_code = ILL_ILLOPC;
668 current->thread.fault_address = 0;
669 current->thread.fault_code = 0;
671 force_sig_info(info.si_signo, &info, current);
674 #ifdef CONFIG_VMAP_STACK
676 DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)
679 asmlinkage void handle_bad_stack(struct pt_regs *regs)
681 unsigned long tsk_stk = (unsigned long)current->stack;
682 unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr);
683 unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack);
684 unsigned int esr = read_sysreg(esr_el1);
685 unsigned long far = read_sysreg(far_el1);
688 pr_emerg("Insufficient stack space to handle exception!");
690 pr_emerg("ESR: 0x%08x -- %s\n", esr, esr_get_class_string(esr));
691 pr_emerg("FAR: 0x%016lx\n", far);
693 pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
694 tsk_stk, tsk_stk + THREAD_SIZE);
695 pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n",
696 irq_stk, irq_stk + THREAD_SIZE);
697 pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
698 ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE);
703 * We use nmi_panic to limit the potential for recusive overflows, and
704 * to get a better stack trace.
706 nmi_panic(NULL, "kernel stack overflow");
711 void __pte_error(const char *file, int line, unsigned long val)
713 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
716 void __pmd_error(const char *file, int line, unsigned long val)
718 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
721 void __pud_error(const char *file, int line, unsigned long val)
723 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
726 void __pgd_error(const char *file, int line, unsigned long val)
728 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
731 /* GENERIC_BUG traps */
733 int is_valid_bugaddr(unsigned long addr)
736 * bug_handler() only called for BRK #BUG_BRK_IMM.
737 * So the answer is trivial -- any spurious instances with no
738 * bug table entry will be rejected by report_bug() and passed
739 * back to the debug-monitors code and handled as a fatal
740 * unexpected debug exception.
745 static int bug_handler(struct pt_regs *regs, unsigned int esr)
748 return DBG_HOOK_ERROR;
750 switch (report_bug(regs->pc, regs)) {
751 case BUG_TRAP_TYPE_BUG:
752 die("Oops - BUG", regs, 0);
755 case BUG_TRAP_TYPE_WARN:
759 /* unknown/unrecognised bug trap type */
760 return DBG_HOOK_ERROR;
763 /* If thread survives, skip over the BUG instruction and continue: */
764 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */
765 return DBG_HOOK_HANDLED;
768 static struct break_hook bug_break_hook = {
769 .esr_val = 0xf2000000 | BUG_BRK_IMM,
770 .esr_mask = 0xffffffff,
775 * Initial handler for AArch64 BRK exceptions
776 * This handler only used until debug_traps_init().
778 int __init early_brk64(unsigned long addr, unsigned int esr,
779 struct pt_regs *regs)
781 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
784 /* This registration must happen early, before debug_traps_init(). */
785 void __init trap_init(void)
787 register_break_hook(&bug_break_hook);