2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * Derived from arch/arm/include/kvm_emulate.h
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef __ARM64_KVM_EMULATE_H__
23 #define __ARM64_KVM_EMULATE_H__
25 #include <linux/kvm_host.h>
27 #include <asm/debug-monitors.h>
29 #include <asm/kvm_arm.h>
30 #include <asm/kvm_hyp.h>
31 #include <asm/kvm_mmio.h>
32 #include <asm/ptrace.h>
33 #include <asm/cputype.h>
36 unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num);
37 unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu);
38 void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v);
40 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
41 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
43 void kvm_inject_undefined(struct kvm_vcpu *vcpu);
44 void kvm_inject_vabt(struct kvm_vcpu *vcpu);
45 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
46 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
47 void kvm_inject_undef32(struct kvm_vcpu *vcpu);
48 void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr);
49 void kvm_inject_pabt32(struct kvm_vcpu *vcpu, unsigned long addr);
51 static inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu)
53 return !(vcpu->arch.hcr_el2 & HCR_RW);
56 static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
58 vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
59 if (is_kernel_in_hyp_mode())
60 vcpu->arch.hcr_el2 |= HCR_E2H;
61 if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) {
62 /* route synchronous external abort exceptions to EL2 */
63 vcpu->arch.hcr_el2 |= HCR_TEA;
64 /* trap error record accesses */
65 vcpu->arch.hcr_el2 |= HCR_TERR;
67 if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
68 vcpu->arch.hcr_el2 |= HCR_FWB;
70 if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
71 vcpu->arch.hcr_el2 &= ~HCR_RW;
74 * TID3: trap feature register accesses that we virtualise.
75 * For now this is conditional, since no AArch32 feature regs
76 * are currently virtualised.
78 if (!vcpu_el1_is_32bit(vcpu))
79 vcpu->arch.hcr_el2 |= HCR_TID3;
82 static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
84 return (unsigned long *)&vcpu->arch.hcr_el2;
87 static inline void vcpu_clear_wfe_traps(struct kvm_vcpu *vcpu)
89 vcpu->arch.hcr_el2 &= ~HCR_TWE;
92 static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu)
94 vcpu->arch.hcr_el2 |= HCR_TWE;
97 static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu)
99 return vcpu->arch.vsesr_el2;
102 static inline void vcpu_set_vsesr(struct kvm_vcpu *vcpu, u64 vsesr)
104 vcpu->arch.vsesr_el2 = vsesr;
107 static inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu)
109 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pc;
112 static inline unsigned long *__vcpu_elr_el1(const struct kvm_vcpu *vcpu)
114 return (unsigned long *)&vcpu_gp_regs(vcpu)->elr_el1;
117 static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu)
119 if (vcpu->arch.sysregs_loaded_on_cpu)
120 return read_sysreg_el1(elr);
122 return *__vcpu_elr_el1(vcpu);
125 static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v)
127 if (vcpu->arch.sysregs_loaded_on_cpu)
128 write_sysreg_el1(v, elr);
130 *__vcpu_elr_el1(vcpu) = v;
133 static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
135 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pstate;
138 static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
140 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT);
143 static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
145 if (vcpu_mode_is_32bit(vcpu))
146 return kvm_condition_valid32(vcpu);
151 static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
153 *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT;
157 * vcpu_get_reg and vcpu_set_reg should always be passed a register number
158 * coming from a read of ESR_EL2. Otherwise, it may give the wrong result on
159 * AArch32 with banked registers.
161 static inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu,
164 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs.regs[reg_num];
167 static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
171 vcpu_gp_regs(vcpu)->regs.regs[reg_num] = val;
174 static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)
176 if (vcpu_mode_is_32bit(vcpu))
177 return vcpu_read_spsr32(vcpu);
179 if (vcpu->arch.sysregs_loaded_on_cpu)
180 return read_sysreg_el1(spsr);
182 return vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1];
185 static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
187 if (vcpu_mode_is_32bit(vcpu)) {
188 vcpu_write_spsr32(vcpu, v);
192 if (vcpu->arch.sysregs_loaded_on_cpu)
193 write_sysreg_el1(v, spsr);
195 vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v;
198 static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
202 if (vcpu_mode_is_32bit(vcpu)) {
203 mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK;
204 return mode > PSR_AA32_MODE_USR;
207 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
209 return mode != PSR_MODE_EL0t;
212 static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu)
214 return vcpu->arch.fault.esr_el2;
217 static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
219 u32 esr = kvm_vcpu_get_hsr(vcpu);
221 if (esr & ESR_ELx_CV)
222 return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT;
227 static inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vcpu)
229 return vcpu->arch.fault.far_el2;
232 static inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)
234 return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8;
237 static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)
239 return vcpu->arch.fault.disr_el1;
242 static inline u32 kvm_vcpu_hvc_get_imm(const struct kvm_vcpu *vcpu)
244 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_xVC_IMM_MASK;
247 static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu)
249 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV);
252 static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu)
254 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE);
257 static inline int kvm_vcpu_dabt_get_rd(const struct kvm_vcpu *vcpu)
259 return (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT;
262 static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu)
264 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW);
267 static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu)
269 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) ||
270 kvm_vcpu_dabt_iss1tw(vcpu); /* AF/DBM update */
273 static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu)
275 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM);
278 static inline int kvm_vcpu_dabt_get_as(const struct kvm_vcpu *vcpu)
280 return 1 << ((kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT);
283 /* This one is not specific to Data Abort */
284 static inline bool kvm_vcpu_trap_il_is32bit(const struct kvm_vcpu *vcpu)
286 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_IL);
289 static inline u8 kvm_vcpu_trap_get_class(const struct kvm_vcpu *vcpu)
291 return ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu));
294 static inline bool kvm_vcpu_trap_is_iabt(const struct kvm_vcpu *vcpu)
296 return kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_IABT_LOW;
299 static inline u8 kvm_vcpu_trap_get_fault(const struct kvm_vcpu *vcpu)
301 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC;
304 static inline u8 kvm_vcpu_trap_get_fault_type(const struct kvm_vcpu *vcpu)
306 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC_TYPE;
309 static inline bool kvm_vcpu_dabt_isextabt(const struct kvm_vcpu *vcpu)
311 switch (kvm_vcpu_trap_get_fault(vcpu)) {
328 static inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu)
330 u32 esr = kvm_vcpu_get_hsr(vcpu);
331 return ESR_ELx_SYS64_ISS_RT(esr);
334 static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu)
336 return vcpu_read_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK;
339 static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
341 if (vcpu_mode_is_32bit(vcpu)) {
342 *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT;
344 u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
346 vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1);
350 static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)
352 if (vcpu_mode_is_32bit(vcpu))
353 return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT);
355 return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & (1 << 25));
358 static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,
362 if (kvm_vcpu_is_be(vcpu)) {
367 return be16_to_cpu(data & 0xffff);
369 return be32_to_cpu(data & 0xffffffff);
371 return be64_to_cpu(data);
378 return le16_to_cpu(data & 0xffff);
380 return le32_to_cpu(data & 0xffffffff);
382 return le64_to_cpu(data);
386 return data; /* Leave LE untouched */
389 static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu,
393 if (kvm_vcpu_is_be(vcpu)) {
398 return cpu_to_be16(data & 0xffff);
400 return cpu_to_be32(data & 0xffffffff);
402 return cpu_to_be64(data);
409 return cpu_to_le16(data & 0xffff);
411 return cpu_to_le32(data & 0xffffffff);
413 return cpu_to_le64(data);
417 return data; /* Leave LE untouched */
420 static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
422 if (vcpu_mode_is_32bit(vcpu))
423 kvm_skip_instr32(vcpu, is_wide_instr);
427 /* advance the singlestep state machine */
428 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
432 * Skip an instruction which has been emulated at hyp while most guest sysregs
435 static inline void __hyp_text __kvm_skip_instr(struct kvm_vcpu *vcpu)
437 *vcpu_pc(vcpu) = read_sysreg_el2(elr);
438 vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr);
440 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
442 write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr);
443 write_sysreg_el2(*vcpu_pc(vcpu), elr);
446 #endif /* __ARM64_KVM_EMULATE_H__ */