arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for AM6 SoC Family MCU Domain peripherals
   4  *
   5  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 &cbass_mcu {
   9         mcu_uart0: serial@40a00000 {
  10                 compatible = "ti,am654-uart";
  11                         reg = <0x00 0x40a00000 0x00 0x100>;
  12                         reg-shift = <2>;
  13                         reg-io-width = <4>;
  14                         interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
  15                         clock-frequency = <96000000>;
  16                         current-speed = <115200>;
  17                         power-domains = <&k3_pds 149>;
  18         };
  19
  20         mcu_i2c0: i2c@40b00000 {
  21                 compatible = "ti,am654-i2c", "ti,omap4-i2c";
  22                 reg = <0x0 0x40b00000 0x0 0x100>;
  23                 interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>;
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26                 clock-names = "fck";
  27                 clocks = <&k3_clks 114 1>;
  28                 power-domains = <&k3_pds 114>;
  29         };
  30
  31         mcu_spi0: spi@40300000 {
  32                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  33                 reg = <0x0 0x40300000 0x0 0x400>;
  34                 interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
  35                 clocks = <&k3_clks 142 1>;
  36                 power-domains = <&k3_pds 142>;
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39         };
  40
  41         mcu_spi1: spi@40310000 {
  42                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  43                 reg = <0x0 0x40310000 0x0 0x400>;
  44                 interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
  45                 clocks = <&k3_clks 143 1>;
  46                 power-domains = <&k3_pds 143>;
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49         };
  50
  51         mcu_spi2: spi@40320000 {
  52                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  53                 reg = <0x0 0x40320000 0x0 0x400>;
  54                 interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
  55                 clocks = <&k3_clks 144 1>;
  56                 power-domains = <&k3_pds 144>;
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59         };
  60
  61         tscadc0: tscadc@40200000 {
  62                 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
  63                 reg = <0x0 0x40200000 0x0 0x1000>;
  64                 interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
  65                 clocks = <&k3_clks 0 2>;
  66                 assigned-clocks = <&k3_clks 0 2>;
  67                 assigned-clock-rates = <60000000>;
  68                 clock-names = "adc_tsc_fck";
  69
  70                 adc {
  71                         #io-channel-cells = <1>;
  72                         compatible = "ti,am654-adc", "ti,am3359-adc";
  73                 };
  74         };
  75
  76         tscadc1: tscadc@40210000 {
  77                 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
  78                 reg = <0x0 0x40210000 0x0 0x1000>;
  79                 interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
  80                 clocks = <&k3_clks 1 2>;
  81                 assigned-clocks = <&k3_clks 1 2>;
  82                 assigned-clock-rates = <60000000>;
  83                 clock-names = "adc_tsc_fck";
  84
  85                 adc {
  86                         #io-channel-cells = <1>;
  87                         compatible = "ti,am654-adc", "ti,am3359-adc";
  88                 };
  89         };
  90 };