arch/arm64/boot/dts/renesas/ulcb.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car Gen3 ULCB board
   4  *
   5  * Copyright (C) 2016 Renesas Electronics Corp.
   6  * Copyright (C) 2016 Cogent Embedded, Inc.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/input/input.h>
  11
  12 / {
  13         model = "Renesas R-Car Gen3 ULCB board";
  14
  15         aliases {
  16                 serial0 = &scif2;
  17                 ethernet0 = &avb;
  18         };
  19
  20         chosen {
  21                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  22                 stdout-path = "serial0:115200n8";
  23         };
  24
  25         audio_clkout: audio-clkout {
  26                 /*
  27                  * This is same as <&rcar_sound 0>
  28                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  29                  */
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <12288000>;
  33         };
  34
  35         hdmi0-out {
  36                 compatible = "hdmi-connector";
  37                 type = "a";
  38
  39                 port {
  40                         hdmi0_con: endpoint {
  41                         };
  42                 };
  43         };
  44
  45         keyboard {
  46                 compatible = "gpio-keys";
  47
  48                 key-1 {
  49                         linux,code = <KEY_1>;
  50                         label = "SW3";
  51                         wakeup-source;
  52                         debounce-interval = <20>;
  53                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  54                 };
  55         };
  56
  57         leds {
  58                 compatible = "gpio-leds";
  59
  60                 led5 {
  61                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  62                 };
  63                 led6 {
  64                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  65                 };
  66         };
  67
  68         reg_1p8v: regulator0 {
  69                 compatible = "regulator-fixed";
  70                 regulator-name = "fixed-1.8V";
  71                 regulator-min-microvolt = <1800000>;
  72                 regulator-max-microvolt = <1800000>;
  73                 regulator-boot-on;
  74                 regulator-always-on;
  75         };
  76
  77         reg_3p3v: regulator1 {
  78                 compatible = "regulator-fixed";
  79                 regulator-name = "fixed-3.3V";
  80                 regulator-min-microvolt = <3300000>;
  81                 regulator-max-microvolt = <3300000>;
  82                 regulator-boot-on;
  83                 regulator-always-on;
  84         };
  85
  86         rsnd_ak4613: sound {
  87                 compatible = "simple-audio-card";
  88
  89                 simple-audio-card,format = "left_j";
  90                 simple-audio-card,bitclock-master = <&sndcpu>;
  91                 simple-audio-card,frame-master = <&sndcpu>;
  92
  93                 sndcpu: simple-audio-card,cpu {
  94                         sound-dai = <&rcar_sound>;
  95                 };
  96
  97                 sndcodec: simple-audio-card,codec {
  98                         sound-dai = <&ak4613>;
  99                 };
 100         };
 101
 102         vcc_sdhi0: regulator-vcc-sdhi0 {
 103                 compatible = "regulator-fixed";
 104
 105                 regulator-name = "SDHI0 Vcc";
 106                 regulator-min-microvolt = <3300000>;
 107                 regulator-max-microvolt = <3300000>;
 108
 109                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 110                 enable-active-high;
 111         };
 112
 113         vccq_sdhi0: regulator-vccq-sdhi0 {
 114                 compatible = "regulator-gpio";
 115
 116                 regulator-name = "SDHI0 VccQ";
 117                 regulator-min-microvolt = <1800000>;
 118                 regulator-max-microvolt = <3300000>;
 119
 120                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 121                 gpios-states = <1>;
 122                 states = <3300000 1
 123                           1800000 0>;
 124         };
 125
 126         x12_clk: x12 {
 127                 compatible = "fixed-clock";
 128                 #clock-cells = <0>;
 129                 clock-frequency = <24576000>;
 130         };
 131
 132         x23_clk: x23-clock {
 133                 compatible = "fixed-clock";
 134                 #clock-cells = <0>;
 135                 clock-frequency = <25000000>;
 136         };
 137 };
 138
 139 &audio_clk_a {
 140         clock-frequency = <22579200>;
 141 };
 142
 143 &avb {
 144         pinctrl-0 = <&avb_pins>;
 145         pinctrl-names = "default";
 146         phy-handle = <&phy0>;
 147         phy-mode = "rgmii-txid";
 148         status = "okay";
 149
 150         phy0: ethernet-phy@0 {
 151                 rxc-skew-ps = <1500>;
 152                 reg = <0>;
 153                 interrupt-parent = <&gpio2>;
 154                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 155                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 156         };
 157 };
 158
 159 &du {
 160         status = "okay";
 161 };
 162
 163 &ehci1 {
 164         status = "okay";
 165 };
 166
 167 &extal_clk {
 168         clock-frequency = <16666666>;
 169 };
 170
 171 &extalr_clk {
 172         clock-frequency = <32768>;
 173 };
 174
 175 &hdmi0 {
 176         status = "okay";
 177
 178         ports {
 179                 port@1 {
 180                         reg = <1>;
 181                         rcar_dw_hdmi0_out: endpoint {
 182                                 remote-endpoint = <&hdmi0_con>;
 183                         };
 184                 };
 185         };
 186 };
 187
 188 &hdmi0_con {
 189         remote-endpoint = <&rcar_dw_hdmi0_out>;
 190 };
 191
 192 &i2c2 {
 193         pinctrl-0 = <&i2c2_pins>;
 194         pinctrl-names = "default";
 195
 196         status = "okay";
 197
 198         clock-frequency = <100000>;
 199
 200         ak4613: codec@10 {
 201                 compatible = "asahi-kasei,ak4613";
 202                 #sound-dai-cells = <0>;
 203                 reg = <0x10>;
 204                 clocks = <&rcar_sound 3>;
 205
 206                 asahi-kasei,in1-single-end;
 207                 asahi-kasei,in2-single-end;
 208                 asahi-kasei,out1-single-end;
 209                 asahi-kasei,out2-single-end;
 210                 asahi-kasei,out3-single-end;
 211                 asahi-kasei,out4-single-end;
 212                 asahi-kasei,out5-single-end;
 213                 asahi-kasei,out6-single-end;
 214         };
 215
 216         cs2000: clk-multiplier@4f {
 217                 #clock-cells = <0>;
 218                 compatible = "cirrus,cs2000-cp";
 219                 reg = <0x4f>;
 220                 clocks = <&audio_clkout>, <&x12_clk>;
 221                 clock-names = "clk_in", "ref_clk";
 222
 223                 assigned-clocks = <&cs2000>;
 224                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 225         };
 226 };
 227
 228 &i2c4 {
 229         status = "okay";
 230
 231         clock-frequency = <400000>;
 232
 233         versaclock5: clock-generator@6a {
 234                 compatible = "idt,5p49v5925";
 235                 reg = <0x6a>;
 236                 #clock-cells = <1>;
 237                 clocks = <&x23_clk>;
 238                 clock-names = "xin";
 239         };
 240 };
 241
 242 &i2c_dvfs {
 243         status = "okay";
 244
 245         clock-frequency = <400000>;
 246
 247         pmic: pmic@30 {
 248                 pinctrl-0 = <&irq0_pins>;
 249                 pinctrl-names = "default";
 250
 251                 compatible = "rohm,bd9571mwv";
 252                 reg = <0x30>;
 253                 interrupt-parent = <&intc_ex>;
 254                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 255                 interrupt-controller;
 256                 #interrupt-cells = <2>;
 257                 gpio-controller;
 258                 #gpio-cells = <2>;
 259                 rohm,ddr-backup-power = <0xf>;
 260                 rohm,rstbmode-pulse;
 261
 262                 regulators {
 263                         dvfs: dvfs {
 264                                 regulator-name = "dvfs";
 265                                 regulator-min-microvolt = <750000>;
 266                                 regulator-max-microvolt = <1030000>;
 267                                 regulator-boot-on;
 268                                 regulator-always-on;
 269                         };
 270                 };
 271         };
 272 };
 273
 274 &ohci1 {
 275         status = "okay";
 276 };
 277
 278 &pfc {
 279         pinctrl-0 = <&scif_clk_pins>;
 280         pinctrl-names = "default";
 281
 282         avb_pins: avb {
 283                 mux {
 284                         groups = "avb_link", "avb_mdio", "avb_mii";
 285                         function = "avb";
 286                 };
 287
 288                 pins_mdio {
 289                         groups = "avb_mdio";
 290                         drive-strength = <24>;
 291                 };
 292
 293                 pins_mii_tx {
 294                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 295                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 296                         drive-strength = <12>;
 297                 };
 298         };
 299
 300         i2c2_pins: i2c2 {
 301                 groups = "i2c2_a";
 302                 function = "i2c2";
 303         };
 304
 305         irq0_pins: irq0 {
 306                 groups = "intc_ex_irq0";
 307                 function = "intc_ex";
 308         };
 309
 310         scif2_pins: scif2 {
 311                 groups = "scif2_data_a";
 312                 function = "scif2";
 313         };
 314
 315         scif_clk_pins: scif_clk {
 316                 groups = "scif_clk_a";
 317                 function = "scif_clk";
 318         };
 319
 320         sdhi0_pins: sd0 {
 321                 groups = "sdhi0_data4", "sdhi0_ctrl";
 322                 function = "sdhi0";
 323                 power-source = <3300>;
 324         };
 325
 326         sdhi0_pins_uhs: sd0_uhs {
 327                 groups = "sdhi0_data4", "sdhi0_ctrl";
 328                 function = "sdhi0";
 329                 power-source = <1800>;
 330         };
 331
 332         sdhi2_pins: sd2 {
 333                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 334                 function = "sdhi2";
 335                 power-source = <1800>;
 336         };
 337
 338         sound_pins: sound {
 339                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 340                 function = "ssi";
 341         };
 342
 343         sound_clk_pins: sound-clk {
 344                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 345                          "audio_clkout_a", "audio_clkout3_a";
 346                 function = "audio_clk";
 347         };
 348
 349         usb1_pins: usb1 {
 350                 groups = "usb1";
 351                 function = "usb1";
 352         };
 353 };
 354
 355 &rcar_sound {
 356         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 357         pinctrl-names = "default";
 358
 359         /* Single DAI */
 360         #sound-dai-cells = <0>;
 361
 362         /* audio_clkout0/1/2/3 */
 363         #clock-cells = <1>;
 364         clock-frequency = <12288000 11289600>;
 365
 366         status = "okay";
 367
 368         /* update <audio_clk_b> to <cs2000> */
 369         clocks = <&cpg CPG_MOD 1005>,
 370                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 371                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 372                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 373                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 374                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 375                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 376                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 377                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 378                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 379                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 380                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 381                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 382                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 383                  <&audio_clk_a>, <&cs2000>,
 384                  <&audio_clk_c>,
 385                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 386
 387         rcar_sound,dai {
 388                 dai0 {
 389                         playback = <&ssi0 &src0 &dvc0>;
 390                         capture  = <&ssi1 &src1 &dvc1>;
 391                 };
 392         };
 393 };
 394
 395 &scif2 {
 396         pinctrl-0 = <&scif2_pins>;
 397         pinctrl-names = "default";
 398
 399         status = "okay";
 400 };
 401
 402 &scif_clk {
 403         clock-frequency = <14745600>;
 404 };
 405
 406 &sdhi0 {
 407         pinctrl-0 = <&sdhi0_pins>;
 408         pinctrl-1 = <&sdhi0_pins_uhs>;
 409         pinctrl-names = "default", "state_uhs";
 410
 411         vmmc-supply = <&vcc_sdhi0>;
 412         vqmmc-supply = <&vccq_sdhi0>;
 413         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 414         bus-width = <4>;
 415         sd-uhs-sdr50;
 416         sd-uhs-sdr104;
 417         status = "okay";
 418 };
 419
 420 &sdhi2 {
 421         /* used for on-board 8bit eMMC */
 422         pinctrl-0 = <&sdhi2_pins>;
 423         pinctrl-1 = <&sdhi2_pins>;
 424         pinctrl-names = "default", "state_uhs";
 425
 426         vmmc-supply = <&reg_3p3v>;
 427         vqmmc-supply = <&reg_1p8v>;
 428         bus-width = <8>;
 429         mmc-hs200-1_8v;
 430         non-removable;
 431         status = "okay";
 432 };
 433
 434 &ssi1 {
 435         shared-pin;
 436 };
 437
 438 &usb2_phy1 {
 439         pinctrl-0 = <&usb1_pins>;
 440         pinctrl-names = "default";
 441
 442         status = "okay";
 443 };
 444
 445 &rwdt {
 446         timeout-sec = <60>;
 447         status = "okay";
 448 };