Merge remote-tracking branches 'spi/topic/sh-msiof', 'spi/topic/stm32', 'spi/topic...
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / renesas / salvator-common.dtsi
1 /*
2  * Device Tree Source for common parts of Salvator-X board variants
3  *
4  * Copyright (C) 2015-2016 Renesas Electronics Corp.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 /*
12  * SSI-AK4613
13  *
14  * This command is required when Playback/Capture
15  *
16  *      amixer set "DVC Out" 100%
17  *      amixer set "DVC In" 100%
18  *
19  * You can use Mute
20  *
21  *      amixer set "DVC Out Mute" on
22  *      amixer set "DVC In Mute" on
23  *
24  * You can use Volume Ramp
25  *
26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
28  *      amixer set "DVC Out Ramp" on
29  *      aplay xxx.wav &
30  *      amixer set "DVC Out"  80%  // Volume Down
31  *      amixer set "DVC Out" 100%  // Volume Up
32  */
33
34 #include <dt-bindings/gpio/gpio.h>
35
36 / {
37         aliases {
38                 serial0 = &scif2;
39                 serial1 = &scif1;
40                 ethernet0 = &avb;
41         };
42
43         chosen {
44                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
45                 stdout-path = "serial0:115200n8";
46         };
47
48         audio_clkout: audio-clkout {
49                 /*
50                  * This is same as <&rcar_sound 0>
51                  * but needed to avoid cs2000/rcar_sound probe dead-lock
52                  */
53                 compatible = "fixed-clock";
54                 #clock-cells = <0>;
55                 clock-frequency = <11289600>;
56         };
57
58         backlight: backlight {
59                 compatible = "pwm-backlight";
60                 pwms = <&pwm1 0 50000>;
61
62                 brightness-levels = <256 128 64 16 8 4 0>;
63                 default-brightness-level = <6>;
64
65                 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
66         };
67
68         reg_1p8v: regulator0 {
69                 compatible = "regulator-fixed";
70                 regulator-name = "fixed-1.8V";
71                 regulator-min-microvolt = <1800000>;
72                 regulator-max-microvolt = <1800000>;
73                 regulator-boot-on;
74                 regulator-always-on;
75         };
76
77         reg_3p3v: regulator1 {
78                 compatible = "regulator-fixed";
79                 regulator-name = "fixed-3.3V";
80                 regulator-min-microvolt = <3300000>;
81                 regulator-max-microvolt = <3300000>;
82                 regulator-boot-on;
83                 regulator-always-on;
84         };
85
86         rsnd_ak4613: sound {
87                 compatible = "simple-audio-card";
88
89                 simple-audio-card,format = "left_j";
90                 simple-audio-card,bitclock-master = <&sndcpu>;
91                 simple-audio-card,frame-master = <&sndcpu>;
92
93                 sndcpu: simple-audio-card,cpu {
94                         sound-dai = <&rcar_sound>;
95                 };
96
97                 sndcodec: simple-audio-card,codec {
98                         sound-dai = <&ak4613>;
99                 };
100         };
101
102         vbus0_usb2: regulator-vbus0-usb2 {
103                 compatible = "regulator-fixed";
104
105                 regulator-name = "USB20_VBUS0";
106                 regulator-min-microvolt = <5000000>;
107                 regulator-max-microvolt = <5000000>;
108
109                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
110                 enable-active-high;
111         };
112
113         vcc_sdhi0: regulator-vcc-sdhi0 {
114                 compatible = "regulator-fixed";
115
116                 regulator-name = "SDHI0 Vcc";
117                 regulator-min-microvolt = <3300000>;
118                 regulator-max-microvolt = <3300000>;
119
120                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
121                 enable-active-high;
122         };
123
124         vccq_sdhi0: regulator-vccq-sdhi0 {
125                 compatible = "regulator-gpio";
126
127                 regulator-name = "SDHI0 VccQ";
128                 regulator-min-microvolt = <1800000>;
129                 regulator-max-microvolt = <3300000>;
130
131                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
132                 gpios-states = <1>;
133                 states = <3300000 1
134                           1800000 0>;
135         };
136
137         vcc_sdhi3: regulator-vcc-sdhi3 {
138                 compatible = "regulator-fixed";
139
140                 regulator-name = "SDHI3 Vcc";
141                 regulator-min-microvolt = <3300000>;
142                 regulator-max-microvolt = <3300000>;
143
144                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
145                 enable-active-high;
146         };
147
148         vccq_sdhi3: regulator-vccq-sdhi3 {
149                 compatible = "regulator-gpio";
150
151                 regulator-name = "SDHI3 VccQ";
152                 regulator-min-microvolt = <1800000>;
153                 regulator-max-microvolt = <3300000>;
154
155                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
156                 gpios-states = <1>;
157                 states = <3300000 1
158                           1800000 0>;
159         };
160
161         hdmi0-out {
162                 compatible = "hdmi-connector";
163                 label = "HDMI0 OUT";
164                 type = "a";
165
166                 port {
167                         hdmi0_con: endpoint {
168                         };
169                 };
170         };
171
172         hdmi1-out {
173                 compatible = "hdmi-connector";
174                 label = "HDMI1 OUT";
175                 type = "a";
176
177                 port {
178                         hdmi1_con: endpoint {
179                         };
180                 };
181         };
182
183         vga {
184                 compatible = "vga-connector";
185
186                 port {
187                         vga_in: endpoint {
188                                 remote-endpoint = <&adv7123_out>;
189                         };
190                 };
191         };
192
193         vga-encoder {
194                 compatible = "adi,adv7123";
195
196                 ports {
197                         #address-cells = <1>;
198                         #size-cells = <0>;
199
200                         port@0 {
201                                 reg = <0>;
202                                 adv7123_in: endpoint {
203                                         remote-endpoint = <&du_out_rgb>;
204                                 };
205                         };
206                         port@1 {
207                                 reg = <1>;
208                                 adv7123_out: endpoint {
209                                         remote-endpoint = <&vga_in>;
210                                 };
211                         };
212                 };
213         };
214
215         x12_clk: x12 {
216                 compatible = "fixed-clock";
217                 #clock-cells = <0>;
218                 clock-frequency = <24576000>;
219         };
220
221         /* External DU dot clocks */
222         x21_clk: x21-clock {
223                 compatible = "fixed-clock";
224                 #clock-cells = <0>;
225                 clock-frequency = <33000000>;
226         };
227
228         x22_clk: x22-clock {
229                 compatible = "fixed-clock";
230                 #clock-cells = <0>;
231                 clock-frequency = <33000000>;
232         };
233
234         x23_clk: x23-clock {
235                 compatible = "fixed-clock";
236                 #clock-cells = <0>;
237                 clock-frequency = <25000000>;
238         };
239 };
240
241 &audio_clk_a {
242         clock-frequency = <22579200>;
243 };
244
245 &avb {
246         pinctrl-0 = <&avb_pins>;
247         pinctrl-names = "default";
248         renesas,no-ether-link;
249         phy-handle = <&phy0>;
250         status = "okay";
251
252         phy0: ethernet-phy@0 {
253                 rxc-skew-ps = <1500>;
254                 reg = <0>;
255                 interrupt-parent = <&gpio2>;
256                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
257         };
258 };
259
260 &du {
261         pinctrl-0 = <&du_pins>;
262         pinctrl-names = "default";
263         status = "okay";
264
265         ports {
266                 port@0 {
267                         endpoint {
268                                 remote-endpoint = <&adv7123_in>;
269                         };
270                 };
271                 port@3 {
272                         lvds_connector: endpoint {
273                         };
274                 };
275         };
276 };
277
278 &ehci0 {
279         status = "okay";
280 };
281
282 &ehci1 {
283         status = "okay";
284 };
285
286 &extalr_clk {
287         clock-frequency = <32768>;
288 };
289
290 &hsusb {
291         status = "okay";
292 };
293
294 &i2c2 {
295         pinctrl-0 = <&i2c2_pins>;
296         pinctrl-names = "default";
297
298         status = "okay";
299
300         clock-frequency = <100000>;
301
302         ak4613: codec@10 {
303                 compatible = "asahi-kasei,ak4613";
304                 #sound-dai-cells = <0>;
305                 reg = <0x10>;
306                 clocks = <&rcar_sound 3>;
307
308                 asahi-kasei,in1-single-end;
309                 asahi-kasei,in2-single-end;
310                 asahi-kasei,out1-single-end;
311                 asahi-kasei,out2-single-end;
312                 asahi-kasei,out3-single-end;
313                 asahi-kasei,out4-single-end;
314                 asahi-kasei,out5-single-end;
315                 asahi-kasei,out6-single-end;
316         };
317
318         cs2000: clk_multiplier@4f {
319                 #clock-cells = <0>;
320                 compatible = "cirrus,cs2000-cp";
321                 reg = <0x4f>;
322                 clocks = <&audio_clkout>, <&x12_clk>;
323                 clock-names = "clk_in", "ref_clk";
324
325                 assigned-clocks = <&cs2000>;
326                 assigned-clock-rates = <24576000>; /* 1/1 divide */
327         };
328 };
329
330 &i2c4 {
331         status = "okay";
332
333         csa_vdd: adc@7c {
334                 compatible = "maxim,max9611";
335                 reg = <0x7c>;
336
337                 shunt-resistor-micro-ohms = <5000>;
338         };
339
340         csa_dvfs: adc@7f {
341                 compatible = "maxim,max9611";
342                 reg = <0x7f>;
343
344                 shunt-resistor-micro-ohms = <5000>;
345         };
346 };
347
348 &i2c_dvfs {
349         status = "okay";
350 };
351
352 &ohci0 {
353         status = "okay";
354 };
355
356 &ohci1 {
357         status = "okay";
358 };
359
360 &pcie_bus_clk {
361         clock-frequency = <100000000>;
362 };
363
364 &pciec0 {
365         status = "okay";
366 };
367
368 &pciec1 {
369         status = "okay";
370 };
371
372 &pfc {
373         pinctrl-0 = <&scif_clk_pins>;
374         pinctrl-names = "default";
375
376         avb_pins: avb {
377                 mux {
378                         groups = "avb_link", "avb_phy_int", "avb_mdc",
379                                  "avb_mii";
380                         function = "avb";
381                 };
382
383                 pins_mdc {
384                         groups = "avb_mdc";
385                         drive-strength = <24>;
386                 };
387
388                 pins_mii_tx {
389                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
390                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
391                         drive-strength = <12>;
392                 };
393         };
394
395         du_pins: du {
396                 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
397                 function = "du";
398         };
399
400         i2c2_pins: i2c2 {
401                 groups = "i2c2_a";
402                 function = "i2c2";
403         };
404
405         pwm1_pins: pwm1 {
406                 groups = "pwm1_a";
407                 function = "pwm1";
408         };
409
410         scif1_pins: scif1 {
411                 groups = "scif1_data_a", "scif1_ctrl";
412                 function = "scif1";
413         };
414
415         scif2_pins: scif2 {
416                 groups = "scif2_data_a";
417                 function = "scif2";
418         };
419
420         scif_clk_pins: scif_clk {
421                 groups = "scif_clk_a";
422                 function = "scif_clk";
423         };
424
425         sdhi0_pins: sd0 {
426                 groups = "sdhi0_data4", "sdhi0_ctrl";
427                 function = "sdhi0";
428                 power-source = <3300>;
429         };
430
431         sdhi0_pins_uhs: sd0_uhs {
432                 groups = "sdhi0_data4", "sdhi0_ctrl";
433                 function = "sdhi0";
434                 power-source = <1800>;
435         };
436
437         sdhi2_pins: sd2 {
438                 groups = "sdhi2_data8", "sdhi2_ctrl";
439                 function = "sdhi2";
440                 power-source = <3300>;
441         };
442
443         sdhi2_pins_uhs: sd2_uhs {
444                 groups = "sdhi2_data8", "sdhi2_ctrl";
445                 function = "sdhi2";
446                 power-source = <1800>;
447         };
448
449         sdhi3_pins: sd3 {
450                 groups = "sdhi3_data4", "sdhi3_ctrl";
451                 function = "sdhi3";
452                 power-source = <3300>;
453         };
454
455         sdhi3_pins_uhs: sd3_uhs {
456                 groups = "sdhi3_data4", "sdhi3_ctrl";
457                 function = "sdhi3";
458                 power-source = <1800>;
459         };
460
461         sound_pins: sound {
462                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
463                 function = "ssi";
464         };
465
466         sound_clk_pins: sound_clk {
467                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
468                          "audio_clkout_a", "audio_clkout3_a";
469                 function = "audio_clk";
470         };
471
472         usb0_pins: usb0 {
473                 groups = "usb0";
474                 function = "usb0";
475         };
476
477         usb1_pins: usb1 {
478                 mux {
479                         groups = "usb1";
480                         function = "usb1";
481                 };
482
483                 ovc {
484                         pins = "GP_6_27";
485                         bias-pull-up;
486                 };
487
488                 pwen {
489                         pins = "GP_6_26";
490                         bias-pull-down;
491                 };
492         };
493 };
494
495 &pwm1 {
496         pinctrl-0 = <&pwm1_pins>;
497         pinctrl-names = "default";
498
499         status = "okay";
500 };
501
502 &rcar_sound {
503         pinctrl-0 = <&sound_pins &sound_clk_pins>;
504         pinctrl-names = "default";
505
506         /* Single DAI */
507         #sound-dai-cells = <0>;
508
509         /* audio_clkout0/1/2/3 */
510         #clock-cells = <1>;
511         clock-frequency = <12288000 11289600>;
512
513         status = "okay";
514
515         /* update <audio_clk_b> to <cs2000> */
516         clocks = <&cpg CPG_MOD 1005>,
517                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
518                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
519                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
520                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
521                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
522                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
523                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
524                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
525                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
526                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
527                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
528                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
529                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
530                  <&audio_clk_a>, <&cs2000>,
531                  <&audio_clk_c>,
532                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
533
534         rcar_sound,dai {
535                 dai0 {
536                         playback = <&ssi0 &src0 &dvc0>;
537                         capture  = <&ssi1 &src1 &dvc1>;
538                 };
539         };
540 };
541
542 &scif1 {
543         pinctrl-0 = <&scif1_pins>;
544         pinctrl-names = "default";
545
546         uart-has-rtscts;
547         status = "okay";
548 };
549
550 &scif2 {
551         pinctrl-0 = <&scif2_pins>;
552         pinctrl-names = "default";
553
554         status = "okay";
555 };
556
557 &scif_clk {
558         clock-frequency = <14745600>;
559 };
560
561 &sdhi0 {
562         pinctrl-0 = <&sdhi0_pins>;
563         pinctrl-1 = <&sdhi0_pins_uhs>;
564         pinctrl-names = "default", "state_uhs";
565
566         vmmc-supply = <&vcc_sdhi0>;
567         vqmmc-supply = <&vccq_sdhi0>;
568         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
569         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
570         bus-width = <4>;
571         sd-uhs-sdr50;
572         status = "okay";
573 };
574
575 &sdhi2 {
576         /* used for on-board 8bit eMMC */
577         pinctrl-0 = <&sdhi2_pins>;
578         pinctrl-1 = <&sdhi2_pins_uhs>;
579         pinctrl-names = "default", "state_uhs";
580
581         vmmc-supply = <&reg_3p3v>;
582         vqmmc-supply = <&reg_1p8v>;
583         bus-width = <8>;
584         mmc-hs200-1_8v;
585         non-removable;
586         status = "okay";
587 };
588
589 &sdhi3 {
590         pinctrl-0 = <&sdhi3_pins>;
591         pinctrl-1 = <&sdhi3_pins_uhs>;
592         pinctrl-names = "default", "state_uhs";
593
594         vmmc-supply = <&vcc_sdhi3>;
595         vqmmc-supply = <&vccq_sdhi3>;
596         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
597         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
598         bus-width = <4>;
599         sd-uhs-sdr50;
600         status = "okay";
601 };
602
603 &ssi1 {
604         shared-pin;
605 };
606
607 &usb2_phy0 {
608         pinctrl-0 = <&usb0_pins>;
609         pinctrl-names = "default";
610
611         vbus-supply = <&vbus0_usb2>;
612         status = "okay";
613 };
614
615 &usb2_phy1 {
616         pinctrl-0 = <&usb1_pins>;
617         pinctrl-names = "default";
618
619         status = "okay";
620 };
621
622 &wdt0 {
623         timeout-sec = <60>;
624         status = "okay";
625 };
626
627 &xhci0 {
628         status = "okay";
629 };