arch/arm64/boot/dts/renesas/r8a77995-draak.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Draak board
   4  *
   5  * Copyright (C) 2016-2018 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Glider bvba
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a77995.dtsi"
  11 #include <dt-bindings/gpio/gpio.h>
  12
  13 / {
  14         model = "Renesas Draak board based on r8a77995";
  15         compatible = "renesas,draak", "renesas,r8a77995";
  16
  17         aliases {
  18                 serial0 = &scif2;
  19                 ethernet0 = &avb;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         composite-in {
  28                 compatible = "composite-video-connector";
  29
  30                 port {
  31                         composite_con_in: endpoint {
  32                                 remote-endpoint = <&adv7180_in>;
  33                         };
  34                 };
  35         };
  36
  37         hdmi-in {
  38                 compatible = "hdmi-connector";
  39                 type = "a";
  40
  41                 port {
  42                         hdmi_con_in: endpoint {
  43                                 remote-endpoint = <&adv7612_in>;
  44                         };
  45                 };
  46         };
  47
  48         hdmi-out {
  49                 compatible = "hdmi-connector";
  50                 type = "a";
  51
  52                 port {
  53                         hdmi_con_out: endpoint {
  54                                 remote-endpoint = <&adv7511_out>;
  55                         };
  56                 };
  57         };
  58
  59         lvds-decoder {
  60                 compatible = "thine,thc63lvd1024";
  61                 vcc-supply = <&reg_3p3v>;
  62
  63                 ports {
  64                         #address-cells = <1>;
  65                         #size-cells = <0>;
  66
  67                         port@0 {
  68                                 reg = <0>;
  69                                 thc63lvd1024_in: endpoint {
  70                                         remote-endpoint = <&lvds0_out>;
  71                                 };
  72                         };
  73
  74                         port@2 {
  75                                 reg = <2>;
  76                                 thc63lvd1024_out: endpoint {
  77                                         remote-endpoint = <&adv7511_in>;
  78                                 };
  79                         };
  80                 };
  81         };
  82
  83         memory@48000000 {
  84                 device_type = "memory";
  85                 /* first 128MB is reserved for secure area. */
  86                 reg = <0x0 0x48000000 0x0 0x18000000>;
  87         };
  88
  89         reg_1p8v: regulator0 {
  90                 compatible = "regulator-fixed";
  91                 regulator-name = "fixed-1.8V";
  92                 regulator-min-microvolt = <1800000>;
  93                 regulator-max-microvolt = <1800000>;
  94                 regulator-boot-on;
  95                 regulator-always-on;
  96         };
  97
  98         reg_3p3v: regulator1 {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "fixed-3.3V";
 101                 regulator-min-microvolt = <3300000>;
 102                 regulator-max-microvolt = <3300000>;
 103                 regulator-boot-on;
 104                 regulator-always-on;
 105         };
 106
 107         vga {
 108                 compatible = "vga-connector";
 109
 110                 port {
 111                         vga_in: endpoint {
 112                                 remote-endpoint = <&adv7123_out>;
 113                         };
 114                 };
 115         };
 116
 117         vga-encoder {
 118                 compatible = "adi,adv7123";
 119
 120                 ports {
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123
 124                         port@0 {
 125                                 reg = <0>;
 126                                 adv7123_in: endpoint {
 127                                         remote-endpoint = <&du_out_rgb>;
 128                                 };
 129                         };
 130                         port@1 {
 131                                 reg = <1>;
 132                                 adv7123_out: endpoint {
 133                                         remote-endpoint = <&vga_in>;
 134                                 };
 135                         };
 136                 };
 137         };
 138
 139         x12_clk: x12 {
 140                 compatible = "fixed-clock";
 141                 #clock-cells = <0>;
 142                 clock-frequency = <74250000>;
 143         };
 144 };
 145
 146 &avb {
 147         pinctrl-0 = <&avb0_pins>;
 148         pinctrl-names = "default";
 149         renesas,no-ether-link;
 150         phy-handle = <&phy0>;
 151         phy-mode = "rgmii-txid";
 152         status = "okay";
 153
 154         phy0: ethernet-phy@0 {
 155                 rxc-skew-ps = <1500>;
 156                 reg = <0>;
 157                 interrupt-parent = <&gpio5>;
 158                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 159         };
 160 };
 161
 162 &du {
 163         pinctrl-0 = <&du_pins>;
 164         pinctrl-names = "default";
 165         status = "okay";
 166
 167         clocks = <&cpg CPG_MOD 724>,
 168                  <&cpg CPG_MOD 723>,
 169                  <&x12_clk>;
 170         clock-names = "du.0", "du.1", "dclkin.0";
 171
 172         ports {
 173                 port@0 {
 174                         endpoint {
 175                                 remote-endpoint = <&adv7123_in>;
 176                         };
 177                 };
 178         };
 179 };
 180
 181 &ehci0 {
 182         status = "okay";
 183 };
 184
 185 &extal_clk {
 186         clock-frequency = <48000000>;
 187 };
 188
 189 &i2c0 {
 190         pinctrl-0 = <&i2c0_pins>;
 191         pinctrl-names = "default";
 192         status = "okay";
 193
 194         composite-in@20 {
 195                 compatible = "adi,adv7180cp";
 196                 reg = <0x20>;
 197
 198                 port {
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201
 202                         port@0 {
 203                                 reg = <0>;
 204                                 adv7180_in: endpoint {
 205                                         remote-endpoint = <&composite_con_in>;
 206                                 };
 207                         };
 208
 209                         port@3 {
 210                                 reg = <3>;
 211
 212                                 /*
 213                                  * The VIN4 video input path is shared between
 214                                  * CVBS and HDMI inputs through SW[49-53]
 215                                  * switches.
 216                                  *
 217                                  * CVBS is the default selection, link it to
 218                                  * VIN4 here.
 219                                  */
 220                                 adv7180_out: endpoint {
 221                                         remote-endpoint = <&vin4_in>;
 222                                 };
 223                         };
 224                 };
 225
 226         };
 227
 228         hdmi-encoder@39 {
 229                 compatible = "adi,adv7511w";
 230                 reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
 231                 reg-names = "main", "edid", "packet", "cec";
 232                 interrupt-parent = <&gpio1>;
 233                 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
 234
 235                 /* Depends on LVDS */
 236                 max-clock = <135000000>;
 237                 min-vrefresh = <50>;
 238
 239                 adi,input-depth = <8>;
 240                 adi,input-colorspace = "rgb";
 241                 adi,input-clock = "1x";
 242                 adi,input-style = <1>;
 243                 adi,input-justification = "evenly";
 244
 245                 ports {
 246                         #address-cells = <1>;
 247                         #size-cells = <0>;
 248
 249                         port@0 {
 250                                 reg = <0>;
 251                                 adv7511_in: endpoint {
 252                                         remote-endpoint = <&thc63lvd1024_out>;
 253                                 };
 254                         };
 255
 256                         port@1 {
 257                                 reg = <1>;
 258                                 adv7511_out: endpoint {
 259                                         remote-endpoint = <&hdmi_con_out>;
 260                                 };
 261                         };
 262                 };
 263         };
 264
 265         hdmi-decoder@4c {
 266                 compatible = "adi,adv7612";
 267                 reg = <0x4c>;
 268                 default-input = <0>;
 269
 270                 ports {
 271                         #address-cells = <1>;
 272                         #size-cells = <0>;
 273
 274                         port@0 {
 275                                 reg = <0>;
 276
 277                                 adv7612_in: endpoint {
 278                                         remote-endpoint = <&hdmi_con_in>;
 279                                 };
 280                         };
 281
 282                         port@2 {
 283                                 reg = <2>;
 284
 285                                 /*
 286                                  * The VIN4 video input path is shared between
 287                                  * CVBS and HDMI inputs through SW[49-53]
 288                                  * switches.
 289                                  *
 290                                  * CVBS is the default selection, leave HDMI
 291                                  * not connected here.
 292                                  */
 293                                 adv7612_out: endpoint {
 294                                         pclk-sample = <0>;
 295                                         hsync-active = <0>;
 296                                         vsync-active = <0>;
 297                                 };
 298                         };
 299                 };
 300         };
 301
 302         eeprom@50 {
 303                 compatible = "rohm,br24t01", "atmel,24c01";
 304                 reg = <0x50>;
 305                 pagesize = <8>;
 306         };
 307 };
 308
 309 &i2c1 {
 310         pinctrl-0 = <&i2c1_pins>;
 311         pinctrl-names = "default";
 312         status = "okay";
 313 };
 314
 315 &lvds0 {
 316         status = "okay";
 317
 318         clocks = <&cpg CPG_MOD 727>,
 319                  <&x12_clk>,
 320                  <&extal_clk>;
 321         clock-names = "fck", "dclkin.0", "extal";
 322
 323         ports {
 324                 port@1 {
 325                         lvds0_out: endpoint {
 326                                 remote-endpoint = <&thc63lvd1024_in>;
 327                         };
 328                 };
 329         };
 330 };
 331
 332 &lvds1 {
 333         clocks = <&cpg CPG_MOD 727>,
 334                  <&x12_clk>,
 335                  <&extal_clk>;
 336         clock-names = "fck", "dclkin.0", "extal";
 337 };
 338
 339 &ohci0 {
 340         status = "okay";
 341 };
 342
 343 &pfc {
 344         avb0_pins: avb {
 345                 mux {
 346                         groups = "avb0_link", "avb0_mdio", "avb0_mii";
 347                         function = "avb0";
 348                 };
 349         };
 350
 351         du_pins: du {
 352                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 353                 function = "du";
 354         };
 355
 356         i2c0_pins: i2c0 {
 357                 groups = "i2c0";
 358                 function = "i2c0";
 359         };
 360
 361         i2c1_pins: i2c1 {
 362                 groups = "i2c1";
 363                 function = "i2c1";
 364         };
 365
 366         pwm0_pins: pwm0 {
 367                 groups = "pwm0_c";
 368                 function = "pwm0";
 369         };
 370
 371         pwm1_pins: pwm1 {
 372                 groups = "pwm1_c";
 373                 function = "pwm1";
 374         };
 375
 376         scif2_pins: scif2 {
 377                 groups = "scif2_data";
 378                 function = "scif2";
 379         };
 380
 381         sdhi2_pins: sd2 {
 382                 groups = "mmc_data8", "mmc_ctrl";
 383                 function = "mmc";
 384                 power-source = <1800>;
 385         };
 386
 387         sdhi2_pins_uhs: sd2_uhs {
 388                 groups = "mmc_data8", "mmc_ctrl";
 389                 function = "mmc";
 390                 power-source = <1800>;
 391         };
 392
 393         usb0_pins: usb0 {
 394                 groups = "usb0";
 395                 function = "usb0";
 396         };
 397
 398         vin4_pins_cvbs: vin4 {
 399                 groups = "vin4_data8", "vin4_sync", "vin4_clk";
 400                 function = "vin4";
 401         };
 402 };
 403
 404 &pwm0 {
 405         pinctrl-0 = <&pwm0_pins>;
 406         pinctrl-names = "default";
 407
 408         status = "okay";
 409 };
 410
 411 &pwm1 {
 412         pinctrl-0 = <&pwm1_pins>;
 413         pinctrl-names = "default";
 414
 415         status = "okay";
 416 };
 417
 418 &rwdt {
 419         timeout-sec = <60>;
 420         status = "okay";
 421 };
 422
 423 &scif2 {
 424         pinctrl-0 = <&scif2_pins>;
 425         pinctrl-names = "default";
 426
 427         status = "okay";
 428 };
 429
 430 &sdhi2 {
 431         /* used for on-board eMMC */
 432         pinctrl-0 = <&sdhi2_pins>;
 433         pinctrl-1 = <&sdhi2_pins_uhs>;
 434         pinctrl-names = "default", "state_uhs";
 435
 436         vmmc-supply = <&reg_3p3v>;
 437         vqmmc-supply = <&reg_1p8v>;
 438         bus-width = <8>;
 439         mmc-hs200-1_8v;
 440         non-removable;
 441         status = "okay";
 442 };
 443
 444 &usb2_phy0 {
 445         pinctrl-0 = <&usb0_pins>;
 446         pinctrl-names = "default";
 447
 448         status = "okay";
 449 };
 450
 451 &vin4 {
 452         pinctrl-0 = <&vin4_pins_cvbs>;
 453         pinctrl-names = "default";
 454
 455         status = "okay";
 456
 457         ports {
 458                 #address-cells = <1>;
 459                 #size-cells = <0>;
 460
 461                 port@0 {
 462                         reg = <0>;
 463
 464                         vin4_in: endpoint {
 465                                 remote-endpoint = <&adv7180_out>;
 466                         };
 467                 };
 468         };
 469 };