arch/arm64/boot/dts/renesas/r8a77990.dtsi

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Device Tree Source for the R-Car E3 (R8A77990) SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77990-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77990";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         aliases {
  18                 i2c0 = &i2c0;
  19                 i2c1 = &i2c1;
  20                 i2c2 = &i2c2;
  21                 i2c3 = &i2c3;
  22                 i2c4 = &i2c4;
  23                 i2c5 = &i2c5;
  24                 i2c6 = &i2c6;
  25                 i2c7 = &i2c7;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 a53_0: cpu@0 {
  33                         compatible = "arm,cortex-a53", "arm,armv8";
  34                         reg = <0>;
  35                         device_type = "cpu";
  36                         power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
  37                         next-level-cache = <&L2_CA53>;
  38                         enable-method = "psci";
  39                 };
  40
  41                 a53_1: cpu@1 {
  42                         compatible = "arm,cortex-a53", "arm,armv8";
  43                         reg = <1>;
  44                         device_type = "cpu";
  45                         power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
  46                         next-level-cache = <&L2_CA53>;
  47                         enable-method = "psci";
  48                 };
  49
  50                 L2_CA53: cache-controller-0 {
  51                         compatible = "cache";
  52                         power-domains = <&sysc R8A77990_PD_CA53_SCU>;
  53                         cache-unified;
  54                         cache-level = <2>;
  55                 };
  56         };
  57
  58         extal_clk: extal {
  59                 compatible = "fixed-clock";
  60                 #clock-cells = <0>;
  61                 /* This value must be overridden by the board */
  62                 clock-frequency = <0>;
  63         };
  64
  65         pmu_a53 {
  66                 compatible = "arm,cortex-a53-pmu";
  67                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  68                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  69                 interrupt-affinity = <&a53_0>, <&a53_1>;
  70         };
  71
  72         psci {
  73                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  74                 method = "smc";
  75         };
  76
  77         /* External SCIF clock - to be overridden by boards that provide it */
  78         scif_clk: scif {
  79                 compatible = "fixed-clock";
  80                 #clock-cells = <0>;
  81                 clock-frequency = <0>;
  82         };
  83
  84         soc: soc {
  85                 compatible = "simple-bus";
  86                 interrupt-parent = <&gic>;
  87                 #address-cells = <2>;
  88                 #size-cells = <2>;
  89                 ranges;
  90
  91                 rwdt: watchdog@e6020000 {
  92                         compatible = "renesas,r8a77990-wdt",
  93                                      "renesas,rcar-gen3-wdt";
  94                         reg = <0 0xe6020000 0 0x0c>;
  95                         clocks = <&cpg CPG_MOD 402>;
  96                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
  97                         resets = <&cpg 402>;
  98                         status = "disabled";
  99                 };
 100
 101                 gpio0: gpio@e6050000 {
 102                         compatible = "renesas,gpio-r8a77990",
 103                                      "renesas,rcar-gen3-gpio";
 104                         reg = <0 0xe6050000 0 0x50>;
 105                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 106                         #gpio-cells = <2>;
 107                         gpio-controller;
 108                         gpio-ranges = <&pfc 0 0 18>;
 109                         #interrupt-cells = <2>;
 110                         interrupt-controller;
 111                         clocks = <&cpg CPG_MOD 912>;
 112                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 113                         resets = <&cpg 912>;
 114                 };
 115
 116                 gpio1: gpio@e6051000 {
 117                         compatible = "renesas,gpio-r8a77990",
 118                                      "renesas,rcar-gen3-gpio";
 119                         reg = <0 0xe6051000 0 0x50>;
 120                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 121                         #gpio-cells = <2>;
 122                         gpio-controller;
 123                         gpio-ranges = <&pfc 0 32 23>;
 124                         #interrupt-cells = <2>;
 125                         interrupt-controller;
 126                         clocks = <&cpg CPG_MOD 911>;
 127                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 128                         resets = <&cpg 911>;
 129                 };
 130
 131                 gpio2: gpio@e6052000 {
 132                         compatible = "renesas,gpio-r8a77990",
 133                                      "renesas,rcar-gen3-gpio";
 134                         reg = <0 0xe6052000 0 0x50>;
 135                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 136                         #gpio-cells = <2>;
 137                         gpio-controller;
 138                         gpio-ranges = <&pfc 0 64 26>;
 139                         #interrupt-cells = <2>;
 140                         interrupt-controller;
 141                         clocks = <&cpg CPG_MOD 910>;
 142                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 143                         resets = <&cpg 910>;
 144                 };
 145
 146                 gpio3: gpio@e6053000 {
 147                         compatible = "renesas,gpio-r8a77990",
 148                                      "renesas,rcar-gen3-gpio";
 149                         reg = <0 0xe6053000 0 0x50>;
 150                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 151                         #gpio-cells = <2>;
 152                         gpio-controller;
 153                         gpio-ranges = <&pfc 0 96 16>;
 154                         #interrupt-cells = <2>;
 155                         interrupt-controller;
 156                         clocks = <&cpg CPG_MOD 909>;
 157                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 158                         resets = <&cpg 909>;
 159                 };
 160
 161                 gpio4: gpio@e6054000 {
 162                         compatible = "renesas,gpio-r8a77990",
 163                                      "renesas,rcar-gen3-gpio";
 164                         reg = <0 0xe6054000 0 0x50>;
 165                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 166                         #gpio-cells = <2>;
 167                         gpio-controller;
 168                         gpio-ranges = <&pfc 0 128 11>;
 169                         #interrupt-cells = <2>;
 170                         interrupt-controller;
 171                         clocks = <&cpg CPG_MOD 908>;
 172                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 173                         resets = <&cpg 908>;
 174                 };
 175
 176                 gpio5: gpio@e6055000 {
 177                         compatible = "renesas,gpio-r8a77990",
 178                                      "renesas,rcar-gen3-gpio";
 179                         reg = <0 0xe6055000 0 0x50>;
 180                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 181                         #gpio-cells = <2>;
 182                         gpio-controller;
 183                         gpio-ranges = <&pfc 0 160 20>;
 184                         #interrupt-cells = <2>;
 185                         interrupt-controller;
 186                         clocks = <&cpg CPG_MOD 907>;
 187                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 188                         resets = <&cpg 907>;
 189                 };
 190
 191                 gpio6: gpio@e6055400 {
 192                         compatible = "renesas,gpio-r8a77990",
 193                                      "renesas,rcar-gen3-gpio";
 194                         reg = <0 0xe6055400 0 0x50>;
 195                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 196                         #gpio-cells = <2>;
 197                         gpio-controller;
 198                         gpio-ranges = <&pfc 0 192 18>;
 199                         #interrupt-cells = <2>;
 200                         interrupt-controller;
 201                         clocks = <&cpg CPG_MOD 906>;
 202                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 203                         resets = <&cpg 906>;
 204                 };
 205
 206                 i2c0: i2c@e6500000 {
 207                         #address-cells = <1>;
 208                         #size-cells = <0>;
 209                         compatible = "renesas,i2c-r8a77990",
 210                                      "renesas,rcar-gen3-i2c";
 211                         reg = <0 0xe6500000 0 0x40>;
 212                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 213                         clocks = <&cpg CPG_MOD 931>;
 214                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 215                         resets = <&cpg 931>;
 216                         i2c-scl-internal-delay-ns = <110>;
 217                         status = "disabled";
 218                 };
 219
 220                 i2c1: i2c@e6508000 {
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223                         compatible = "renesas,i2c-r8a77990",
 224                                      "renesas,rcar-gen3-i2c";
 225                         reg = <0 0xe6508000 0 0x40>;
 226                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 227                         clocks = <&cpg CPG_MOD 930>;
 228                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 229                         resets = <&cpg 930>;
 230                         i2c-scl-internal-delay-ns = <6>;
 231                         status = "disabled";
 232                 };
 233
 234                 i2c2: i2c@e6510000 {
 235                         #address-cells = <1>;
 236                         #size-cells = <0>;
 237                         compatible = "renesas,i2c-r8a77990",
 238                                      "renesas,rcar-gen3-i2c";
 239                         reg = <0 0xe6510000 0 0x40>;
 240                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 241                         clocks = <&cpg CPG_MOD 929>;
 242                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 243                         resets = <&cpg 929>;
 244                         i2c-scl-internal-delay-ns = <6>;
 245                         status = "disabled";
 246                 };
 247
 248                 i2c3: i2c@e66d0000 {
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251                         compatible = "renesas,i2c-r8a77990",
 252                                      "renesas,rcar-gen3-i2c";
 253                         reg = <0 0xe66d0000 0 0x40>;
 254                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 255                         clocks = <&cpg CPG_MOD 928>;
 256                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 257                         resets = <&cpg 928>;
 258                         i2c-scl-internal-delay-ns = <110>;
 259                         status = "disabled";
 260                 };
 261
 262                 i2c4: i2c@e66d8000 {
 263                         #address-cells = <1>;
 264                         #size-cells = <0>;
 265                         compatible = "renesas,i2c-r8a77990",
 266                                      "renesas,rcar-gen3-i2c";
 267                         reg = <0 0xe66d8000 0 0x40>;
 268                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 269                         clocks = <&cpg CPG_MOD 927>;
 270                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 271                         resets = <&cpg 927>;
 272                         i2c-scl-internal-delay-ns = <6>;
 273                         status = "disabled";
 274                 };
 275
 276                 i2c5: i2c@e66e0000 {
 277                         #address-cells = <1>;
 278                         #size-cells = <0>;
 279                         compatible = "renesas,i2c-r8a77990",
 280                                      "renesas,rcar-gen3-i2c";
 281                         reg = <0 0xe66e0000 0 0x40>;
 282                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 283                         clocks = <&cpg CPG_MOD 919>;
 284                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 285                         resets = <&cpg 919>;
 286                         i2c-scl-internal-delay-ns = <6>;
 287                         status = "disabled";
 288                 };
 289
 290                 i2c6: i2c@e66e8000 {
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293                         compatible = "renesas,i2c-r8a77990",
 294                                      "renesas,rcar-gen3-i2c";
 295                         reg = <0 0xe66e8000 0 0x40>;
 296                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 297                         clocks = <&cpg CPG_MOD 918>;
 298                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 299                         resets = <&cpg 918>;
 300                         i2c-scl-internal-delay-ns = <6>;
 301                         status = "disabled";
 302                 };
 303
 304                 i2c7: i2c@e6690000 {
 305                         #address-cells = <1>;
 306                         #size-cells = <0>;
 307                         compatible = "renesas,i2c-r8a77990",
 308                                      "renesas,rcar-gen3-i2c";
 309                         reg = <0 0xe6690000 0 0x40>;
 310                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 311                         clocks = <&cpg CPG_MOD 1003>;
 312                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 313                         resets = <&cpg 1003>;
 314                         i2c-scl-internal-delay-ns = <6>;
 315                         status = "disabled";
 316                 };
 317
 318                 pfc: pin-controller@e6060000 {
 319                         compatible = "renesas,pfc-r8a77990";
 320                         reg = <0 0xe6060000 0 0x508>;
 321                 };
 322
 323                 cpg: clock-controller@e6150000 {
 324                         compatible = "renesas,r8a77990-cpg-mssr";
 325                         reg = <0 0xe6150000 0 0x1000>;
 326                         clocks = <&extal_clk>;
 327                         clock-names = "extal";
 328                         #clock-cells = <2>;
 329                         #power-domain-cells = <0>;
 330                         #reset-cells = <1>;
 331                 };
 332
 333                 rst: reset-controller@e6160000 {
 334                         compatible = "renesas,r8a77990-rst";
 335                         reg = <0 0xe6160000 0 0x0200>;
 336                 };
 337
 338                 sysc: system-controller@e6180000 {
 339                         compatible = "renesas,r8a77990-sysc";
 340                         reg = <0 0xe6180000 0 0x0400>;
 341                         #power-domain-cells = <1>;
 342                 };
 343
 344                 dmac0: dma-controller@e6700000 {
 345                         compatible = "renesas,dmac-r8a77990",
 346                                      "renesas,rcar-dmac";
 347                         reg = <0 0xe6700000 0 0x10000>;
 348                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 351                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 352                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 353                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 354                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 355                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 356                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 357                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 358                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 359                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 360                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 361                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 362                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 363                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 364                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 365                         interrupt-names = "error",
 366                                         "ch0", "ch1", "ch2", "ch3",
 367                                         "ch4", "ch5", "ch6", "ch7",
 368                                         "ch8", "ch9", "ch10", "ch11",
 369                                         "ch12", "ch13", "ch14", "ch15";
 370                         clocks = <&cpg CPG_MOD 219>;
 371                         clock-names = "fck";
 372                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 373                         resets = <&cpg 219>;
 374                         #dma-cells = <1>;
 375                         dma-channels = <16>;
 376                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 377                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 378                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 379                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 380                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 381                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 382                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 383                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 384                 };
 385
 386                 dmac1: dma-controller@e7300000 {
 387                         compatible = "renesas,dmac-r8a77990",
 388                                      "renesas,rcar-dmac";
 389                         reg = <0 0xe7300000 0 0x10000>;
 390                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 391                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 392                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 393                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 394                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 395                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 396                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 397                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 398                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 399                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 400                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 401                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 402                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 404                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 405                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 406                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 407                         interrupt-names = "error",
 408                                         "ch0", "ch1", "ch2", "ch3",
 409                                         "ch4", "ch5", "ch6", "ch7",
 410                                         "ch8", "ch9", "ch10", "ch11",
 411                                         "ch12", "ch13", "ch14", "ch15";
 412                         clocks = <&cpg CPG_MOD 218>;
 413                         clock-names = "fck";
 414                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 415                         resets = <&cpg 218>;
 416                         #dma-cells = <1>;
 417                         dma-channels = <16>;
 418                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 419                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 420                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 421                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 422                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 423                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 424                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 425                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 426                 };
 427
 428                 dmac2: dma-controller@e7310000 {
 429                         compatible = "renesas,dmac-r8a77990",
 430                                      "renesas,rcar-dmac";
 431                         reg = <0 0xe7310000 0 0x10000>;
 432                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 443                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 444                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 445                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 449                         interrupt-names = "error",
 450                                         "ch0", "ch1", "ch2", "ch3",
 451                                         "ch4", "ch5", "ch6", "ch7",
 452                                         "ch8", "ch9", "ch10", "ch11",
 453                                         "ch12", "ch13", "ch14", "ch15";
 454                         clocks = <&cpg CPG_MOD 217>;
 455                         clock-names = "fck";
 456                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 457                         resets = <&cpg 217>;
 458                         #dma-cells = <1>;
 459                         dma-channels = <16>;
 460                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 461                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 462                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 463                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 464                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 465                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 466                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 467                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 468                 };
 469
 470                 ipmmu_ds0: mmu@e6740000 {
 471                         compatible = "renesas,ipmmu-r8a77990";
 472                         reg = <0 0xe6740000 0 0x1000>;
 473                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 474                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 475                         #iommu-cells = <1>;
 476                 };
 477
 478                 ipmmu_ds1: mmu@e7740000 {
 479                         compatible = "renesas,ipmmu-r8a77990";
 480                         reg = <0 0xe7740000 0 0x1000>;
 481                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 482                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 483                         #iommu-cells = <1>;
 484                 };
 485
 486                 ipmmu_hc: mmu@e6570000 {
 487                         compatible = "renesas,ipmmu-r8a77990";
 488                         reg = <0 0xe6570000 0 0x1000>;
 489                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 490                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 491                         #iommu-cells = <1>;
 492                 };
 493
 494                 ipmmu_mm: mmu@e67b0000 {
 495                         compatible = "renesas,ipmmu-r8a77990";
 496                         reg = <0 0xe67b0000 0 0x1000>;
 497                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 499                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 500                         #iommu-cells = <1>;
 501                 };
 502
 503                 ipmmu_mp: mmu@ec670000 {
 504                         compatible = "renesas,ipmmu-r8a77990";
 505                         reg = <0 0xec670000 0 0x1000>;
 506                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 507                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 508                         #iommu-cells = <1>;
 509                 };
 510
 511                 ipmmu_pv0: mmu@fd800000 {
 512                         compatible = "renesas,ipmmu-r8a77990";
 513                         reg = <0 0xfd800000 0 0x1000>;
 514                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 515                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 516                         #iommu-cells = <1>;
 517                 };
 518
 519                 ipmmu_rt: mmu@ffc80000 {
 520                         compatible = "renesas,ipmmu-r8a77990";
 521                         reg = <0 0xffc80000 0 0x1000>;
 522                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 523                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 524                         #iommu-cells = <1>;
 525                 };
 526
 527                 ipmmu_vc0: mmu@fe6b0000 {
 528                         compatible = "renesas,ipmmu-r8a77990";
 529                         reg = <0 0xfe6b0000 0 0x1000>;
 530                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 531                         power-domains = <&sysc R8A77990_PD_A3VC>;
 532                         #iommu-cells = <1>;
 533                 };
 534
 535                 ipmmu_vi0: mmu@febd0000 {
 536                         compatible = "renesas,ipmmu-r8a77990";
 537                         reg = <0 0xfebd0000 0 0x1000>;
 538                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 539                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 540                         #iommu-cells = <1>;
 541                 };
 542
 543                 ipmmu_vp0: mmu@fe990000 {
 544                         compatible = "renesas,ipmmu-r8a77990";
 545                         reg = <0 0xfe990000 0 0x1000>;
 546                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 547                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 548                         #iommu-cells = <1>;
 549                 };
 550
 551                 avb: ethernet@e6800000 {
 552                         compatible = "renesas,etheravb-r8a77990",
 553                                      "renesas,etheravb-rcar-gen3";
 554                         reg = <0 0xe6800000 0 0x800>;
 555                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 556                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 557                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 558                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 559                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 560                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 561                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 562                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 563                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 564                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 565                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 566                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 567                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 568                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 570                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 571                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 572                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 573                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 574                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 575                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 576                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 577                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 578                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 579                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 580                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 581                                           "ch4", "ch5", "ch6", "ch7",
 582                                           "ch8", "ch9", "ch10", "ch11",
 583                                           "ch12", "ch13", "ch14", "ch15",
 584                                           "ch16", "ch17", "ch18", "ch19",
 585                                           "ch20", "ch21", "ch22", "ch23",
 586                                           "ch24";
 587                         clocks = <&cpg CPG_MOD 812>;
 588                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 589                         resets = <&cpg 812>;
 590                         phy-mode = "rgmii";
 591                         #address-cells = <1>;
 592                         #size-cells = <0>;
 593                         status = "disabled";
 594                 };
 595
 596                 pwm0: pwm@e6e30000 {
 597                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 598                         reg = <0 0xe6e30000 0 0x8>;
 599                         clocks = <&cpg CPG_MOD 523>;
 600                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 601                         resets = <&cpg 523>;
 602                         #pwm-cells = <2>;
 603                         status = "disabled";
 604                 };
 605
 606                 pwm1: pwm@e6e31000 {
 607                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 608                         reg = <0 0xe6e31000 0 0x8>;
 609                         clocks = <&cpg CPG_MOD 523>;
 610                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 611                         resets = <&cpg 523>;
 612                         #pwm-cells = <2>;
 613                         status = "disabled";
 614                 };
 615
 616                 pwm2: pwm@e6e32000 {
 617                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 618                         reg = <0 0xe6e32000 0 0x8>;
 619                         clocks = <&cpg CPG_MOD 523>;
 620                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 621                         resets = <&cpg 523>;
 622                         #pwm-cells = <2>;
 623                         status = "disabled";
 624                 };
 625
 626                 pwm3: pwm@e6e33000 {
 627                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 628                         reg = <0 0xe6e33000 0 0x8>;
 629                         clocks = <&cpg CPG_MOD 523>;
 630                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 631                         resets = <&cpg 523>;
 632                         #pwm-cells = <2>;
 633                         status = "disabled";
 634                 };
 635
 636                 pwm4: pwm@e6e34000 {
 637                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 638                         reg = <0 0xe6e34000 0 0x8>;
 639                         clocks = <&cpg CPG_MOD 523>;
 640                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 641                         resets = <&cpg 523>;
 642                         #pwm-cells = <2>;
 643                         status = "disabled";
 644                 };
 645
 646                 pwm5: pwm@e6e35000 {
 647                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 648                         reg = <0 0xe6e35000 0 0x8>;
 649                         clocks = <&cpg CPG_MOD 523>;
 650                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 651                         resets = <&cpg 523>;
 652                         #pwm-cells = <2>;
 653                         status = "disabled";
 654                 };
 655
 656                 pwm6: pwm@e6e36000 {
 657                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
 658                         reg = <0 0xe6e36000 0 0x8>;
 659                         clocks = <&cpg CPG_MOD 523>;
 660                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 661                         resets = <&cpg 523>;
 662                         #pwm-cells = <2>;
 663                         status = "disabled";
 664                 };
 665
 666                 scif2: serial@e6e88000 {
 667                         compatible = "renesas,scif-r8a77990",
 668                                      "renesas,rcar-gen3-scif", "renesas,scif";
 669                         reg = <0 0xe6e88000 0 64>;
 670                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 671                         clocks = <&cpg CPG_MOD 310>,
 672                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 673                                  <&scif_clk>;
 674                         clock-names = "fck", "brg_int", "scif_clk";
 675
 676                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 677                         resets = <&cpg 310>;
 678                         status = "disabled";
 679                 };
 680
 681                 msiof0: spi@e6e90000 {
 682                         compatible = "renesas,msiof-r8a77990",
 683                                      "renesas,rcar-gen3-msiof";
 684                         reg = <0 0xe6e90000 0 0x0064>;
 685                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 686                         clocks = <&cpg CPG_MOD 211>;
 687                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 688                         resets = <&cpg 211>;
 689                         #address-cells = <1>;
 690                         #size-cells = <0>;
 691                         status = "disabled";
 692                 };
 693
 694                 msiof1: spi@e6ea0000 {
 695                         compatible = "renesas,msiof-r8a77990",
 696                                      "renesas,rcar-gen3-msiof";
 697                         reg = <0 0xe6ea0000 0 0x0064>;
 698                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 699                         clocks = <&cpg CPG_MOD 210>;
 700                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 701                         resets = <&cpg 210>;
 702                         #address-cells = <1>;
 703                         #size-cells = <0>;
 704                         status = "disabled";
 705                 };
 706
 707                 msiof2: spi@e6c00000 {
 708                         compatible = "renesas,msiof-r8a77990",
 709                                      "renesas,rcar-gen3-msiof";
 710                         reg = <0 0xe6c00000 0 0x0064>;
 711                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 712                         clocks = <&cpg CPG_MOD 209>;
 713                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 714                         resets = <&cpg 209>;
 715                         #address-cells = <1>;
 716                         #size-cells = <0>;
 717                         status = "disabled";
 718                 };
 719
 720                 msiof3: spi@e6c10000 {
 721                         compatible = "renesas,msiof-r8a77990",
 722                                      "renesas,rcar-gen3-msiof";
 723                         reg = <0 0xe6c10000 0 0x0064>;
 724                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 725                         clocks = <&cpg CPG_MOD 208>;
 726                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 727                         resets = <&cpg 208>;
 728                         #address-cells = <1>;
 729                         #size-cells = <0>;
 730                         status = "disabled";
 731                 };
 732
 733                 vin4: video@e6ef4000 {
 734                         compatible = "renesas,vin-r8a77990";
 735                         reg = <0 0xe6ef4000 0 0x1000>;
 736                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 807>;
 738                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 739                         resets = <&cpg 807>;
 740                         renesas,id = <4>;
 741                         status = "disabled";
 742
 743                         ports {
 744                                 #address-cells = <1>;
 745                                 #size-cells = <0>;
 746
 747                                 port@1 {
 748                                         reg = <1>;
 749
 750                                         vin4csi40: endpoint {
 751                                                 remote-endpoint= <&csi40vin4>;
 752                                         };
 753                                 };
 754                         };
 755                 };
 756
 757                 vin5: video@e6ef5000 {
 758                         compatible = "renesas,vin-r8a77990";
 759                         reg = <0 0xe6ef5000 0 0x1000>;
 760                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 761                         clocks = <&cpg CPG_MOD 806>;
 762                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 763                         resets = <&cpg 806>;
 764                         renesas,id = <5>;
 765                         status = "disabled";
 766
 767                         ports {
 768                                 #address-cells = <1>;
 769                                 #size-cells = <0>;
 770
 771                                 port@1 {
 772                                         reg = <1>;
 773
 774                                         vin5csi40: endpoint {
 775                                                 remote-endpoint= <&csi40vin5>;
 776                                         };
 777                                 };
 778                         };
 779                 };
 780
 781                 xhci0: usb@ee000000 {
 782                         compatible = "renesas,xhci-r8a77990",
 783                                      "renesas,rcar-gen3-xhci";
 784                         reg = <0 0xee000000 0 0xc00>;
 785                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 786                         clocks = <&cpg CPG_MOD 328>;
 787                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 788                         resets = <&cpg 328>;
 789                         status = "disabled";
 790                 };
 791
 792                 ohci0: usb@ee080000 {
 793                         compatible = "generic-ohci";
 794                         reg = <0 0xee080000 0 0x100>;
 795                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 796                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 797                         phys = <&usb2_phy0>;
 798                         phy-names = "usb";
 799                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 800                         resets = <&cpg 703>, <&cpg 704>;
 801                         status = "disabled";
 802                 };
 803
 804                 ehci0: usb@ee080100 {
 805                         compatible = "generic-ehci";
 806                         reg = <0 0xee080100 0 0x100>;
 807                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 808                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 809                         phys = <&usb2_phy0>;
 810                         phy-names = "usb";
 811                         companion = <&ohci0>;
 812                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 813                         resets = <&cpg 703>, <&cpg 704>;
 814                         status = "disabled";
 815                 };
 816
 817                 usb2_phy0: usb-phy@ee080200 {
 818                         compatible = "renesas,usb2-phy-r8a77990",
 819                                      "renesas,rcar-gen3-usb2-phy";
 820                         reg = <0 0xee080200 0 0x700>;
 821                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 822                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 823                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 824                         resets = <&cpg 703>, <&cpg 704>;
 825                         #phy-cells = <0>;
 826                         status = "disabled";
 827                 };
 828
 829                 gic: interrupt-controller@f1010000 {
 830                         compatible = "arm,gic-400";
 831                         #interrupt-cells = <3>;
 832                         #address-cells = <0>;
 833                         interrupt-controller;
 834                         reg = <0x0 0xf1010000 0 0x1000>,
 835                               <0x0 0xf1020000 0 0x20000>,
 836                               <0x0 0xf1040000 0 0x20000>,
 837                               <0x0 0xf1060000 0 0x20000>;
 838                         interrupts = <GIC_PPI 9
 839                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 840                         clocks = <&cpg CPG_MOD 408>;
 841                         clock-names = "clk";
 842                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 843                         resets = <&cpg 408>;
 844                 };
 845
 846                 vspb0: vsp@fe960000 {
 847                         compatible = "renesas,vsp2";
 848                         reg = <0 0xfe960000 0 0x8000>;
 849                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
 850                         clocks = <&cpg CPG_MOD 626>;
 851                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 852                         resets = <&cpg 626>;
 853                         renesas,fcp = <&fcpvb0>;
 854                 };
 855
 856                 fcpvb0: fcp@fe96f000 {
 857                         compatible = "renesas,fcpv";
 858                         reg = <0 0xfe96f000 0 0x200>;
 859                         clocks = <&cpg CPG_MOD 607>;
 860                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 861                         resets = <&cpg 607>;
 862                         iommus = <&ipmmu_vp0 5>;
 863                 };
 864
 865                 vspi0: vsp@fe9a0000 {
 866                         compatible = "renesas,vsp2";
 867                         reg = <0 0xfe9a0000 0 0x8000>;
 868                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
 869                         clocks = <&cpg CPG_MOD 631>;
 870                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 871                         resets = <&cpg 631>;
 872                         renesas,fcp = <&fcpvi0>;
 873                 };
 874
 875                 fcpvi0: fcp@fe9af000 {
 876                         compatible = "renesas,fcpv";
 877                         reg = <0 0xfe9af000 0 0x200>;
 878                         clocks = <&cpg CPG_MOD 611>;
 879                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 880                         resets = <&cpg 611>;
 881                         iommus = <&ipmmu_vp0 8>;
 882                 };
 883
 884                 vspd0: vsp@fea20000 {
 885                         compatible = "renesas,vsp2";
 886                         reg = <0 0xfea20000 0 0x7000>;
 887                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
 888                         clocks = <&cpg CPG_MOD 623>;
 889                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 890                         resets = <&cpg 623>;
 891                         renesas,fcp = <&fcpvd0>;
 892                 };
 893
 894                 fcpvd0: fcp@fea27000 {
 895                         compatible = "renesas,fcpv";
 896                         reg = <0 0xfea27000 0 0x200>;
 897                         clocks = <&cpg CPG_MOD 603>;
 898                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 899                         resets = <&cpg 603>;
 900                         iommus = <&ipmmu_vi0 8>;
 901                 };
 902
 903                 vspd1: vsp@fea28000 {
 904                         compatible = "renesas,vsp2";
 905                         reg = <0 0xfea28000 0 0x7000>;
 906                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
 907                         clocks = <&cpg CPG_MOD 622>;
 908                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 909                         resets = <&cpg 622>;
 910                         renesas,fcp = <&fcpvd1>;
 911                 };
 912
 913                 fcpvd1: fcp@fea2f000 {
 914                         compatible = "renesas,fcpv";
 915                         reg = <0 0xfea2f000 0 0x200>;
 916                         clocks = <&cpg CPG_MOD 602>;
 917                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 918                         resets = <&cpg 602>;
 919                         iommus = <&ipmmu_vi0 9>;
 920                 };
 921
 922                 csi40: csi2@feaa0000 {
 923                         compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2";
 924                         reg = <0 0xfeaa0000 0 0x10000>;
 925                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
 926                         clocks = <&cpg CPG_MOD 716>;
 927                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 928                         resets = <&cpg 716>;
 929                         status = "disabled";
 930
 931                         ports {
 932                                 #address-cells = <1>;
 933                                 #size-cells = <0>;
 934
 935                                 port@1 {
 936                                         #address-cells = <1>;
 937                                         #size-cells = <0>;
 938
 939                                         reg = <1>;
 940
 941                                         csi40vin4: endpoint@0 {
 942                                                 reg = <0>;
 943                                                 remote-endpoint = <&vin4csi40>;
 944                                         };
 945                                         csi40vin5: endpoint@1 {
 946                                                 reg = <1>;
 947                                                 remote-endpoint = <&vin5csi40>;
 948                                         };
 949                                 };
 950                         };
 951                 };
 952
 953                 du: display@feb00000 {
 954                         compatible = "renesas,du-r8a77990";
 955                         reg = <0 0xfeb00000 0 0x80000>;
 956                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 958                         clocks = <&cpg CPG_MOD 724>,
 959                                  <&cpg CPG_MOD 723>;
 960                         clock-names = "du.0", "du.1";
 961                         vsps = <&vspd0 0 &vspd1 0>;
 962                         status = "disabled";
 963
 964                         ports {
 965                                 #address-cells = <1>;
 966                                 #size-cells = <0>;
 967
 968                                 port@0 {
 969                                         reg = <0>;
 970                                         du_out_rgb: endpoint {
 971                                         };
 972                                 };
 973
 974                                 port@1 {
 975                                         reg = <1>;
 976                                         du_out_lvds0: endpoint {
 977                                                 remote-endpoint = <&lvds0_in>;
 978                                         };
 979                                 };
 980
 981                                 port@2 {
 982                                         reg = <2>;
 983                                         du_out_lvds1: endpoint {
 984                                                 remote-endpoint = <&lvds1_in>;
 985                                         };
 986                                 };
 987                         };
 988                 };
 989
 990                 lvds0: lvds-encoder@feb90000 {
 991                         compatible = "renesas,r8a77990-lvds";
 992                         reg = <0 0xfeb90000 0 0x20>;
 993                         clocks = <&cpg CPG_MOD 727>;
 994                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 995                         resets = <&cpg 727>;
 996                         status = "disabled";
 997
 998                         ports {
 999                                 #address-cells = <1>;
1000                                 #size-cells = <0>;
1001
1002                                 port@0 {
1003                                         reg = <0>;
1004                                         lvds0_in: endpoint {
1005                                                 remote-endpoint = <&du_out_lvds0>;
1006                                         };
1007                                 };
1008
1009                                 port@1 {
1010                                         reg = <1>;
1011                                         lvds0_out: endpoint {
1012                                         };
1013                                 };
1014                         };
1015                 };
1016
1017                 lvds1: lvds-encoder@feb90100 {
1018                         compatible = "renesas,r8a77990-lvds";
1019                         reg = <0 0xfeb90100 0 0x20>;
1020                         clocks = <&cpg CPG_MOD 727>;
1021                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1022                         resets = <&cpg 726>;
1023                         status = "disabled";
1024
1025                         ports {
1026                                 #address-cells = <1>;
1027                                 #size-cells = <0>;
1028
1029                                 port@0 {
1030                                         reg = <0>;
1031                                         lvds1_in: endpoint {
1032                                                 remote-endpoint = <&du_out_lvds1>;
1033                                         };
1034                                 };
1035
1036                                 port@1 {
1037                                         reg = <1>;
1038                                         lvds1_out: endpoint {
1039                                         };
1040                                 };
1041                         };
1042                 };
1043
1044                 prr: chipid@fff00044 {
1045                         compatible = "renesas,prr";
1046                         reg = <0 0xfff00044 0 4>;
1047                 };
1048         };
1049
1050         timer {
1051                 compatible = "arm,armv8-timer";
1052                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1053                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1054                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1055                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1056         };
1057 };