Merge tag 'drm-next-2019-03-15' of git://anongit.freedesktop.org/drm/drm
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / renesas / r8a77990-ebisu.dts
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Device Tree Source for the ebisu board
4  *
5  * Copyright (C) 2018 Renesas Electronics Corp.
6  */
7
8 /dts-v1/;
9 #include "r8a77990.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11
12 / {
13         model = "Renesas Ebisu board based on r8a77990";
14         compatible = "renesas,ebisu", "renesas,r8a77990";
15
16         aliases {
17                 serial0 = &scif2;
18                 ethernet0 = &avb;
19         };
20
21         chosen {
22                 bootargs = "ignore_loglevel";
23                 stdout-path = "serial0:115200n8";
24         };
25
26         memory@48000000 {
27                 device_type = "memory";
28                 /* first 128MB is reserved for secure area. */
29                 reg = <0x0 0x48000000 0x0 0x38000000>;
30         };
31
32         audio_clkout: audio-clkout {
33                 /*
34                  * This is same as <&rcar_sound 0>
35                  * but needed to avoid cs2000/rcar_sound probe dead-lock
36                  */
37                 compatible = "fixed-clock";
38                 #clock-cells = <0>;
39                 clock-frequency = <11289600>;
40         };
41
42         backlight: backlight {
43                 compatible = "pwm-backlight";
44                 pwms = <&pwm3 0 50000>;
45
46                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
47                 default-brightness-level = <10>;
48
49                 power-supply = <&reg_12p0v>;
50         };
51
52         cvbs-in {
53                 compatible = "composite-video-connector";
54                 label = "CVBS IN";
55
56                 port {
57                         cvbs_con: endpoint {
58                                 remote-endpoint = <&adv7482_ain7>;
59                         };
60                 };
61         };
62
63         hdmi-in {
64                 compatible = "hdmi-connector";
65                 label = "HDMI IN";
66                 type = "a";
67
68                 port {
69                         hdmi_in_con: endpoint {
70                                 remote-endpoint = <&adv7482_hdmi>;
71                         };
72                 };
73         };
74
75         hdmi-out {
76                 compatible = "hdmi-connector";
77                 type = "a";
78
79                 port {
80                         hdmi_con_out: endpoint {
81                                 remote-endpoint = <&adv7511_out>;
82                         };
83                 };
84         };
85
86         lvds-decoder {
87                 compatible = "thine,thc63lvd1024";
88                 vcc-supply = <&reg_3p3v>;
89
90                 ports {
91                         #address-cells = <1>;
92                         #size-cells = <0>;
93
94                         port@0 {
95                                 reg = <0>;
96                                 thc63lvd1024_in: endpoint {
97                                         remote-endpoint = <&lvds0_out>;
98                                 };
99                         };
100
101                         port@2 {
102                                 reg = <2>;
103                                 thc63lvd1024_out: endpoint {
104                                         remote-endpoint = <&adv7511_in>;
105                                 };
106                         };
107                 };
108         };
109
110         vga {
111                 compatible = "vga-connector";
112
113                 port {
114                         vga_in: endpoint {
115                                 remote-endpoint = <&adv7123_out>;
116                         };
117                 };
118         };
119
120         vga-encoder {
121                 compatible = "adi,adv7123";
122
123                 ports {
124                         #address-cells = <1>;
125                         #size-cells = <0>;
126
127                         port@0 {
128                                 reg = <0>;
129                                 adv7123_in: endpoint {
130                                         remote-endpoint = <&du_out_rgb>;
131                                 };
132                         };
133                         port@1 {
134                                 reg = <1>;
135                                 adv7123_out: endpoint {
136                                         remote-endpoint = <&vga_in>;
137                                 };
138                         };
139                 };
140         };
141
142         reg_1p8v: regulator0 {
143                 compatible = "regulator-fixed";
144                 regulator-name = "fixed-1.8V";
145                 regulator-min-microvolt = <1800000>;
146                 regulator-max-microvolt = <1800000>;
147                 regulator-boot-on;
148                 regulator-always-on;
149         };
150
151         reg_3p3v: regulator1 {
152                 compatible = "regulator-fixed";
153                 regulator-name = "fixed-3.3V";
154                 regulator-min-microvolt = <3300000>;
155                 regulator-max-microvolt = <3300000>;
156                 regulator-boot-on;
157                 regulator-always-on;
158         };
159
160         vbus0_usb2: regulator-vbus0-usb2 {
161                 compatible = "regulator-fixed";
162
163                 regulator-name = "USB20_VBUS_CN";
164                 regulator-min-microvolt = <5000000>;
165                 regulator-max-microvolt = <5000000>;
166
167                 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
168                 enable-active-high;
169         };
170
171         rsnd_ak4613: sound {
172                 compatible = "simple-audio-card";
173
174                 simple-audio-card,name = "rsnd-ak4613";
175                 simple-audio-card,format = "left_j";
176                 simple-audio-card,bitclock-master = <&sndcpu>;
177                 simple-audio-card,frame-master = <&sndcpu>;
178
179                 sndcpu: simple-audio-card,cpu {
180                         sound-dai = <&rcar_sound>;
181                 };
182
183                 sndcodec: simple-audio-card,codec {
184                         sound-dai = <&ak4613>;
185                 };
186         };
187
188         x12_clk: x12 {
189                 compatible = "fixed-clock";
190                 #clock-cells = <0>;
191                 clock-frequency = <24576000>;
192         };
193
194         reg_12p0v: regulator2 {
195                 compatible = "regulator-fixed";
196                 regulator-name = "D12.0V";
197                 regulator-min-microvolt = <12000000>;
198                 regulator-max-microvolt = <12000000>;
199                 regulator-boot-on;
200                 regulator-always-on;
201         };
202
203         x13_clk: x13 {
204                 compatible = "fixed-clock";
205                 #clock-cells = <0>;
206                 clock-frequency = <74250000>;
207         };
208
209         vcc_sdhi0: regulator-vcc-sdhi0 {
210                 compatible = "regulator-fixed";
211
212                 regulator-name = "SDHI0 Vcc";
213                 regulator-min-microvolt = <3300000>;
214                 regulator-max-microvolt = <3300000>;
215
216                 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
217                 enable-active-high;
218         };
219
220         vccq_sdhi0: regulator-vccq-sdhi0 {
221                 compatible = "regulator-gpio";
222
223                 regulator-name = "SDHI0 VccQ";
224                 regulator-min-microvolt = <1800000>;
225                 regulator-max-microvolt = <3300000>;
226
227                 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
228                 gpios-states = <1>;
229                 states = <3300000 1
230                           1800000 0>;
231         };
232
233         vcc_sdhi1: regulator-vcc-sdhi1 {
234                 compatible = "regulator-fixed";
235
236                 regulator-name = "SDHI1 Vcc";
237                 regulator-min-microvolt = <3300000>;
238                 regulator-max-microvolt = <3300000>;
239
240                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
241                 enable-active-high;
242         };
243
244         vccq_sdhi1: regulator-vccq-sdhi1 {
245                 compatible = "regulator-gpio";
246
247                 regulator-name = "SDHI1 VccQ";
248                 regulator-min-microvolt = <1800000>;
249                 regulator-max-microvolt = <3300000>;
250
251                 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
252                 gpios-states = <1>;
253                 states = <3300000 1
254                           1800000 0>;
255         };
256 };
257
258 &audio_clk_a {
259         clock-frequency = <22579200>;
260 };
261
262 &avb {
263         pinctrl-0 = <&avb_pins>;
264         pinctrl-names = "default";
265         renesas,no-ether-link;
266         phy-handle = <&phy0>;
267         status = "okay";
268
269         phy0: ethernet-phy@0 {
270                 rxc-skew-ps = <1500>;
271                 reg = <0>;
272                 interrupt-parent = <&gpio2>;
273                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
274                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
275         };
276 };
277
278 &canfd {
279         pinctrl-0 = <&canfd0_pins>;
280         pinctrl-names = "default";
281         status = "okay";
282
283         channel0 {
284                 status = "okay";
285         };
286 };
287
288 &csi40 {
289         status = "okay";
290
291         ports {
292                 port@0 {
293                         reg = <0>;
294
295                         csi40_in: endpoint {
296                                 clock-lanes = <0>;
297                                 data-lanes = <1 2>;
298                                 remote-endpoint = <&adv7482_txa>;
299                         };
300                 };
301         };
302 };
303
304 &du {
305         pinctrl-0 = <&du_pins>;
306         pinctrl-names = "default";
307         status = "okay";
308
309         clocks = <&cpg CPG_MOD 724>,
310                  <&cpg CPG_MOD 723>,
311                  <&x13_clk>;
312         clock-names = "du.0", "du.1", "dclkin.0";
313
314         ports {
315                 port@0 {
316                         endpoint {
317                                 remote-endpoint = <&adv7123_in>;
318                         };
319                 };
320         };
321 };
322
323 &ehci0 {
324         dr_mode = "otg";
325         status = "okay";
326 };
327
328 &extal_clk {
329         clock-frequency = <48000000>;
330 };
331
332 &hsusb {
333         dr_mode = "otg";
334         status = "okay";
335 };
336
337 &i2c0 {
338         status = "okay";
339
340         hdmi-encoder@39 {
341                 compatible = "adi,adv7511w";
342                 reg = <0x39>;
343                 interrupt-parent = <&gpio1>;
344                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
345
346                 adi,input-depth = <8>;
347                 adi,input-colorspace = "rgb";
348                 adi,input-clock = "1x";
349                 adi,input-style = <1>;
350                 adi,input-justification = "evenly";
351
352                 ports {
353                         #address-cells = <1>;
354                         #size-cells = <0>;
355
356                         port@0 {
357                                 reg = <0>;
358                                 adv7511_in: endpoint {
359                                         remote-endpoint = <&thc63lvd1024_out>;
360                                 };
361                         };
362
363                         port@1 {
364                                 reg = <1>;
365                                 adv7511_out: endpoint {
366                                         remote-endpoint = <&hdmi_con_out>;
367                                 };
368                         };
369                 };
370         };
371
372         video-receiver@70 {
373                 compatible = "adi,adv7482";
374                 reg = <0x70>;
375
376                 #address-cells = <1>;
377                 #size-cells = <0>;
378
379                 interrupt-parent = <&gpio0>;
380                 interrupt-names = "intrq1", "intrq2";
381                 interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
382                              <17 IRQ_TYPE_LEVEL_LOW>;
383
384                 port@7 {
385                         reg = <7>;
386
387                         adv7482_ain7: endpoint {
388                                 remote-endpoint = <&cvbs_con>;
389                         };
390                 };
391
392                 port@8 {
393                         reg = <8>;
394
395                         adv7482_hdmi: endpoint {
396                                 remote-endpoint = <&hdmi_in_con>;
397                         };
398                 };
399
400                 port@a {
401                         reg = <0xa>;
402
403                         adv7482_txa: endpoint {
404                                 clock-lanes = <0>;
405                                 data-lanes = <1 2>;
406                                 remote-endpoint = <&csi40_in>;
407                         };
408                 };
409         };
410 };
411
412 &i2c3 {
413         status = "okay";
414
415         ak4613: codec@10 {
416                 compatible = "asahi-kasei,ak4613";
417                 #sound-dai-cells = <0>;
418                 reg = <0x10>;
419                 clocks = <&rcar_sound 3>;
420
421                 asahi-kasei,in1-single-end;
422                 asahi-kasei,in2-single-end;
423                 asahi-kasei,out1-single-end;
424                 asahi-kasei,out2-single-end;
425                 asahi-kasei,out3-single-end;
426                 asahi-kasei,out4-single-end;
427                 asahi-kasei,out5-single-end;
428                 asahi-kasei,out6-single-end;
429         };
430
431         cs2000: clk-multiplier@4f {
432                 #clock-cells = <0>;
433                 compatible = "cirrus,cs2000-cp";
434                 reg = <0x4f>;
435                 clocks = <&audio_clkout>, <&x12_clk>;
436                 clock-names = "clk_in", "ref_clk";
437
438                 assigned-clocks = <&cs2000>;
439                 assigned-clock-rates = <24576000>; /* 1/1 divide */
440         };
441 };
442
443 &lvds0 {
444         status = "okay";
445
446         clocks = <&cpg CPG_MOD 727>,
447                  <&x13_clk>,
448                  <&extal_clk>;
449         clock-names = "fck", "dclkin.0", "extal";
450
451         ports {
452                 port@1 {
453                         lvds0_out: endpoint {
454                                 remote-endpoint = <&thc63lvd1024_in>;
455                         };
456                 };
457         };
458 };
459
460 &lvds1 {
461         clocks = <&cpg CPG_MOD 727>,
462                  <&x13_clk>,
463                  <&extal_clk>;
464         clock-names = "fck", "dclkin.0", "extal";
465 };
466
467 &ohci0 {
468         dr_mode = "otg";
469         status = "okay";
470 };
471
472 &pcie_bus_clk {
473         clock-frequency = <100000000>;
474 };
475
476 &pciec0 {
477         status = "okay";
478 };
479
480 &pfc {
481         avb_pins: avb {
482                 mux {
483                         groups = "avb_link", "avb_mii";
484                         function = "avb";
485                 };
486         };
487
488         canfd0_pins: canfd0 {
489                 groups = "canfd0_data";
490                 function = "canfd0";
491         };
492
493         du_pins: du {
494                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
495                 function = "du";
496         };
497
498         pwm3_pins: pwm3 {
499                 groups = "pwm3_b";
500                 function = "pwm3";
501         };
502
503         pwm5_pins: pwm5 {
504                 groups = "pwm5_a";
505                 function = "pwm5";
506         };
507
508         sdhi0_pins: sd0 {
509                 groups = "sdhi0_data4", "sdhi0_ctrl";
510                 function = "sdhi0";
511                 power-source = <3300>;
512         };
513
514         sdhi0_pins_uhs: sd0_uhs {
515                 groups = "sdhi0_data4", "sdhi0_ctrl";
516                 function = "sdhi0";
517                 power-source = <1800>;
518         };
519
520         sdhi1_pins: sd1 {
521                 groups = "sdhi1_data4", "sdhi1_ctrl";
522                 function = "sdhi1";
523                 power-source = <3300>;
524         };
525
526         sdhi1_pins_uhs: sd1_uhs {
527                 groups = "sdhi1_data4", "sdhi1_ctrl";
528                 function = "sdhi1";
529                 power-source = <1800>;
530         };
531
532         sdhi3_pins: sd3 {
533                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
534                 function = "sdhi3";
535                 power-source = <1800>;
536         };
537
538         sound_pins: sound {
539                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
540                 function = "ssi";
541         };
542
543         sound_clk_pins: sound_clk {
544                 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
545                          "audio_clkout_a", "audio_clkout1_a";
546                 function = "audio_clk";
547         };
548
549         scif2_pins: scif2 {
550                 groups = "scif2_data_a";
551                 function = "scif2";
552         };
553
554         usb0_pins: usb {
555                 groups = "usb0_b", "usb0_id";
556                 function = "usb0";
557         };
558
559         usb30_pins: usb30 {
560                 groups = "usb30";
561                 function = "usb30";
562         };
563 };
564
565 &pwm3 {
566         pinctrl-0 = <&pwm3_pins>;
567         pinctrl-names = "default";
568
569         status = "okay";
570 };
571
572 &pwm5 {
573         pinctrl-0 = <&pwm5_pins>;
574         pinctrl-names = "default";
575
576         status = "okay";
577 };
578
579 &rcar_sound {
580         pinctrl-0 = <&sound_pins &sound_clk_pins>;
581         pinctrl-names = "default";
582
583         /* Single DAI */
584         #sound-dai-cells = <0>;
585
586         /* audio_clkout0/1/2/3 */
587         #clock-cells = <1>;
588         clock-frequency = <12288000 11289600>;
589         clkout-lr-synchronous;
590
591         status = "okay";
592
593         /* update <audio_clk_b> to <cs2000> */
594         clocks = <&cpg CPG_MOD 1005>,
595                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
596                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
597                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
598                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
599                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
600                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
601                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
602                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
603                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
604                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
605                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
606                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
607                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
608                  <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
609                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
610
611         rcar_sound,dai {
612                 dai0 {
613                         playback = <&ssi0 &src0 &dvc0>;
614                         capture  = <&ssi1 &src1 &dvc1>;
615                 };
616         };
617
618 };
619
620 &rwdt {
621         timeout-sec = <60>;
622         status = "okay";
623 };
624
625 &scif2 {
626         pinctrl-0 = <&scif2_pins>;
627         pinctrl-names = "default";
628
629         status = "okay";
630 };
631
632 &ssi1 {
633         shared-pin;
634 };
635
636 &usb2_phy0 {
637         pinctrl-0 = <&usb0_pins>;
638         pinctrl-names = "default";
639
640         vbus-supply = <&vbus0_usb2>;
641         status = "okay";
642 };
643
644 &usb3_peri0 {
645         companion = <&xhci0>;
646         status = "okay";
647 };
648
649 &vin4 {
650         status = "okay";
651 };
652
653 &xhci0 {
654         pinctrl-0 = <&usb30_pins>;
655         pinctrl-names = "default";
656
657         status = "okay";
658 };
659
660 &sdhi0 {
661         pinctrl-0 = <&sdhi0_pins>;
662         pinctrl-1 = <&sdhi0_pins_uhs>;
663         pinctrl-names = "default", "state_uhs";
664
665         vmmc-supply = <&vcc_sdhi0>;
666         vqmmc-supply = <&vccq_sdhi0>;
667         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
668         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
669         bus-width = <4>;
670         sd-uhs-sdr50;
671         sd-uhs-sdr104;
672         status = "okay";
673 };
674
675 &sdhi1 {
676         pinctrl-0 = <&sdhi1_pins>;
677         pinctrl-1 = <&sdhi1_pins_uhs>;
678         pinctrl-names = "default", "state_uhs";
679
680         vmmc-supply = <&vcc_sdhi1>;
681         vqmmc-supply = <&vccq_sdhi1>;
682         cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
683         bus-width = <4>;
684         sd-uhs-sdr50;
685         sd-uhs-sdr104;
686         status = "okay";
687 };
688
689 &sdhi3 {
690         /* used for on-board 8bit eMMC */
691         pinctrl-0 = <&sdhi3_pins>;
692         pinctrl-1 = <&sdhi3_pins>;
693         pinctrl-names = "default", "state_uhs";
694
695         vmmc-supply = <&reg_3p3v>;
696         vqmmc-supply = <&reg_1p8v>;
697         mmc-hs200-1_8v;
698         mmc-hs400-1_8v;
699         bus-width = <8>;
700         non-removable;
701         status = "okay";
702 };