arch/arm64/boot/dts/renesas/r8a77980.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car V3H (R8A77980) SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  * Copyright (C) 2018 Cogent Embedded, Inc.
   7  */
   8
   9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12 #include <dt-bindings/power/r8a77980-sysc.h>
  13
  14 / {
  15         compatible = "renesas,r8a77980";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26         };
  27
  28         /* External CAN clock - to be overridden by boards that provide it */
  29         can_clk: can {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a53_0: cpu@0 {
  40                         device_type = "cpu";
  41                         compatible = "arm,cortex-a53";
  42                         reg = <0>;
  43                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  44                         power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
  45                         next-level-cache = <&L2_CA53>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a53_1: cpu@1 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a53";
  52                         reg = <1>;
  53                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  54                         power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
  55                         next-level-cache = <&L2_CA53>;
  56                         enable-method = "psci";
  57                 };
  58
  59                 a53_2: cpu@2 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a53";
  62                         reg = <2>;
  63                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  64                         power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
  65                         next-level-cache = <&L2_CA53>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 a53_3: cpu@3 {
  70                         device_type = "cpu";
  71                         compatible = "arm,cortex-a53";
  72                         reg = <3>;
  73                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  74                         power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
  75                         next-level-cache = <&L2_CA53>;
  76                         enable-method = "psci";
  77                 };
  78
  79                 L2_CA53: cache-controller {
  80                         compatible = "cache";
  81                         power-domains = <&sysc R8A77980_PD_CA53_SCU>;
  82                         cache-unified;
  83                         cache-level = <2>;
  84                 };
  85         };
  86
  87         extal_clk: extal {
  88                 compatible = "fixed-clock";
  89                 #clock-cells = <0>;
  90                 /* This value must be overridden by the board */
  91                 clock-frequency = <0>;
  92         };
  93
  94         extalr_clk: extalr {
  95                 compatible = "fixed-clock";
  96                 #clock-cells = <0>;
  97                 /* This value must be overridden by the board */
  98                 clock-frequency = <0>;
  99         };
 100
 101         /* External PCIe clock - can be overridden by the board */
 102         pcie_bus_clk: pcie_bus {
 103                 compatible = "fixed-clock";
 104                 #clock-cells = <0>;
 105                 clock-frequency = <0>;
 106         };
 107
 108         pmu_a53 {
 109                 compatible = "arm,cortex-a53-pmu";
 110                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 111                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 112                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 113                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 114                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 115         };
 116
 117         psci {
 118                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 119                 method = "smc";
 120         };
 121
 122         /* External SCIF clock - to be overridden by boards that provide it */
 123         scif_clk: scif {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         soc {
 130                 compatible = "simple-bus";
 131                 interrupt-parent = <&gic>;
 132
 133                 #address-cells = <2>;
 134                 #size-cells = <2>;
 135                 ranges;
 136
 137                 rwdt: watchdog@e6020000 {
 138                         compatible = "renesas,r8a77980-wdt",
 139                                      "renesas,rcar-gen3-wdt";
 140                         reg = <0 0xe6020000 0 0x0c>;
 141                         clocks = <&cpg CPG_MOD 402>;
 142                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 143                         resets = <&cpg 402>;
 144                         status = "disabled";
 145                 };
 146
 147                 gpio0: gpio@e6050000 {
 148                         compatible = "renesas,gpio-r8a77980",
 149                                      "renesas,rcar-gen3-gpio";
 150                         reg = <0 0xe6050000 0 0x50>;
 151                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 152                         #gpio-cells = <2>;
 153                         gpio-controller;
 154                         gpio-ranges = <&pfc 0 0 22>;
 155                         #interrupt-cells = <2>;
 156                         interrupt-controller;
 157                         clocks = <&cpg CPG_MOD 912>;
 158                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 159                         resets = <&cpg 912>;
 160                 };
 161
 162                 gpio1: gpio@e6051000 {
 163                         compatible = "renesas,gpio-r8a77980",
 164                                      "renesas,rcar-gen3-gpio";
 165                         reg = <0 0xe6051000 0 0x50>;
 166                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 167                         #gpio-cells = <2>;
 168                         gpio-controller;
 169                         gpio-ranges = <&pfc 0 32 28>;
 170                         #interrupt-cells = <2>;
 171                         interrupt-controller;
 172                         clocks = <&cpg CPG_MOD 911>;
 173                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 174                         resets = <&cpg 911>;
 175                 };
 176
 177                 gpio2: gpio@e6052000 {
 178                         compatible = "renesas,gpio-r8a77980",
 179                                      "renesas,rcar-gen3-gpio";
 180                         reg = <0 0xe6052000 0 0x50>;
 181                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 182                         #gpio-cells = <2>;
 183                         gpio-controller;
 184                         gpio-ranges = <&pfc 0 64 30>;
 185                         #interrupt-cells = <2>;
 186                         interrupt-controller;
 187                         clocks = <&cpg CPG_MOD 910>;
 188                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 189                         resets = <&cpg 910>;
 190                 };
 191
 192                 gpio3: gpio@e6053000 {
 193                         compatible = "renesas,gpio-r8a77980",
 194                                      "renesas,rcar-gen3-gpio";
 195                         reg = <0 0xe6053000 0 0x50>;
 196                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 197                         #gpio-cells = <2>;
 198                         gpio-controller;
 199                         gpio-ranges = <&pfc 0 96 17>;
 200                         #interrupt-cells = <2>;
 201                         interrupt-controller;
 202                         clocks = <&cpg CPG_MOD 909>;
 203                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 204                         resets = <&cpg 909>;
 205                 };
 206
 207                 gpio4: gpio@e6054000 {
 208                         compatible = "renesas,gpio-r8a77980",
 209                                      "renesas,rcar-gen3-gpio";
 210                         reg = <0 0xe6054000 0 0x50>;
 211                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 128 25>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 908>;
 218                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 219                         resets = <&cpg 908>;
 220                 };
 221
 222                 gpio5: gpio@e6055000 {
 223                         compatible = "renesas,gpio-r8a77980",
 224                                      "renesas,rcar-gen3-gpio";
 225                         reg = <0 0xe6055000 0 0x50>;
 226                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 227                         #gpio-cells = <2>;
 228                         gpio-controller;
 229                         gpio-ranges = <&pfc 0 160 15>;
 230                         #interrupt-cells = <2>;
 231                         interrupt-controller;
 232                         clocks = <&cpg CPG_MOD 907>;
 233                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 234                         resets = <&cpg 907>;
 235                 };
 236
 237                 pfc: pin-controller@e6060000 {
 238                         compatible = "renesas,pfc-r8a77980";
 239                         reg = <0 0xe6060000 0 0x50c>;
 240                 };
 241
 242                 cmt0: timer@e60f0000 {
 243                         compatible = "renesas,r8a77980-cmt0",
 244                                      "renesas,rcar-gen3-cmt0";
 245                         reg = <0 0xe60f0000 0 0x1004>;
 246                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 247                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 248                         clocks = <&cpg CPG_MOD 303>;
 249                         clock-names = "fck";
 250                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 251                         resets = <&cpg 303>;
 252                         status = "disabled";
 253                 };
 254
 255                 cmt1: timer@e6130000 {
 256                         compatible = "renesas,r8a77980-cmt1",
 257                                      "renesas,rcar-gen3-cmt1";
 258                         reg = <0 0xe6130000 0 0x1004>;
 259                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 260                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 261                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 267                         clocks = <&cpg CPG_MOD 302>;
 268                         clock-names = "fck";
 269                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 270                         resets = <&cpg 302>;
 271                         status = "disabled";
 272                 };
 273
 274                 cmt2: timer@e6140000 {
 275                         compatible = "renesas,r8a77980-cmt1",
 276                                      "renesas,rcar-gen3-cmt1";
 277                         reg = <0 0xe6140000 0 0x1004>;
 278                         interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
 279                                      <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
 280                                      <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 281                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
 282                                      <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
 283                                      <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
 285                                      <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 286                         clocks = <&cpg CPG_MOD 301>;
 287                         clock-names = "fck";
 288                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 289                         resets = <&cpg 301>;
 290                         status = "disabled";
 291                 };
 292
 293                 cmt3: timer@e6148000 {
 294                         compatible = "renesas,r8a77980-cmt1",
 295                                      "renesas,rcar-gen3-cmt1";
 296                         reg = <0 0xe6148000 0 0x1004>;
 297                         interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
 298                                      <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
 299                                      <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
 300                                      <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
 301                                      <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
 302                                      <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
 303                                      <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 304                                      <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
 305                         clocks = <&cpg CPG_MOD 300>;
 306                         clock-names = "fck";
 307                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 308                         resets = <&cpg 300>;
 309                         status = "disabled";
 310                 };
 311
 312                 cpg: clock-controller@e6150000 {
 313                         compatible = "renesas,r8a77980-cpg-mssr";
 314                         reg = <0 0xe6150000 0 0x1000>;
 315                         clocks = <&extal_clk>, <&extalr_clk>;
 316                         clock-names = "extal", "extalr";
 317                         #clock-cells = <2>;
 318                         #power-domain-cells = <0>;
 319                         #reset-cells = <1>;
 320                 };
 321
 322                 rst: reset-controller@e6160000 {
 323                         compatible = "renesas,r8a77980-rst";
 324                         reg = <0 0xe6160000 0 0x200>;
 325                 };
 326
 327                 sysc: system-controller@e6180000 {
 328                         compatible = "renesas,r8a77980-sysc";
 329                         reg = <0 0xe6180000 0 0x440>;
 330                         #power-domain-cells = <1>;
 331                 };
 332
 333                 tsc: thermal@e6198000 {
 334                         compatible = "renesas,r8a77980-thermal";
 335                         reg = <0 0xe6198000 0 0x100>,
 336                               <0 0xe61a0000 0 0x100>;
 337                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 338                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 339                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 340                         clocks = <&cpg CPG_MOD 522>;
 341                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 342                         resets = <&cpg 522>;
 343                         #thermal-sensor-cells = <1>;
 344                 };
 345
 346                 intc_ex: interrupt-controller@e61c0000 {
 347                         compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
 348                         #interrupt-cells = <2>;
 349                         interrupt-controller;
 350                         reg = <0 0xe61c0000 0 0x200>;
 351                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 352                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 353                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 354                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 355                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 356                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 357                         clocks = <&cpg CPG_MOD 407>;
 358                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 359                         resets = <&cpg 407>;
 360                 };
 361
 362                 tmu0: timer@e61e0000 {
 363                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 364                         reg = <0 0xe61e0000 0 0x30>;
 365                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 367                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 368                         clocks = <&cpg CPG_MOD 125>;
 369                         clock-names = "fck";
 370                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 371                         resets = <&cpg 125>;
 372                         status = "disabled";
 373                 };
 374
 375                 tmu1: timer@e6fc0000 {
 376                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 377                         reg = <0 0xe6fc0000 0 0x30>;
 378                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 379                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 380                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 381                         clocks = <&cpg CPG_MOD 124>;
 382                         clock-names = "fck";
 383                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 384                         resets = <&cpg 124>;
 385                         status = "disabled";
 386                 };
 387
 388                 tmu2: timer@e6fd0000 {
 389                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 390                         reg = <0 0xe6fd0000 0 0x30>;
 391                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 392                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 393                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 394                         clocks = <&cpg CPG_MOD 123>;
 395                         clock-names = "fck";
 396                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 397                         resets = <&cpg 123>;
 398                         status = "disabled";
 399                 };
 400
 401                 tmu3: timer@e6fe0000 {
 402                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 403                         reg = <0 0xe6fe0000 0 0x30>;
 404                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 405                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 406                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 407                         clocks = <&cpg CPG_MOD 122>;
 408                         clock-names = "fck";
 409                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 410                         resets = <&cpg 122>;
 411                         status = "disabled";
 412                 };
 413
 414                 tmu4: timer@ffc00000 {
 415                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 416                         reg = <0 0xffc00000 0 0x30>;
 417                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 418                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 419                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 121>;
 421                         clock-names = "fck";
 422                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 423                         resets = <&cpg 121>;
 424                         status = "disabled";
 425                 };
 426
 427                 i2c0: i2c@e6500000 {
 428                         compatible = "renesas,i2c-r8a77980",
 429                                      "renesas,rcar-gen3-i2c";
 430                         reg = <0 0xe6500000 0 0x40>;
 431                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 432                         clocks = <&cpg CPG_MOD 931>;
 433                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 434                         resets = <&cpg 931>;
 435                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 436                                <&dmac2 0x91>, <&dmac2 0x90>;
 437                         dma-names = "tx", "rx", "tx", "rx";
 438                         i2c-scl-internal-delay-ns = <6>;
 439                         #address-cells = <1>;
 440                         #size-cells = <0>;
 441                         status = "disabled";
 442                 };
 443
 444                 i2c1: i2c@e6508000 {
 445                         compatible = "renesas,i2c-r8a77980",
 446                                      "renesas,rcar-gen3-i2c";
 447                         reg = <0 0xe6508000 0 0x40>;
 448                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 449                         clocks = <&cpg CPG_MOD 930>;
 450                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 451                         resets = <&cpg 930>;
 452                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 453                                <&dmac2 0x93>, <&dmac2 0x92>;
 454                         dma-names = "tx", "rx", "tx", "rx";
 455                         i2c-scl-internal-delay-ns = <6>;
 456                         #address-cells = <1>;
 457                         #size-cells = <0>;
 458                         status = "disabled";
 459                 };
 460
 461                 i2c2: i2c@e6510000 {
 462                         compatible = "renesas,i2c-r8a77980",
 463                                      "renesas,rcar-gen3-i2c";
 464                         reg = <0 0xe6510000 0 0x40>;
 465                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 466                         clocks = <&cpg CPG_MOD 929>;
 467                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 468                         resets = <&cpg 929>;
 469                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 470                                <&dmac2 0x95>, <&dmac2 0x94>;
 471                         dma-names = "tx", "rx", "tx", "rx";
 472                         i2c-scl-internal-delay-ns = <6>;
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         status = "disabled";
 476                 };
 477
 478                 i2c3: i2c@e66d0000 {
 479                         compatible = "renesas,i2c-r8a77980",
 480                                      "renesas,rcar-gen3-i2c";
 481                         reg = <0 0xe66d0000 0 0x40>;
 482                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 928>;
 484                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 485                         resets = <&cpg 928>;
 486                         i2c-scl-internal-delay-ns = <6>;
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         status = "disabled";
 490                 };
 491
 492                 i2c4: i2c@e66d8000 {
 493                         compatible = "renesas,i2c-r8a77980",
 494                                      "renesas,rcar-gen3-i2c";
 495                         reg = <0 0xe66d8000 0 0x40>;
 496                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 497                         clocks = <&cpg CPG_MOD 927>;
 498                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 499                         resets = <&cpg 927>;
 500                         i2c-scl-internal-delay-ns = <6>;
 501                         #address-cells = <1>;
 502                         #size-cells = <0>;
 503                         status = "disabled";
 504                 };
 505
 506                 i2c5: i2c@e66e0000 {
 507                         compatible = "renesas,i2c-r8a77980",
 508                                      "renesas,rcar-gen3-i2c";
 509                         reg = <0 0xe66e0000 0 0x40>;
 510                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 511                         clocks = <&cpg CPG_MOD 919>;
 512                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 513                         resets = <&cpg 919>;
 514                         dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
 515                                <&dmac2 0x9b>, <&dmac2 0x9a>;
 516                         dma-names = "tx", "rx", "tx", "rx";
 517                         i2c-scl-internal-delay-ns = <6>;
 518                         #address-cells = <1>;
 519                         #size-cells = <0>;
 520                         status = "disabled";
 521                 };
 522
 523                 hscif0: serial@e6540000 {
 524                         compatible = "renesas,hscif-r8a77980",
 525                                      "renesas,rcar-gen3-hscif",
 526                                      "renesas,hscif";
 527                         reg = <0 0xe6540000 0 0x60>;
 528                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&cpg CPG_MOD 520>,
 530                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 531                                  <&scif_clk>;
 532                         clock-names = "fck", "brg_int", "scif_clk";
 533                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 534                                <&dmac2 0x31>, <&dmac2 0x30>;
 535                         dma-names = "tx", "rx", "tx", "rx";
 536                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 537                         resets = <&cpg 520>;
 538                         status = "disabled";
 539                 };
 540
 541                 hscif1: serial@e6550000 {
 542                         compatible = "renesas,hscif-r8a77980",
 543                                      "renesas,rcar-gen3-hscif",
 544                                      "renesas,hscif";
 545                         reg = <0 0xe6550000 0 0x60>;
 546                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 547                         clocks = <&cpg CPG_MOD 519>,
 548                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 549                                  <&scif_clk>;
 550                         clock-names = "fck", "brg_int", "scif_clk";
 551                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 552                                <&dmac2 0x33>, <&dmac2 0x32>;
 553                         dma-names = "tx", "rx", "tx", "rx";
 554                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 555                         resets = <&cpg 519>;
 556                         status = "disabled";
 557                 };
 558
 559                 hscif2: serial@e6560000 {
 560                         compatible = "renesas,hscif-r8a77980",
 561                                      "renesas,rcar-gen3-hscif",
 562                                      "renesas,hscif";
 563                         reg = <0 0xe6560000 0 0x60>;
 564                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 565                         clocks = <&cpg CPG_MOD 518>,
 566                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 567                                  <&scif_clk>;
 568                         clock-names = "fck", "brg_int", "scif_clk";
 569                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 570                                <&dmac2 0x35>, <&dmac2 0x34>;
 571                         dma-names = "tx", "rx", "tx", "rx";
 572                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 573                         resets = <&cpg 518>;
 574                         status = "disabled";
 575                 };
 576
 577                 hscif3: serial@e66a0000 {
 578                         compatible = "renesas,hscif-r8a77980",
 579                                      "renesas,rcar-gen3-hscif",
 580                                      "renesas,hscif";
 581                         reg = <0 0xe66a0000 0 0x60>;
 582                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 517>,
 584                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 585                                  <&scif_clk>;
 586                         clock-names = "fck", "brg_int", "scif_clk";
 587                         dmas = <&dmac1 0x37>, <&dmac1 0x36>,
 588                                <&dmac2 0x37>, <&dmac2 0x36>;
 589                         dma-names = "tx", "rx", "tx", "rx";
 590                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 591                         resets = <&cpg 517>;
 592                         status = "disabled";
 593                 };
 594
 595                 pcie_phy: pcie-phy@e65d0000 {
 596                         compatible = "renesas,r8a77980-pcie-phy";
 597                         reg = <0 0xe65d0000 0 0x8000>;
 598                         #phy-cells = <0>;
 599                         clocks = <&cpg CPG_MOD 319>;
 600                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 601                         resets = <&cpg 319>;
 602                         status = "disabled";
 603                 };
 604
 605                 canfd: can@e66c0000 {
 606                         compatible = "renesas,r8a77980-canfd",
 607                                      "renesas,rcar-gen3-canfd";
 608                         reg = <0 0xe66c0000 0 0x8000>;
 609                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 914>,
 612                                  <&cpg CPG_CORE R8A77980_CLK_CANFD>,
 613                                  <&can_clk>;
 614                         clock-names = "fck", "canfd", "can_clk";
 615                         assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
 616                         assigned-clock-rates = <40000000>;
 617                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 618                         resets = <&cpg 914>;
 619                         status = "disabled";
 620
 621                         channel0 {
 622                                 status = "disabled";
 623                         };
 624
 625                         channel1 {
 626                                 status = "disabled";
 627                         };
 628                 };
 629
 630                 avb: ethernet@e6800000 {
 631                         compatible = "renesas,etheravb-r8a77980",
 632                                      "renesas,etheravb-rcar-gen3";
 633                         reg = <0 0xe6800000 0 0x800>;
 634                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 637                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 638                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 639                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 640                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 641                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 642                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 643                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 644                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 653                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 654                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 655                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 656                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 657                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 658                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 659                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 660                                           "ch4", "ch5", "ch6", "ch7",
 661                                           "ch8", "ch9", "ch10", "ch11",
 662                                           "ch12", "ch13", "ch14", "ch15",
 663                                           "ch16", "ch17", "ch18", "ch19",
 664                                           "ch20", "ch21", "ch22", "ch23",
 665                                           "ch24";
 666                         clocks = <&cpg CPG_MOD 812>;
 667                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 668                         resets = <&cpg 812>;
 669                         phy-mode = "rgmii";
 670                         iommus = <&ipmmu_ds1 33>;
 671                         #address-cells = <1>;
 672                         #size-cells = <0>;
 673                         status = "disabled";
 674                 };
 675
 676                 pwm0: pwm@e6e30000 {
 677                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 678                         reg = <0 0xe6e30000 0 0x10>;
 679                         #pwm-cells = <2>;
 680                         clocks = <&cpg CPG_MOD 523>;
 681                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 682                         resets = <&cpg 523>;
 683                         status = "disabled";
 684                 };
 685
 686                 pwm1: pwm@e6e31000 {
 687                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 688                         reg = <0 0xe6e31000 0 0x10>;
 689                         #pwm-cells = <2>;
 690                         clocks = <&cpg CPG_MOD 523>;
 691                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 692                         resets = <&cpg 523>;
 693                         status = "disabled";
 694                 };
 695
 696                 pwm2: pwm@e6e32000 {
 697                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 698                         reg = <0 0xe6e32000 0 0x10>;
 699                         #pwm-cells = <2>;
 700                         clocks = <&cpg CPG_MOD 523>;
 701                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 702                         resets = <&cpg 523>;
 703                         status = "disabled";
 704                 };
 705
 706                 pwm3: pwm@e6e33000 {
 707                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 708                         reg = <0 0xe6e33000 0 0x10>;
 709                         #pwm-cells = <2>;
 710                         clocks = <&cpg CPG_MOD 523>;
 711                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 712                         resets = <&cpg 523>;
 713                         status = "disabled";
 714                 };
 715
 716                 pwm4: pwm@e6e34000 {
 717                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 718                         reg = <0 0xe6e34000 0 0x10>;
 719                         #pwm-cells = <2>;
 720                         clocks = <&cpg CPG_MOD 523>;
 721                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 722                         resets = <&cpg 523>;
 723                         status = "disabled";
 724                 };
 725
 726                 scif0: serial@e6e60000 {
 727                         compatible = "renesas,scif-r8a77980",
 728                                      "renesas,rcar-gen3-scif",
 729                                      "renesas,scif";
 730                         reg = <0 0xe6e60000 0 0x40>;
 731                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 732                         clocks = <&cpg CPG_MOD 207>,
 733                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 734                                  <&scif_clk>;
 735                         clock-names = "fck", "brg_int", "scif_clk";
 736                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 737                                <&dmac2 0x51>, <&dmac2 0x50>;
 738                         dma-names = "tx", "rx", "tx", "rx";
 739                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 740                         resets = <&cpg 207>;
 741                         status = "disabled";
 742                 };
 743
 744                 scif1: serial@e6e68000 {
 745                         compatible = "renesas,scif-r8a77980",
 746                                      "renesas,rcar-gen3-scif",
 747                                      "renesas,scif";
 748                         reg = <0 0xe6e68000 0 0x40>;
 749                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 750                         clocks = <&cpg CPG_MOD 206>,
 751                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 752                                  <&scif_clk>;
 753                         clock-names = "fck", "brg_int", "scif_clk";
 754                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 755                                <&dmac2 0x53>, <&dmac2 0x52>;
 756                         dma-names = "tx", "rx", "tx", "rx";
 757                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 758                         resets = <&cpg 206>;
 759                         status = "disabled";
 760                 };
 761
 762                 scif3: serial@e6c50000 {
 763                         compatible = "renesas,scif-r8a77980",
 764                                      "renesas,rcar-gen3-scif",
 765                                      "renesas,scif";
 766                         reg = <0 0xe6c50000 0 0x40>;
 767                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 768                         clocks = <&cpg CPG_MOD 204>,
 769                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 770                                  <&scif_clk>;
 771                         clock-names = "fck", "brg_int", "scif_clk";
 772                         dmas = <&dmac1 0x57>, <&dmac1 0x56>,
 773                                <&dmac2 0x57>, <&dmac2 0x56>;
 774                         dma-names = "tx", "rx", "tx", "rx";
 775                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 776                         resets = <&cpg 204>;
 777                         status = "disabled";
 778                 };
 779
 780                 scif4: serial@e6c40000 {
 781                         compatible = "renesas,scif-r8a77980",
 782                                      "renesas,rcar-gen3-scif",
 783                                      "renesas,scif";
 784                         reg = <0 0xe6c40000 0 0x40>;
 785                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 786                         clocks = <&cpg CPG_MOD 203>,
 787                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 788                                  <&scif_clk>;
 789                         clock-names = "fck", "brg_int", "scif_clk";
 790                         dmas = <&dmac1 0x59>, <&dmac1 0x58>,
 791                                <&dmac2 0x59>, <&dmac2 0x58>;
 792                         dma-names = "tx", "rx", "tx", "rx";
 793                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 794                         resets = <&cpg 203>;
 795                         status = "disabled";
 796                 };
 797
 798                 tpu: pwm@e6e80000 {
 799                         compatible = "renesas,tpu-r8a77980", "renesas,tpu";
 800                         reg = <0 0xe6e80000 0 0x148>;
 801                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 802                         clocks = <&cpg CPG_MOD 304>;
 803                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 804                         resets = <&cpg 304>;
 805                         #pwm-cells = <3>;
 806                         status = "disabled";
 807                 };
 808
 809                 msiof0: spi@e6e90000 {
 810                         compatible = "renesas,msiof-r8a77980",
 811                                      "renesas,rcar-gen3-msiof";
 812                         reg = <0 0xe6e90000 0 0x64>;
 813                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 814                         clocks = <&cpg CPG_MOD 211>;
 815                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 816                         resets = <&cpg 211>;
 817                         #address-cells = <1>;
 818                         #size-cells = <0>;
 819                         status = "disabled";
 820                 };
 821
 822                 msiof1: spi@e6ea0000 {
 823                         compatible = "renesas,msiof-r8a77980",
 824                                      "renesas,rcar-gen3-msiof";
 825                         reg = <0 0xe6ea0000 0 0x0064>;
 826                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 827                         clocks = <&cpg CPG_MOD 210>;
 828                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 829                         resets = <&cpg 210>;
 830                         #address-cells = <1>;
 831                         #size-cells = <0>;
 832                         status = "disabled";
 833                 };
 834
 835                 msiof2: spi@e6c00000 {
 836                         compatible = "renesas,msiof-r8a77980",
 837                                      "renesas,rcar-gen3-msiof";
 838                         reg = <0 0xe6c00000 0 0x0064>;
 839                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 840                         clocks = <&cpg CPG_MOD 209>;
 841                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 842                         resets = <&cpg 209>;
 843                         #address-cells = <1>;
 844                         #size-cells = <0>;
 845                         status = "disabled";
 846                 };
 847
 848                 msiof3: spi@e6c10000 {
 849                         compatible = "renesas,msiof-r8a77980",
 850                                      "renesas,rcar-gen3-msiof";
 851                         reg = <0 0xe6c10000 0 0x0064>;
 852                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 853                         clocks = <&cpg CPG_MOD 208>;
 854                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 855                         resets = <&cpg 208>;
 856                         #address-cells = <1>;
 857                         #size-cells = <0>;
 858                         status = "disabled";
 859                 };
 860
 861                 vin0: video@e6ef0000 {
 862                         compatible = "renesas,vin-r8a77980";
 863                         reg = <0 0xe6ef0000 0 0x1000>;
 864                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 865                         clocks = <&cpg CPG_MOD 811>;
 866                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 867                         resets = <&cpg 811>;
 868                         status = "disabled";
 869
 870                         ports {
 871                                 #address-cells = <1>;
 872                                 #size-cells = <0>;
 873
 874                                 port@1 {
 875                                         #address-cells = <1>;
 876                                         #size-cells = <0>;
 877
 878                                         reg = <1>;
 879
 880                                         vin0csi40: endpoint@2 {
 881                                                 reg = <2>;
 882                                                 remote-endpoint = <&csi40vin0>;
 883                                         };
 884                                 };
 885                         };
 886                 };
 887
 888                 vin1: video@e6ef1000 {
 889                         compatible = "renesas,vin-r8a77980";
 890                         reg = <0 0xe6ef1000 0 0x1000>;
 891                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 892                         clocks = <&cpg CPG_MOD 810>;
 893                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 894                         status = "disabled";
 895                         resets = <&cpg 810>;
 896
 897                         ports {
 898                                 #address-cells = <1>;
 899                                 #size-cells = <0>;
 900
 901                                 port@1 {
 902                                         #address-cells = <1>;
 903                                         #size-cells = <0>;
 904
 905                                         reg = <1>;
 906
 907                                         vin1csi40: endpoint@2 {
 908                                                 reg = <2>;
 909                                                 remote-endpoint = <&csi40vin1>;
 910                                         };
 911                                 };
 912                         };
 913                 };
 914
 915                 vin2: video@e6ef2000 {
 916                         compatible = "renesas,vin-r8a77980";
 917                         reg = <0 0xe6ef2000 0 0x1000>;
 918                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 919                         clocks = <&cpg CPG_MOD 809>;
 920                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 921                         resets = <&cpg 809>;
 922                         status = "disabled";
 923
 924                         ports {
 925                                 #address-cells = <1>;
 926                                 #size-cells = <0>;
 927
 928                                 port@1 {
 929                                         #address-cells = <1>;
 930                                         #size-cells = <0>;
 931
 932                                         reg = <1>;
 933
 934                                         vin2csi40: endpoint@2 {
 935                                                 reg = <2>;
 936                                                 remote-endpoint = <&csi40vin2>;
 937                                         };
 938                                 };
 939                         };
 940                 };
 941
 942                 vin3: video@e6ef3000 {
 943                         compatible = "renesas,vin-r8a77980";
 944                         reg = <0 0xe6ef3000 0 0x1000>;
 945                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 946                         clocks = <&cpg CPG_MOD 808>;
 947                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 948                         resets = <&cpg 808>;
 949                         status = "disabled";
 950
 951                         ports {
 952                                 #address-cells = <1>;
 953                                 #size-cells = <0>;
 954
 955                                 port@1 {
 956                                         #address-cells = <1>;
 957                                         #size-cells = <0>;
 958
 959                                         reg = <1>;
 960
 961                                         vin3csi40: endpoint@2 {
 962                                                 reg = <2>;
 963                                                 remote-endpoint = <&csi40vin3>;
 964                                         };
 965                                 };
 966                         };
 967                 };
 968
 969                 vin4: video@e6ef4000 {
 970                         compatible = "renesas,vin-r8a77980";
 971                         reg = <0 0xe6ef4000 0 0x1000>;
 972                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 973                         clocks = <&cpg CPG_MOD 807>;
 974                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 975                         resets = <&cpg 807>;
 976                         status = "disabled";
 977
 978                         ports {
 979                                 #address-cells = <1>;
 980                                 #size-cells = <0>;
 981
 982                                 port@1 {
 983                                         #address-cells = <1>;
 984                                         #size-cells = <0>;
 985
 986                                         reg = <1>;
 987
 988                                         vin4csi41: endpoint@2 {
 989                                                 reg = <2>;
 990                                                 remote-endpoint = <&csi41vin4>;
 991                                         };
 992                                 };
 993                         };
 994                 };
 995
 996                 vin5: video@e6ef5000 {
 997                         compatible = "renesas,vin-r8a77980";
 998                         reg = <0 0xe6ef5000 0 0x1000>;
 999                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1000                         clocks = <&cpg CPG_MOD 806>;
1001                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1002                         resets = <&cpg 806>;
1003                         status = "disabled";
1004
1005                         ports {
1006                                 #address-cells = <1>;
1007                                 #size-cells = <0>;
1008
1009                                 port@1 {
1010                                         #address-cells = <1>;
1011                                         #size-cells = <0>;
1012
1013                                         reg = <1>;
1014
1015                                         vin5csi41: endpoint@2 {
1016                                                 reg = <2>;
1017                                                 remote-endpoint = <&csi41vin5>;
1018                                         };
1019                                 };
1020                         };
1021                 };
1022
1023                 vin6: video@e6ef6000 {
1024                         compatible = "renesas,vin-r8a77980";
1025                         reg = <0 0xe6ef6000 0 0x1000>;
1026                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1027                         clocks = <&cpg CPG_MOD 805>;
1028                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1029                         resets = <&cpg 805>;
1030                         status = "disabled";
1031
1032                         ports {
1033                                 #address-cells = <1>;
1034                                 #size-cells = <0>;
1035
1036                                 port@1 {
1037                                         #address-cells = <1>;
1038                                         #size-cells = <0>;
1039
1040                                         reg = <1>;
1041
1042                                         vin6csi41: endpoint@2 {
1043                                                 reg = <2>;
1044                                                 remote-endpoint = <&csi41vin6>;
1045                                         };
1046                                 };
1047                         };
1048                 };
1049
1050                 vin7: video@e6ef7000 {
1051                         compatible = "renesas,vin-r8a77980";
1052                         reg = <0 0xe6ef7000 0 0x1000>;
1053                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1054                         clocks = <&cpg CPG_MOD 804>;
1055                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1056                         resets = <&cpg 804>;
1057                         status = "disabled";
1058
1059                         ports {
1060                                 #address-cells = <1>;
1061                                 #size-cells = <0>;
1062
1063                                 port@1 {
1064                                         #address-cells = <1>;
1065                                         #size-cells = <0>;
1066
1067                                         reg = <1>;
1068
1069                                         vin7csi41: endpoint@2 {
1070                                                 reg = <2>;
1071                                                 remote-endpoint = <&csi41vin7>;
1072                                         };
1073                                 };
1074                         };
1075                 };
1076
1077                 vin8: video@e6ef8000 {
1078                         compatible = "renesas,vin-r8a77980";
1079                         reg = <0 0xe6ef8000 0 0x1000>;
1080                         interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1081                         clocks = <&cpg CPG_MOD 628>;
1082                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1083                         resets = <&cpg 628>;
1084                         status = "disabled";
1085                 };
1086
1087                 vin9: video@e6ef9000 {
1088                         compatible = "renesas,vin-r8a77980";
1089                         reg = <0 0xe6ef9000 0 0x1000>;
1090                         interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1091                         clocks = <&cpg CPG_MOD 627>;
1092                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1093                         resets = <&cpg 627>;
1094                         status = "disabled";
1095                 };
1096
1097                 vin10: video@e6efa000 {
1098                         compatible = "renesas,vin-r8a77980";
1099                         reg = <0 0xe6efa000 0 0x1000>;
1100                         interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1101                         clocks = <&cpg CPG_MOD 625>;
1102                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1103                         resets = <&cpg 625>;
1104                         status = "disabled";
1105                 };
1106
1107                 vin11: video@e6efb000 {
1108                         compatible = "renesas,vin-r8a77980";
1109                         reg = <0 0xe6efb000 0 0x1000>;
1110                         interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1111                         clocks = <&cpg CPG_MOD 618>;
1112                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1113                         resets = <&cpg 618>;
1114                         status = "disabled";
1115                 };
1116
1117                 vin12: video@e6efc000 {
1118                         compatible = "renesas,vin-r8a77980";
1119                         reg = <0 0xe6efc000 0 0x1000>;
1120                         interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1121                         clocks = <&cpg CPG_MOD 612>;
1122                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1123                         resets = <&cpg 612>;
1124                         status = "disabled";
1125                 };
1126
1127                 vin13: video@e6efd000 {
1128                         compatible = "renesas,vin-r8a77980";
1129                         reg = <0 0xe6efd000 0 0x1000>;
1130                         interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1131                         clocks = <&cpg CPG_MOD 608>;
1132                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1133                         resets = <&cpg 608>;
1134                         status = "disabled";
1135                 };
1136
1137                 vin14: video@e6efe000 {
1138                         compatible = "renesas,vin-r8a77980";
1139                         reg = <0 0xe6efe000 0 0x1000>;
1140                         interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1141                         clocks = <&cpg CPG_MOD 605>;
1142                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1143                         resets = <&cpg 605>;
1144                         status = "disabled";
1145                 };
1146
1147                 vin15: video@e6eff000 {
1148                         compatible = "renesas,vin-r8a77980";
1149                         reg = <0 0xe6eff000 0 0x1000>;
1150                         interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1151                         clocks = <&cpg CPG_MOD 604>;
1152                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1153                         resets = <&cpg 604>;
1154                         status = "disabled";
1155                 };
1156
1157                 dmac1: dma-controller@e7300000 {
1158                         compatible = "renesas,dmac-r8a77980",
1159                                      "renesas,rcar-dmac";
1160                         reg = <0 0xe7300000 0 0x10000>;
1161                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
1162                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
1163                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
1164                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
1165                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
1166                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
1167                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
1168                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
1169                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
1170                                       GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
1171                                       GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
1172                                       GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
1173                                       GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
1174                                       GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
1175                                       GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
1176                                       GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
1177                                       GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1178                         interrupt-names = "error",
1179                                           "ch0", "ch1", "ch2", "ch3",
1180                                           "ch4", "ch5", "ch6", "ch7",
1181                                           "ch8", "ch9", "ch10", "ch11",
1182                                           "ch12", "ch13", "ch14", "ch15";
1183                         clocks = <&cpg CPG_MOD 218>;
1184                         clock-names = "fck";
1185                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1186                         resets = <&cpg 218>;
1187                         #dma-cells = <1>;
1188                         dma-channels = <16>;
1189                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1190                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1191                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1192                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1193                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1194                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1195                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1196                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1197                 };
1198
1199                 dmac2: dma-controller@e7310000 {
1200                         compatible = "renesas,dmac-r8a77980",
1201                                      "renesas,rcar-dmac";
1202                         reg = <0 0xe7310000 0 0x10000>;
1203                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
1204                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
1205                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
1206                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
1207                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
1208                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
1209                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
1210                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
1211                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
1212                                       GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
1213                                       GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
1214                                       GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
1215                                       GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
1216                                       GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
1217                                       GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
1218                                       GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
1219                                       GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1220                         interrupt-names = "error",
1221                                           "ch0", "ch1", "ch2", "ch3",
1222                                           "ch4", "ch5", "ch6", "ch7",
1223                                           "ch8", "ch9", "ch10", "ch11",
1224                                           "ch12", "ch13", "ch14", "ch15";
1225                         clocks = <&cpg CPG_MOD 217>;
1226                         clock-names = "fck";
1227                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1228                         resets = <&cpg 217>;
1229                         #dma-cells = <1>;
1230                         dma-channels = <16>;
1231                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1232                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1233                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1234                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1235                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1236                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1237                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1238                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1239                 };
1240
1241                 gether: ethernet@e7400000 {
1242                         compatible = "renesas,gether-r8a77980";
1243                         reg = <0 0xe7400000 0 0x1000>;
1244                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1245                         clocks = <&cpg CPG_MOD 813>;
1246                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1247                         resets = <&cpg 813>;
1248                         #address-cells = <1>;
1249                         #size-cells = <0>;
1250                         status = "disabled";
1251                 };
1252
1253                 ipmmu_ds1: mmu@e7740000 {
1254                         compatible = "renesas,ipmmu-r8a77980";
1255                         reg = <0 0xe7740000 0 0x1000>;
1256                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1257                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1258                         #iommu-cells = <1>;
1259                 };
1260
1261                 ipmmu_ir: mmu@ff8b0000 {
1262                         compatible = "renesas,ipmmu-r8a77980";
1263                         reg = <0 0xff8b0000 0 0x1000>;
1264                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1265                         power-domains = <&sysc R8A77980_PD_A3IR>;
1266                         #iommu-cells = <1>;
1267                 };
1268
1269                 ipmmu_mm: mmu@e67b0000 {
1270                         compatible = "renesas,ipmmu-r8a77980";
1271                         reg = <0 0xe67b0000 0 0x1000>;
1272                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1273                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1274                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1275                         #iommu-cells = <1>;
1276                 };
1277
1278                 ipmmu_rt: mmu@ffc80000 {
1279                         compatible = "renesas,ipmmu-r8a77980";
1280                         reg = <0 0xffc80000 0 0x1000>;
1281                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1282                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1283                         #iommu-cells = <1>;
1284                 };
1285
1286                 ipmmu_vc0: mmu@fe6b0000 {
1287                         compatible = "renesas,ipmmu-r8a77980";
1288                         reg = <0 0xfe6b0000 0 0x1000>;
1289                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1290                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1291                         #iommu-cells = <1>;
1292                 };
1293
1294                 ipmmu_vi0: mmu@febd0000 {
1295                         compatible = "renesas,ipmmu-r8a77980";
1296                         reg = <0 0xfebd0000 0 0x1000>;
1297                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1298                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1299                         #iommu-cells = <1>;
1300                 };
1301
1302                 ipmmu_vip0: mmu@e7b00000 {
1303                         compatible = "renesas,ipmmu-r8a77980";
1304                         reg = <0 0xe7b00000 0 0x1000>;
1305                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1306                         #iommu-cells = <1>;
1307                 };
1308
1309                 ipmmu_vip1: mmu@e7960000 {
1310                         compatible = "renesas,ipmmu-r8a77980";
1311                         reg = <0 0xe7960000 0 0x1000>;
1312                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1313                         #iommu-cells = <1>;
1314                 };
1315
1316                 mmc0: mmc@ee140000 {
1317                         compatible = "renesas,sdhi-r8a77980",
1318                                      "renesas,rcar-gen3-sdhi";
1319                         reg = <0 0xee140000 0 0x2000>;
1320                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1321                         clocks = <&cpg CPG_MOD 314>;
1322                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1323                         resets = <&cpg 314>;
1324                         max-frequency = <200000000>;
1325                         status = "disabled";
1326                 };
1327
1328                 gic: interrupt-controller@f1010000 {
1329                         compatible = "arm,gic-400";
1330                         #interrupt-cells = <3>;
1331                         #address-cells = <0>;
1332                         interrupt-controller;
1333                         reg = <0x0 0xf1010000 0 0x1000>,
1334                               <0x0 0xf1020000 0 0x20000>,
1335                               <0x0 0xf1040000 0 0x20000>,
1336                               <0x0 0xf1060000 0 0x20000>;
1337                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1338                                       IRQ_TYPE_LEVEL_HIGH)>;
1339                         clocks = <&cpg CPG_MOD 408>;
1340                         clock-names = "clk";
1341                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1342                         resets = <&cpg 408>;
1343                 };
1344
1345                 pciec: pcie@fe000000 {
1346                         compatible = "renesas,pcie-r8a77980",
1347                                      "renesas,pcie-rcar-gen3";
1348                         reg = <0 0xfe000000 0 0x80000>;
1349                         #address-cells = <3>;
1350                         #size-cells = <2>;
1351                         bus-range = <0x00 0xff>;
1352                         device_type = "pci";
1353                         ranges = <
1354                                 0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000
1355                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000
1356                                 0x02000000 0 0x30000000 0 0x30000000 0 0x8000000
1357                                 0x42000000 0 0x38000000 0 0x38000000 0 0x8000000
1358                         >;
1359                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000
1360                                       0 0x80000000>;
1361                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1362                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1363                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1364                         #interrupt-cells = <1>;
1365                         interrupt-map-mask = <0 0 0 0>;
1366                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148
1367                                          IRQ_TYPE_LEVEL_HIGH>;
1368                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1369                         clock-names = "pcie", "pcie_bus";
1370                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1371                         resets = <&cpg 319>;
1372                         phys = <&pcie_phy>;
1373                         phy-names = "pcie";
1374                         status = "disabled";
1375                 };
1376
1377                 vspd0: vsp@fea20000 {
1378                         compatible = "renesas,vsp2";
1379                         reg = <0 0xfea20000 0 0x5000>;
1380                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1381                         clocks = <&cpg CPG_MOD 623>;
1382                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1383                         resets = <&cpg 623>;
1384                         renesas,fcp = <&fcpvd0>;
1385                 };
1386
1387                 fcpvd0: fcp@fea27000 {
1388                         compatible = "renesas,fcpv";
1389                         reg = <0 0xfea27000 0 0x200>;
1390                         clocks = <&cpg CPG_MOD 603>;
1391                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1392                         resets = <&cpg 603>;
1393                 };
1394
1395                 csi40: csi2@feaa0000 {
1396                         compatible = "renesas,r8a77980-csi2";
1397                         reg = <0 0xfeaa0000 0 0x10000>;
1398                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1399                         clocks = <&cpg CPG_MOD 716>;
1400                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1401                         resets = <&cpg 716>;
1402                         status = "disabled";
1403
1404                         ports {
1405                                 #address-cells = <1>;
1406                                 #size-cells = <0>;
1407
1408                                 port@1 {
1409                                         #address-cells = <1>;
1410                                         #size-cells = <0>;
1411
1412                                         reg = <1>;
1413
1414                                         csi40vin0: endpoint@0 {
1415                                                 reg = <0>;
1416                                                 remote-endpoint = <&vin0csi40>;
1417                                         };
1418                                         csi40vin1: endpoint@1 {
1419                                                 reg = <1>;
1420                                                 remote-endpoint = <&vin1csi40>;
1421                                         };
1422                                         csi40vin2: endpoint@2 {
1423                                                 reg = <2>;
1424                                                 remote-endpoint = <&vin2csi40>;
1425                                         };
1426                                         csi40vin3: endpoint@3 {
1427                                                 reg = <3>;
1428                                                 remote-endpoint = <&vin3csi40>;
1429                                         };
1430                                 };
1431                         };
1432                 };
1433
1434                 csi41: csi2@feab0000 {
1435                         compatible = "renesas,r8a77980-csi2";
1436                         reg = <0 0xfeab0000 0 0x10000>;
1437                         interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1438                         clocks = <&cpg CPG_MOD 715>;
1439                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1440                         resets = <&cpg 715>;
1441                         status = "disabled";
1442
1443                         ports {
1444                                 #address-cells = <1>;
1445                                 #size-cells = <0>;
1446
1447                                 port@1 {
1448                                         #address-cells = <1>;
1449                                         #size-cells = <0>;
1450
1451                                         reg = <1>;
1452
1453                                         csi41vin4: endpoint@0 {
1454                                                 reg = <0>;
1455                                                 remote-endpoint = <&vin4csi41>;
1456                                         };
1457                                         csi41vin5: endpoint@1 {
1458                                                 reg = <1>;
1459                                                 remote-endpoint = <&vin5csi41>;
1460                                         };
1461                                         csi41vin6: endpoint@2 {
1462                                                 reg = <2>;
1463                                                 remote-endpoint = <&vin6csi41>;
1464                                         };
1465                                         csi41vin7: endpoint@3 {
1466                                                 reg = <3>;
1467                                                 remote-endpoint = <&vin7csi41>;
1468                                         };
1469                                 };
1470                         };
1471                 };
1472
1473                 du: display@feb00000 {
1474                         compatible = "renesas,du-r8a77980",
1475                                      "renesas,du-r8a77970";
1476                         reg = <0 0xfeb00000 0 0x80000>;
1477                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1478                         clocks = <&cpg CPG_MOD 724>;
1479                         clock-names = "du.0";
1480                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1481                         resets = <&cpg 724>;
1482                         vsps = <&vspd0>;
1483                         status = "disabled";
1484
1485                         ports {
1486                                 #address-cells = <1>;
1487                                 #size-cells = <0>;
1488
1489                                 port@0 {
1490                                         reg = <0>;
1491                                         du_out_rgb: endpoint {
1492                                         };
1493                                 };
1494
1495                                 port@1 {
1496                                         reg = <1>;
1497                                         du_out_lvds0: endpoint {
1498                                                 remote-endpoint = <&lvds0_in>;
1499                                         };
1500                                 };
1501                         };
1502                 };
1503
1504                 lvds0: lvds-encoder@feb90000 {
1505                         compatible = "renesas,r8a77980-lvds";
1506                         reg = <0 0xfeb90000 0 0x14>;
1507                         clocks = <&cpg CPG_MOD 727>;
1508                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1509                         resets = <&cpg 727>;
1510                         status = "disabled";
1511
1512                         ports {
1513                                 #address-cells = <1>;
1514                                 #size-cells = <0>;
1515
1516                                 port@0 {
1517                                         reg = <0>;
1518                                         lvds0_in: endpoint {
1519                                                 remote-endpoint =
1520                                                         <&du_out_lvds0>;
1521                                         };
1522                                 };
1523
1524                                 port@1 {
1525                                         reg = <1>;
1526                                         lvds0_out: endpoint {
1527                                         };
1528                                 };
1529                         };
1530                 };
1531
1532                 prr: chipid@fff00044 {
1533                         compatible = "renesas,prr";
1534                         reg = <0 0xfff00044 0 4>;
1535                 };
1536         };
1537
1538         thermal-zones {
1539                 thermal-sensor-1 {
1540                         polling-delay-passive = <250>;
1541                         polling-delay = <1000>;
1542                         thermal-sensors = <&tsc 0>;
1543
1544                         trips {
1545                                 sensor1-passive {
1546                                         temperature = <95000>;
1547                                         hysteresis = <1000>;
1548                                         type = "passive";
1549                                 };
1550                                 sensor1-critical {
1551                                         temperature = <120000>;
1552                                         hysteresis = <1000>;
1553                                         type = "critical";
1554                                 };
1555                         };
1556                 };
1557
1558                 thermal-sensor-2 {
1559                         polling-delay-passive = <250>;
1560                         polling-delay = <1000>;
1561                         thermal-sensors = <&tsc 1>;
1562
1563                         trips {
1564                                 sensor2-passive {
1565                                         temperature = <95000>;
1566                                         hysteresis = <1000>;
1567                                         type = "passive";
1568                                 };
1569                                 sensor2-critical {
1570                                         temperature = <120000>;
1571                                         hysteresis = <1000>;
1572                                         type = "critical";
1573                                 };
1574                         };
1575                 };
1576         };
1577
1578         timer {
1579                 compatible = "arm,armv8-timer";
1580                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1581                                        IRQ_TYPE_LEVEL_LOW)>,
1582                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1583                                        IRQ_TYPE_LEVEL_LOW)>,
1584                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1585                                        IRQ_TYPE_LEVEL_LOW)>,
1586                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1587                                        IRQ_TYPE_LEVEL_LOW)>;
1588         };
1589 };