1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
10 #include "r8a77980.dtsi"
13 model = "Renesas Condor board based on r8a77980";
14 compatible = "renesas,condor", "renesas,r8a77980";
22 stdout-path = "serial0:115200n8";
26 device_type = "memory";
27 /* first 128MB is reserved for secure area. */
28 reg = <0 0x48000000 0 0x78000000>;
32 compatible = "regulator-fixed";
33 regulator-name = "D3.3V";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
40 vddq_vin01: regulator-1 {
41 compatible = "regulator-fixed";
42 regulator-name = "VDDQ_VIN01";
43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <1800000>;
50 compatible = "regulator-fixed";
51 regulator-name = "D1.8V";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
59 compatible = "hdmi-connector";
64 remote-endpoint = <&adv7511_out>;
70 compatible = "thine,thc63lvd1024";
71 vcc-supply = <&d3_3v>;
79 thc63lvd1024_in: endpoint {
80 remote-endpoint = <&lvds0_out>;
86 thc63lvd1024_out: endpoint {
87 remote-endpoint = <&adv7511_in>;
94 compatible = "fixed-clock";
96 clock-frequency = <148500000>;
101 pinctrl-0 = <&avb_pins>;
102 pinctrl-names = "default";
104 phy-mode = "rgmii-id";
105 phy-handle = <&phy0>;
106 renesas,no-ether-link;
109 phy0: ethernet-phy@0 {
110 rxc-skew-ps = <1500>;
112 interrupt-parent = <&gpio1>;
113 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
118 pinctrl-0 = <&canfd0_pins>;
119 pinctrl-names = "default";
128 clocks = <&cpg CPG_MOD 724>,
130 clock-names = "du.0", "dclkin.0";
135 clock-frequency = <16666666>;
139 clock-frequency = <32768>;
143 pinctrl-0 = <&i2c0_pins>;
144 pinctrl-names = "default";
147 clock-frequency = <400000>;
149 io_expander0: gpio@20 {
150 compatible = "onnn,pca9654";
156 io_expander1: gpio@21 {
157 compatible = "onnn,pca9654";
164 compatible = "adi,adv7511w";
166 interrupt-parent = <&gpio1>;
167 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
168 avdd-supply = <&d1_8v>;
169 dvdd-supply = <&d1_8v>;
170 pvdd-supply = <&d1_8v>;
171 bgvdd-supply = <&d1_8v>;
172 dvdd-3v-supply = <&d3_3v>;
174 adi,input-depth = <8>;
175 adi,input-colorspace = "rgb";
176 adi,input-clock = "1x";
177 adi,input-style = <1>;
178 adi,input-justification = "evenly";
181 #address-cells = <1>;
186 adv7511_in: endpoint {
187 remote-endpoint = <&thc63lvd1024_out>;
193 adv7511_out: endpoint {
194 remote-endpoint = <&hdmi_con>;
206 lvds0_out: endpoint {
207 remote-endpoint = <&thc63lvd1024_in>;
214 pinctrl-0 = <&mmc_pins>;
215 pinctrl-1 = <&mmc_pins_uhs>;
216 pinctrl-names = "default", "state_uhs";
218 vmmc-supply = <&d3_3v>;
219 vqmmc-supply = <&vddq_vin01>;
231 clock-frequency = <100000000>;
240 groups = "avb_mdio", "avb_rgmii";
244 canfd0_pins: canfd0 {
245 groups = "canfd0_data_a";
255 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
257 power-source = <3300>;
260 mmc_pins_uhs: mmc_uhs {
261 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
263 power-source = <1800>;
267 groups = "scif0_data";
271 scif_clk_pins: scif_clk {
272 groups = "scif_clk_b";
273 function = "scif_clk";
283 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
284 pinctrl-names = "default";
290 clock-frequency = <14745600>;