1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
15 compatible = "renesas,r8a77970";
27 /* External CAN clock - to be overridden by boards that provide it */
29 compatible = "fixed-clock";
31 clock-frequency = <0>;
40 compatible = "arm,cortex-a53", "arm,armv8";
42 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
43 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
44 next-level-cache = <&L2_CA53>;
45 enable-method = "psci";
50 compatible = "arm,cortex-a53", "arm,armv8";
52 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
53 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
54 next-level-cache = <&L2_CA53>;
55 enable-method = "psci";
58 L2_CA53: cache-controller {
60 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
67 compatible = "fixed-clock";
69 /* This value must be overridden by the board */
70 clock-frequency = <0>;
74 compatible = "fixed-clock";
76 /* This value must be overridden by the board */
77 clock-frequency = <0>;
81 compatible = "arm,cortex-a53-pmu";
82 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
83 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
84 interrupt-affinity = <&a53_0>, <&a53_1>;
88 compatible = "arm,psci-1.0", "arm,psci-0.2";
92 /* External SCIF clock - to be overridden by boards that provide it */
94 compatible = "fixed-clock";
96 clock-frequency = <0>;
100 compatible = "simple-bus";
101 interrupt-parent = <&gic>;
103 #address-cells = <2>;
107 rwdt: watchdog@e6020000 {
108 compatible = "renesas,r8a77970-wdt",
109 "renesas,rcar-gen3-wdt";
110 reg = <0 0xe6020000 0 0x0c>;
111 clocks = <&cpg CPG_MOD 402>;
112 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
117 gpio0: gpio@e6050000 {
118 compatible = "renesas,gpio-r8a77970",
119 "renesas,rcar-gen3-gpio";
120 reg = <0 0xe6050000 0 0x50>;
121 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
124 gpio-ranges = <&pfc 0 0 22>;
125 #interrupt-cells = <2>;
126 interrupt-controller;
127 clocks = <&cpg CPG_MOD 912>;
128 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
132 gpio1: gpio@e6051000 {
133 compatible = "renesas,gpio-r8a77970",
134 "renesas,rcar-gen3-gpio";
135 reg = <0 0xe6051000 0 0x50>;
136 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
139 gpio-ranges = <&pfc 0 32 28>;
140 #interrupt-cells = <2>;
141 interrupt-controller;
142 clocks = <&cpg CPG_MOD 911>;
143 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
147 gpio2: gpio@e6052000 {
148 compatible = "renesas,gpio-r8a77970",
149 "renesas,rcar-gen3-gpio";
150 reg = <0 0xe6052000 0 0x50>;
151 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
154 gpio-ranges = <&pfc 0 64 17>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
157 clocks = <&cpg CPG_MOD 910>;
158 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
162 gpio3: gpio@e6053000 {
163 compatible = "renesas,gpio-r8a77970",
164 "renesas,rcar-gen3-gpio";
165 reg = <0 0xe6053000 0 0x50>;
166 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
169 gpio-ranges = <&pfc 0 96 17>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 clocks = <&cpg CPG_MOD 909>;
173 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
177 gpio4: gpio@e6054000 {
178 compatible = "renesas,gpio-r8a77970",
179 "renesas,rcar-gen3-gpio";
180 reg = <0 0xe6054000 0 0x50>;
181 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
184 gpio-ranges = <&pfc 0 128 6>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
187 clocks = <&cpg CPG_MOD 908>;
188 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
192 gpio5: gpio@e6055000 {
193 compatible = "renesas,gpio-r8a77970",
194 "renesas,rcar-gen3-gpio";
195 reg = <0 0xe6055000 0 0x50>;
196 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
199 gpio-ranges = <&pfc 0 160 15>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 clocks = <&cpg CPG_MOD 907>;
203 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
207 pfc: pin-controller@e6060000 {
208 compatible = "renesas,pfc-r8a77970";
209 reg = <0 0xe6060000 0 0x504>;
212 cmt0: timer@e60f0000 {
213 compatible = "renesas,r8a77970-cmt0",
214 "renesas,rcar-gen3-cmt0";
215 reg = <0 0xe60f0000 0 0x1004>;
216 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
217 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
218 clocks = <&cpg CPG_MOD 303>;
220 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
225 cmt1: timer@e6130000 {
226 compatible = "renesas,r8a77970-cmt1",
227 "renesas,rcar-gen3-cmt1";
228 reg = <0 0xe6130000 0 0x1004>;
229 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
232 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
234 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
237 clocks = <&cpg CPG_MOD 302>;
239 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
244 cmt2: timer@e6140000 {
245 compatible = "renesas,r8a77970-cmt1",
246 "renesas,rcar-gen3-cmt1";
247 reg = <0 0xe6140000 0 0x1004>;
248 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
249 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
251 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
256 clocks = <&cpg CPG_MOD 301>;
258 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
263 cmt3: timer@e6148000 {
264 compatible = "renesas,r8a77970-cmt1",
265 "renesas,rcar-gen3-cmt1";
266 reg = <0 0xe6148000 0 0x1004>;
267 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
268 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
273 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
274 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
275 clocks = <&cpg CPG_MOD 300>;
277 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
282 cpg: clock-controller@e6150000 {
283 compatible = "renesas,r8a77970-cpg-mssr";
284 reg = <0 0xe6150000 0 0x1000>;
285 clocks = <&extal_clk>, <&extalr_clk>;
286 clock-names = "extal", "extalr";
288 #power-domain-cells = <0>;
292 rst: reset-controller@e6160000 {
293 compatible = "renesas,r8a77970-rst";
294 reg = <0 0xe6160000 0 0x200>;
297 sysc: system-controller@e6180000 {
298 compatible = "renesas,r8a77970-sysc";
299 reg = <0 0xe6180000 0 0x440>;
300 #power-domain-cells = <1>;
303 intc_ex: interrupt-controller@e61c0000 {
304 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
305 #interrupt-cells = <2>;
306 interrupt-controller;
307 reg = <0 0xe61c0000 0 0x200>;
308 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&cpg CPG_MOD 407>;
315 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
320 compatible = "renesas,i2c-r8a77970",
321 "renesas,rcar-gen3-i2c";
322 reg = <0 0xe6500000 0 0x40>;
323 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
324 clocks = <&cpg CPG_MOD 931>;
325 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
327 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
328 <&dmac2 0x91>, <&dmac2 0x90>;
329 dma-names = "tx", "rx", "tx", "rx";
330 i2c-scl-internal-delay-ns = <6>;
331 #address-cells = <1>;
337 compatible = "renesas,i2c-r8a77970",
338 "renesas,rcar-gen3-i2c";
339 reg = <0 0xe6508000 0 0x40>;
340 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
341 clocks = <&cpg CPG_MOD 930>;
342 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
344 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
345 <&dmac2 0x93>, <&dmac2 0x92>;
346 dma-names = "tx", "rx", "tx", "rx";
347 i2c-scl-internal-delay-ns = <6>;
348 #address-cells = <1>;
354 compatible = "renesas,i2c-r8a77970",
355 "renesas,rcar-gen3-i2c";
356 reg = <0 0xe6510000 0 0x40>;
357 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
358 clocks = <&cpg CPG_MOD 929>;
359 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
361 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
362 <&dmac2 0x95>, <&dmac2 0x94>;
363 dma-names = "tx", "rx", "tx", "rx";
364 i2c-scl-internal-delay-ns = <6>;
365 #address-cells = <1>;
371 compatible = "renesas,i2c-r8a77970",
372 "renesas,rcar-gen3-i2c";
373 reg = <0 0xe66d0000 0 0x40>;
374 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
375 clocks = <&cpg CPG_MOD 928>;
376 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
378 dmas = <&dmac1 0x97>, <&dmac1 0x96>,
379 <&dmac2 0x97>, <&dmac2 0x96>;
380 dma-names = "tx", "rx", "tx", "rx";
381 i2c-scl-internal-delay-ns = <6>;
382 #address-cells = <1>;
388 compatible = "renesas,i2c-r8a77970",
389 "renesas,rcar-gen3-i2c";
390 reg = <0 0xe66d8000 0 0x40>;
391 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
392 clocks = <&cpg CPG_MOD 927>;
393 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
395 dmas = <&dmac1 0x99>, <&dmac1 0x98>,
396 <&dmac2 0x99>, <&dmac2 0x98>;
397 dma-names = "tx", "rx", "tx", "rx";
398 i2c-scl-internal-delay-ns = <6>;
399 #address-cells = <1>;
404 hscif0: serial@e6540000 {
405 compatible = "renesas,hscif-r8a77970",
406 "renesas,rcar-gen3-hscif",
408 reg = <0 0xe6540000 0 96>;
409 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
410 clocks = <&cpg CPG_MOD 520>,
411 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
413 clock-names = "fck", "brg_int", "scif_clk";
414 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
415 <&dmac2 0x31>, <&dmac2 0x30>;
416 dma-names = "tx", "rx", "tx", "rx";
417 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
422 hscif1: serial@e6550000 {
423 compatible = "renesas,hscif-r8a77970",
424 "renesas,rcar-gen3-hscif",
426 reg = <0 0xe6550000 0 96>;
427 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
428 clocks = <&cpg CPG_MOD 519>,
429 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
431 clock-names = "fck", "brg_int", "scif_clk";
432 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
433 <&dmac2 0x33>, <&dmac2 0x32>;
434 dma-names = "tx", "rx", "tx", "rx";
435 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
440 hscif2: serial@e6560000 {
441 compatible = "renesas,hscif-r8a77970",
442 "renesas,rcar-gen3-hscif",
444 reg = <0 0xe6560000 0 96>;
445 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&cpg CPG_MOD 518>,
447 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
449 clock-names = "fck", "brg_int", "scif_clk";
450 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
451 <&dmac2 0x35>, <&dmac2 0x34>;
452 dma-names = "tx", "rx", "tx", "rx";
453 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
458 hscif3: serial@e66a0000 {
459 compatible = "renesas,hscif-r8a77970",
460 "renesas,rcar-gen3-hscif", "renesas,hscif";
461 reg = <0 0xe66a0000 0 96>;
462 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&cpg CPG_MOD 517>,
464 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
466 clock-names = "fck", "brg_int", "scif_clk";
467 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
468 <&dmac2 0x37>, <&dmac2 0x36>;
469 dma-names = "tx", "rx", "tx", "rx";
470 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
475 canfd: can@e66c0000 {
476 compatible = "renesas,r8a77970-canfd",
477 "renesas,rcar-gen3-canfd";
478 reg = <0 0xe66c0000 0 0x8000>;
479 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&cpg CPG_MOD 914>,
482 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
484 clock-names = "fck", "canfd", "can_clk";
485 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
486 assigned-clock-rates = <40000000>;
487 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
500 avb: ethernet@e6800000 {
501 compatible = "renesas,etheravb-r8a77970",
502 "renesas,etheravb-rcar-gen3";
503 reg = <0 0xe6800000 0 0x800>;
504 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
505 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
506 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
507 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
511 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
512 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
513 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
514 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
515 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
516 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
517 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
518 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
519 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
520 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
521 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
522 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
523 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
529 interrupt-names = "ch0", "ch1", "ch2", "ch3",
530 "ch4", "ch5", "ch6", "ch7",
531 "ch8", "ch9", "ch10", "ch11",
532 "ch12", "ch13", "ch14", "ch15",
533 "ch16", "ch17", "ch18", "ch19",
534 "ch20", "ch21", "ch22", "ch23",
536 clocks = <&cpg CPG_MOD 812>;
537 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
540 iommus = <&ipmmu_rt 3>;
541 #address-cells = <1>;
546 scif0: serial@e6e60000 {
547 compatible = "renesas,scif-r8a77970",
548 "renesas,rcar-gen3-scif",
550 reg = <0 0xe6e60000 0 64>;
551 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&cpg CPG_MOD 207>,
553 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
555 clock-names = "fck", "brg_int", "scif_clk";
556 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
557 <&dmac2 0x51>, <&dmac2 0x50>;
558 dma-names = "tx", "rx", "tx", "rx";
559 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
564 scif1: serial@e6e68000 {
565 compatible = "renesas,scif-r8a77970",
566 "renesas,rcar-gen3-scif",
568 reg = <0 0xe6e68000 0 64>;
569 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&cpg CPG_MOD 206>,
571 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
573 clock-names = "fck", "brg_int", "scif_clk";
574 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
575 <&dmac2 0x53>, <&dmac2 0x52>;
576 dma-names = "tx", "rx", "tx", "rx";
577 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
582 scif3: serial@e6c50000 {
583 compatible = "renesas,scif-r8a77970",
584 "renesas,rcar-gen3-scif",
586 reg = <0 0xe6c50000 0 64>;
587 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&cpg CPG_MOD 204>,
589 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
591 clock-names = "fck", "brg_int", "scif_clk";
592 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
593 <&dmac2 0x57>, <&dmac2 0x56>;
594 dma-names = "tx", "rx", "tx", "rx";
595 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
600 scif4: serial@e6c40000 {
601 compatible = "renesas,scif-r8a77970",
602 "renesas,rcar-gen3-scif", "renesas,scif";
603 reg = <0 0xe6c40000 0 64>;
604 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
605 clocks = <&cpg CPG_MOD 203>,
606 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
608 clock-names = "fck", "brg_int", "scif_clk";
609 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
610 <&dmac2 0x59>, <&dmac2 0x58>;
611 dma-names = "tx", "rx", "tx", "rx";
612 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
618 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
619 reg = <0 0xe6e80000 0 0x148>;
620 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
621 clocks = <&cpg CPG_MOD 304>;
622 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
628 vin0: video@e6ef0000 {
629 compatible = "renesas,vin-r8a77970";
630 reg = <0 0xe6ef0000 0 0x1000>;
631 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
632 clocks = <&cpg CPG_MOD 811>;
633 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
639 #address-cells = <1>;
643 #address-cells = <1>;
648 vin0csi40: endpoint@2 {
650 remote-endpoint = <&csi40vin0>;
656 vin1: video@e6ef1000 {
657 compatible = "renesas,vin-r8a77970";
658 reg = <0 0xe6ef1000 0 0x1000>;
659 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&cpg CPG_MOD 810>;
661 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
667 #address-cells = <1>;
671 #address-cells = <1>;
676 vin1csi40: endpoint@2 {
678 remote-endpoint = <&csi40vin1>;
684 vin2: video@e6ef2000 {
685 compatible = "renesas,vin-r8a77970";
686 reg = <0 0xe6ef2000 0 0x1000>;
687 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
688 clocks = <&cpg CPG_MOD 809>;
689 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
695 #address-cells = <1>;
699 #address-cells = <1>;
704 vin2csi40: endpoint@2 {
706 remote-endpoint = <&csi40vin2>;
712 vin3: video@e6ef3000 {
713 compatible = "renesas,vin-r8a77970";
714 reg = <0 0xe6ef3000 0 0x1000>;
715 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&cpg CPG_MOD 808>;
717 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
723 #address-cells = <1>;
727 #address-cells = <1>;
732 vin3csi40: endpoint@2 {
734 remote-endpoint = <&csi40vin3>;
740 dmac1: dma-controller@e7300000 {
741 compatible = "renesas,dmac-r8a77970",
743 reg = <0 0xe7300000 0 0x10000>;
744 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
745 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
746 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
747 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
748 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
749 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
750 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
751 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
752 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
753 interrupt-names = "error",
754 "ch0", "ch1", "ch2", "ch3",
755 "ch4", "ch5", "ch6", "ch7";
756 clocks = <&cpg CPG_MOD 218>;
758 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
762 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
763 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
764 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
765 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
768 dmac2: dma-controller@e7310000 {
769 compatible = "renesas,dmac-r8a77970",
771 reg = <0 0xe7310000 0 0x10000>;
772 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
773 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
774 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
775 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
776 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
777 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
778 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
779 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
780 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
781 interrupt-names = "error",
782 "ch0", "ch1", "ch2", "ch3",
783 "ch4", "ch5", "ch6", "ch7";
784 clocks = <&cpg CPG_MOD 217>;
786 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
790 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
791 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
792 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
793 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
796 ipmmu_ds1: mmu@e7740000 {
797 compatible = "renesas,ipmmu-r8a77970";
798 reg = <0 0xe7740000 0 0x1000>;
799 renesas,ipmmu-main = <&ipmmu_mm 0>;
800 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
804 ipmmu_ir: mmu@ff8b0000 {
805 compatible = "renesas,ipmmu-r8a77970";
806 reg = <0 0xff8b0000 0 0x1000>;
807 renesas,ipmmu-main = <&ipmmu_mm 3>;
808 power-domains = <&sysc R8A77970_PD_A3IR>;
812 ipmmu_mm: mmu@e67b0000 {
813 compatible = "renesas,ipmmu-r8a77970";
814 reg = <0 0xe67b0000 0 0x1000>;
815 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
817 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
821 ipmmu_rt: mmu@ffc80000 {
822 compatible = "renesas,ipmmu-r8a77970";
823 reg = <0 0xffc80000 0 0x1000>;
824 renesas,ipmmu-main = <&ipmmu_mm 7>;
825 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
829 ipmmu_vi0: mmu@febd0000 {
830 compatible = "renesas,ipmmu-r8a77970";
831 reg = <0 0xfebd0000 0 0x1000>;
832 renesas,ipmmu-main = <&ipmmu_mm 9>;
833 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
838 compatible = "renesas,sdhi-r8a77970",
839 "renesas,rcar-gen3-sdhi";
840 reg = <0 0xee140000 0 0x2000>;
841 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&cpg CPG_MOD 314>;
843 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
845 max-frequency = <200000000>;
849 gic: interrupt-controller@f1010000 {
850 compatible = "arm,gic-400";
851 #interrupt-cells = <3>;
852 #address-cells = <0>;
853 interrupt-controller;
854 reg = <0 0xf1010000 0 0x1000>,
855 <0 0xf1020000 0 0x20000>,
856 <0 0xf1040000 0 0x20000>,
857 <0 0xf1060000 0 0x20000>;
858 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
859 IRQ_TYPE_LEVEL_HIGH)>;
860 clocks = <&cpg CPG_MOD 408>;
862 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
866 vspd0: vsp@fea20000 {
867 compatible = "renesas,vsp2";
868 reg = <0 0xfea20000 0 0x5000>;
869 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
870 clocks = <&cpg CPG_MOD 623>;
871 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
873 renesas,fcp = <&fcpvd0>;
876 fcpvd0: fcp@fea27000 {
877 compatible = "renesas,fcpv";
878 reg = <0 0xfea27000 0 0x200>;
879 clocks = <&cpg CPG_MOD 603>;
880 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
884 csi40: csi2@feaa0000 {
885 compatible = "renesas,r8a77970-csi2";
886 reg = <0 0xfeaa0000 0 0x10000>;
887 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
888 clocks = <&cpg CPG_MOD 716>;
889 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
894 #address-cells = <1>;
898 #address-cells = <1>;
903 csi40vin0: endpoint@0 {
905 remote-endpoint = <&vin0csi40>;
907 csi40vin1: endpoint@1 {
909 remote-endpoint = <&vin1csi40>;
911 csi40vin2: endpoint@2 {
913 remote-endpoint = <&vin2csi40>;
915 csi40vin3: endpoint@3 {
917 remote-endpoint = <&vin3csi40>;
923 du: display@feb00000 {
924 compatible = "renesas,du-r8a77970";
925 reg = <0 0xfeb00000 0 0x80000>;
926 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
927 clocks = <&cpg CPG_MOD 724>;
928 clock-names = "du.0";
929 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
935 #address-cells = <1>;
940 du_out_rgb: endpoint {
946 du_out_lvds0: endpoint {
947 remote-endpoint = <&lvds0_in>;
953 lvds0: lvds-encoder@feb90000 {
954 compatible = "renesas,r8a77970-lvds";
955 reg = <0 0xfeb90000 0 0x14>;
956 clocks = <&cpg CPG_MOD 727>;
957 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
962 #address-cells = <1>;
974 lvds0_out: endpoint {
980 prr: chipid@fff00044 {
981 compatible = "renesas,prr";
982 reg = <0 0xfff00044 0 4>;
987 compatible = "arm,armv8-timer";
988 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
989 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
990 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
991 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;