arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 /*
   2  * Device Tree Source for the r8a7796 SoC
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7796-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7796";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a53_0: cpu@100 {
  59                         compatible = "arm,cortex-a53", "arm,armv8";
  60                         reg = <0x100>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
  63                         next-level-cache = <&L2_CA53>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a53_1: cpu@101 {
  68                         compatible = "arm,cortex-a53","arm,armv8";
  69                         reg = <0x101>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
  72                         next-level-cache = <&L2_CA53>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_2: cpu@102 {
  77                         compatible = "arm,cortex-a53","arm,armv8";
  78                         reg = <0x102>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_3: cpu@103 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x103>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 L2_CA57: cache-controller-0 {
  95                         compatible = "cache";
  96                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
  97                         cache-unified;
  98                         cache-level = <2>;
  99                 };
 100
 101                 L2_CA53: cache-controller-1 {
 102                         compatible = "cache";
 103                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 104                         cache-unified;
 105                         cache-level = <2>;
 106                 };
 107         };
 108
 109         extal_clk: extal {
 110                 compatible = "fixed-clock";
 111                 #clock-cells = <0>;
 112                 /* This value must be overridden by the board */
 113                 clock-frequency = <0>;
 114         };
 115
 116         extalr_clk: extalr {
 117                 compatible = "fixed-clock";
 118                 #clock-cells = <0>;
 119                 /* This value must be overridden by the board */
 120                 clock-frequency = <0>;
 121         };
 122
 123         /*
 124          * The external audio clocks are configured as 0 Hz fixed frequency
 125          * clocks by default.
 126          * Boards that provide audio clocks should override them.
 127          */
 128         audio_clk_a: audio_clk_a {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <0>;
 132         };
 133
 134         audio_clk_b: audio_clk_b {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <0>;
 138         };
 139
 140         audio_clk_c: audio_clk_c {
 141                 compatible = "fixed-clock";
 142                 #clock-cells = <0>;
 143                 clock-frequency = <0>;
 144         };
 145
 146         /* External CAN clock - to be overridden by boards that provide it */
 147         can_clk: can {
 148                 compatible = "fixed-clock";
 149                 #clock-cells = <0>;
 150                 clock-frequency = <0>;
 151         };
 152
 153         /* External SCIF clock - to be overridden by boards that provide it */
 154         scif_clk: scif {
 155                 compatible = "fixed-clock";
 156                 #clock-cells = <0>;
 157                 clock-frequency = <0>;
 158         };
 159
 160         /* External PCIe clock - can be overridden by the board */
 161         pcie_bus_clk: pcie_bus {
 162                 compatible = "fixed-clock";
 163                 #clock-cells = <0>;
 164                 clock-frequency = <0>;
 165         };
 166
 167         soc {
 168                 compatible = "simple-bus";
 169                 interrupt-parent = <&gic>;
 170                 #address-cells = <2>;
 171                 #size-cells = <2>;
 172                 ranges;
 173
 174                 gic: interrupt-controller@f1010000 {
 175                         compatible = "arm,gic-400";
 176                         #interrupt-cells = <3>;
 177                         #address-cells = <0>;
 178                         interrupt-controller;
 179                         reg = <0x0 0xf1010000 0 0x1000>,
 180                               <0x0 0xf1020000 0 0x20000>,
 181                               <0x0 0xf1040000 0 0x20000>,
 182                               <0x0 0xf1060000 0 0x20000>;
 183                         interrupts = <GIC_PPI 9
 184                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
 185                         clocks = <&cpg CPG_MOD 408>;
 186                         clock-names = "clk";
 187                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 188                         resets = <&cpg 408>;
 189                 };
 190
 191                 timer {
 192                         compatible = "arm,armv8-timer";
 193                         interrupts = <GIC_PPI 13
 194                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 195                                      <GIC_PPI 14
 196                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 197                                      <GIC_PPI 11
 198                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 199                                      <GIC_PPI 10
 200                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 201                 };
 202
 203                 wdt0: watchdog@e6020000 {
 204                         compatible = "renesas,r8a7796-wdt",
 205                                      "renesas,rcar-gen3-wdt";
 206                         reg = <0 0xe6020000 0 0x0c>;
 207                         clocks = <&cpg CPG_MOD 402>;
 208                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 209                         resets = <&cpg 402>;
 210                         status = "disabled";
 211                 };
 212
 213                 gpio0: gpio@e6050000 {
 214                         compatible = "renesas,gpio-r8a7796",
 215                                      "renesas,gpio-rcar";
 216                         reg = <0 0xe6050000 0 0x50>;
 217                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 218                         #gpio-cells = <2>;
 219                         gpio-controller;
 220                         gpio-ranges = <&pfc 0 0 16>;
 221                         #interrupt-cells = <2>;
 222                         interrupt-controller;
 223                         clocks = <&cpg CPG_MOD 912>;
 224                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 225                         resets = <&cpg 912>;
 226                 };
 227
 228                 gpio1: gpio@e6051000 {
 229                         compatible = "renesas,gpio-r8a7796",
 230                                      "renesas,gpio-rcar";
 231                         reg = <0 0xe6051000 0 0x50>;
 232                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 233                         #gpio-cells = <2>;
 234                         gpio-controller;
 235                         gpio-ranges = <&pfc 0 32 29>;
 236                         #interrupt-cells = <2>;
 237                         interrupt-controller;
 238                         clocks = <&cpg CPG_MOD 911>;
 239                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 240                         resets = <&cpg 911>;
 241                 };
 242
 243                 gpio2: gpio@e6052000 {
 244                         compatible = "renesas,gpio-r8a7796",
 245                                      "renesas,gpio-rcar";
 246                         reg = <0 0xe6052000 0 0x50>;
 247                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 248                         #gpio-cells = <2>;
 249                         gpio-controller;
 250                         gpio-ranges = <&pfc 0 64 15>;
 251                         #interrupt-cells = <2>;
 252                         interrupt-controller;
 253                         clocks = <&cpg CPG_MOD 910>;
 254                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 255                         resets = <&cpg 910>;
 256                 };
 257
 258                 gpio3: gpio@e6053000 {
 259                         compatible = "renesas,gpio-r8a7796",
 260                                      "renesas,gpio-rcar";
 261                         reg = <0 0xe6053000 0 0x50>;
 262                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 263                         #gpio-cells = <2>;
 264                         gpio-controller;
 265                         gpio-ranges = <&pfc 0 96 16>;
 266                         #interrupt-cells = <2>;
 267                         interrupt-controller;
 268                         clocks = <&cpg CPG_MOD 909>;
 269                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 270                         resets = <&cpg 909>;
 271                 };
 272
 273                 gpio4: gpio@e6054000 {
 274                         compatible = "renesas,gpio-r8a7796",
 275                                      "renesas,gpio-rcar";
 276                         reg = <0 0xe6054000 0 0x50>;
 277                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 278                         #gpio-cells = <2>;
 279                         gpio-controller;
 280                         gpio-ranges = <&pfc 0 128 18>;
 281                         #interrupt-cells = <2>;
 282                         interrupt-controller;
 283                         clocks = <&cpg CPG_MOD 908>;
 284                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 285                         resets = <&cpg 908>;
 286                 };
 287
 288                 gpio5: gpio@e6055000 {
 289                         compatible = "renesas,gpio-r8a7796",
 290                                      "renesas,gpio-rcar";
 291                         reg = <0 0xe6055000 0 0x50>;
 292                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 293                         #gpio-cells = <2>;
 294                         gpio-controller;
 295                         gpio-ranges = <&pfc 0 160 26>;
 296                         #interrupt-cells = <2>;
 297                         interrupt-controller;
 298                         clocks = <&cpg CPG_MOD 907>;
 299                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 300                         resets = <&cpg 907>;
 301                 };
 302
 303                 gpio6: gpio@e6055400 {
 304                         compatible = "renesas,gpio-r8a7796",
 305                                      "renesas,gpio-rcar";
 306                         reg = <0 0xe6055400 0 0x50>;
 307                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 308                         #gpio-cells = <2>;
 309                         gpio-controller;
 310                         gpio-ranges = <&pfc 0 192 32>;
 311                         #interrupt-cells = <2>;
 312                         interrupt-controller;
 313                         clocks = <&cpg CPG_MOD 906>;
 314                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 315                         resets = <&cpg 906>;
 316                 };
 317
 318                 gpio7: gpio@e6055800 {
 319                         compatible = "renesas,gpio-r8a7796",
 320                                      "renesas,gpio-rcar";
 321                         reg = <0 0xe6055800 0 0x50>;
 322                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 323                         #gpio-cells = <2>;
 324                         gpio-controller;
 325                         gpio-ranges = <&pfc 0 224 4>;
 326                         #interrupt-cells = <2>;
 327                         interrupt-controller;
 328                         clocks = <&cpg CPG_MOD 905>;
 329                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 330                         resets = <&cpg 905>;
 331                 };
 332
 333                 pfc: pin-controller@e6060000 {
 334                         compatible = "renesas,pfc-r8a7796";
 335                         reg = <0 0xe6060000 0 0x50c>;
 336                 };
 337
 338                 pmu_a57 {
 339                         compatible = "arm,cortex-a57-pmu";
 340                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 341                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 342                         interrupt-affinity = <&a57_0>,
 343                                              <&a57_1>;
 344                 };
 345
 346                 pmu_a53 {
 347                         compatible = "arm,cortex-a53-pmu";
 348                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 350                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 351                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 352                         interrupt-affinity = <&a53_0>,
 353                                              <&a53_1>,
 354                                              <&a53_2>,
 355                                              <&a53_3>;
 356                 };
 357
 358                 cpg: clock-controller@e6150000 {
 359                         compatible = "renesas,r8a7796-cpg-mssr";
 360                         reg = <0 0xe6150000 0 0x1000>;
 361                         clocks = <&extal_clk>, <&extalr_clk>;
 362                         clock-names = "extal", "extalr";
 363                         #clock-cells = <2>;
 364                         #power-domain-cells = <0>;
 365                         #reset-cells = <1>;
 366                 };
 367
 368                 rst: reset-controller@e6160000 {
 369                         compatible = "renesas,r8a7796-rst";
 370                         reg = <0 0xe6160000 0 0x0200>;
 371                 };
 372
 373                 prr: chipid@fff00044 {
 374                         compatible = "renesas,prr";
 375                         reg = <0 0xfff00044 0 4>;
 376                 };
 377
 378                 sysc: system-controller@e6180000 {
 379                         compatible = "renesas,r8a7796-sysc";
 380                         reg = <0 0xe6180000 0 0x0400>;
 381                         #power-domain-cells = <1>;
 382                 };
 383
 384                 i2c_dvfs: i2c@e60b0000 {
 385                         #address-cells = <1>;
 386                         #size-cells = <0>;
 387                         compatible = "renesas,iic-r8a7796",
 388                                      "renesas,rcar-gen3-iic",
 389                                      "renesas,rmobile-iic";
 390                         reg = <0 0xe60b0000 0 0x425>;
 391                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 392                         clocks = <&cpg CPG_MOD 926>;
 393                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 394                         resets = <&cpg 926>;
 395                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 396                         dma-names = "tx", "rx";
 397                         status = "disabled";
 398                 };
 399
 400                 pwm0: pwm@e6e30000 {
 401                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 402                         reg = <0 0xe6e30000 0 8>;
 403                         #pwm-cells = <2>;
 404                         clocks = <&cpg CPG_MOD 523>;
 405                         resets = <&cpg 523>;
 406                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 407                         status = "disabled";
 408                 };
 409
 410                 pwm1: pwm@e6e31000 {
 411                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 412                         reg = <0 0xe6e31000 0 8>;
 413                         #pwm-cells = <2>;
 414                         clocks = <&cpg CPG_MOD 523>;
 415                         resets = <&cpg 523>;
 416                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 417                         status = "disabled";
 418                 };
 419
 420                 pwm2: pwm@e6e32000 {
 421                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 422                         reg = <0 0xe6e32000 0 8>;
 423                         #pwm-cells = <2>;
 424                         clocks = <&cpg CPG_MOD 523>;
 425                         resets = <&cpg 523>;
 426                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 427                         status = "disabled";
 428                 };
 429
 430                 pwm3: pwm@e6e33000 {
 431                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 432                         reg = <0 0xe6e33000 0 8>;
 433                         #pwm-cells = <2>;
 434                         clocks = <&cpg CPG_MOD 523>;
 435                         resets = <&cpg 523>;
 436                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 437                         status = "disabled";
 438                 };
 439
 440                 pwm4: pwm@e6e34000 {
 441                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 442                         reg = <0 0xe6e34000 0 8>;
 443                         #pwm-cells = <2>;
 444                         clocks = <&cpg CPG_MOD 523>;
 445                         resets = <&cpg 523>;
 446                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 447                         status = "disabled";
 448                 };
 449
 450                 pwm5: pwm@e6e35000 {
 451                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 452                         reg = <0 0xe6e35000 0 8>;
 453                         #pwm-cells = <2>;
 454                         clocks = <&cpg CPG_MOD 523>;
 455                         resets = <&cpg 523>;
 456                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 457                         status = "disabled";
 458                 };
 459
 460                 pwm6: pwm@e6e36000 {
 461                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 462                         reg = <0 0xe6e36000 0 8>;
 463                         #pwm-cells = <2>;
 464                         clocks = <&cpg CPG_MOD 523>;
 465                         resets = <&cpg 523>;
 466                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 467                         status = "disabled";
 468                 };
 469
 470                 i2c0: i2c@e6500000 {
 471                         #address-cells = <1>;
 472                         #size-cells = <0>;
 473                         compatible = "renesas,i2c-r8a7796",
 474                                      "renesas,rcar-gen3-i2c";
 475                         reg = <0 0xe6500000 0 0x40>;
 476                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 477                         clocks = <&cpg CPG_MOD 931>;
 478                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 479                         resets = <&cpg 931>;
 480                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 481                                <&dmac2 0x91>, <&dmac2 0x90>;
 482                         dma-names = "tx", "rx", "tx", "rx";
 483                         i2c-scl-internal-delay-ns = <110>;
 484                         status = "disabled";
 485                 };
 486
 487                 i2c1: i2c@e6508000 {
 488                         #address-cells = <1>;
 489                         #size-cells = <0>;
 490                         compatible = "renesas,i2c-r8a7796",
 491                                      "renesas,rcar-gen3-i2c";
 492                         reg = <0 0xe6508000 0 0x40>;
 493                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 494                         clocks = <&cpg CPG_MOD 930>;
 495                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 496                         resets = <&cpg 930>;
 497                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 498                                <&dmac2 0x93>, <&dmac2 0x92>;
 499                         dma-names = "tx", "rx", "tx", "rx";
 500                         i2c-scl-internal-delay-ns = <6>;
 501                         status = "disabled";
 502                 };
 503
 504                 i2c2: i2c@e6510000 {
 505                         #address-cells = <1>;
 506                         #size-cells = <0>;
 507                         compatible = "renesas,i2c-r8a7796",
 508                                      "renesas,rcar-gen3-i2c";
 509                         reg = <0 0xe6510000 0 0x40>;
 510                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 511                         clocks = <&cpg CPG_MOD 929>;
 512                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 513                         resets = <&cpg 929>;
 514                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 515                                <&dmac2 0x95>, <&dmac2 0x94>;
 516                         dma-names = "tx", "rx", "tx", "rx";
 517                         i2c-scl-internal-delay-ns = <6>;
 518                         status = "disabled";
 519                 };
 520
 521                 i2c3: i2c@e66d0000 {
 522                         #address-cells = <1>;
 523                         #size-cells = <0>;
 524                         compatible = "renesas,i2c-r8a7796",
 525                                      "renesas,rcar-gen3-i2c";
 526                         reg = <0 0xe66d0000 0 0x40>;
 527                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 528                         clocks = <&cpg CPG_MOD 928>;
 529                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 530                         resets = <&cpg 928>;
 531                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 532                         dma-names = "tx", "rx";
 533                         i2c-scl-internal-delay-ns = <110>;
 534                         status = "disabled";
 535                 };
 536
 537                 i2c4: i2c@e66d8000 {
 538                         #address-cells = <1>;
 539                         #size-cells = <0>;
 540                         compatible = "renesas,i2c-r8a7796",
 541                                      "renesas,rcar-gen3-i2c";
 542                         reg = <0 0xe66d8000 0 0x40>;
 543                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 544                         clocks = <&cpg CPG_MOD 927>;
 545                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 546                         resets = <&cpg 927>;
 547                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 548                         dma-names = "tx", "rx";
 549                         i2c-scl-internal-delay-ns = <110>;
 550                         status = "disabled";
 551                 };
 552
 553                 i2c5: i2c@e66e0000 {
 554                         #address-cells = <1>;
 555                         #size-cells = <0>;
 556                         compatible = "renesas,i2c-r8a7796",
 557                                      "renesas,rcar-gen3-i2c";
 558                         reg = <0 0xe66e0000 0 0x40>;
 559                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 560                         clocks = <&cpg CPG_MOD 919>;
 561                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 562                         resets = <&cpg 919>;
 563                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 564                         dma-names = "tx", "rx";
 565                         i2c-scl-internal-delay-ns = <110>;
 566                         status = "disabled";
 567                 };
 568
 569                 i2c6: i2c@e66e8000 {
 570                         #address-cells = <1>;
 571                         #size-cells = <0>;
 572                         compatible = "renesas,i2c-r8a7796",
 573                                      "renesas,rcar-gen3-i2c";
 574                         reg = <0 0xe66e8000 0 0x40>;
 575                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 576                         clocks = <&cpg CPG_MOD 918>;
 577                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 578                         resets = <&cpg 918>;
 579                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 580                         dma-names = "tx", "rx";
 581                         i2c-scl-internal-delay-ns = <6>;
 582                         status = "disabled";
 583                 };
 584
 585                 can0: can@e6c30000 {
 586                         compatible = "renesas,can-r8a7796",
 587                                      "renesas,rcar-gen3-can";
 588                         reg = <0 0xe6c30000 0 0x1000>;
 589                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 590                         clocks = <&cpg CPG_MOD 916>,
 591                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 592                                <&can_clk>;
 593                         clock-names = "clkp1", "clkp2", "can_clk";
 594                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 595                         assigned-clock-rates = <40000000>;
 596                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 597                         resets = <&cpg 916>;
 598                         status = "disabled";
 599                 };
 600
 601                 can1: can@e6c38000 {
 602                         compatible = "renesas,can-r8a7796",
 603                                      "renesas,rcar-gen3-can";
 604                         reg = <0 0xe6c38000 0 0x1000>;
 605                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 606                         clocks = <&cpg CPG_MOD 915>,
 607                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 608                                <&can_clk>;
 609                         clock-names = "clkp1", "clkp2", "can_clk";
 610                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 611                         assigned-clock-rates = <40000000>;
 612                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 613                         resets = <&cpg 915>;
 614                         status = "disabled";
 615                 };
 616
 617                 canfd: can@e66c0000 {
 618                         compatible = "renesas,r8a7796-canfd",
 619                                      "renesas,rcar-gen3-canfd";
 620                         reg = <0 0xe66c0000 0 0x8000>;
 621                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 622                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 914>,
 624                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 625                                <&can_clk>;
 626                         clock-names = "fck", "canfd", "can_clk";
 627                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 628                         assigned-clock-rates = <40000000>;
 629                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 630                         resets = <&cpg 914>;
 631                         status = "disabled";
 632
 633                         channel0 {
 634                                 status = "disabled";
 635                         };
 636
 637                         channel1 {
 638                                 status = "disabled";
 639                         };
 640                 };
 641
 642                 avb: ethernet@e6800000 {
 643                         compatible = "renesas,etheravb-r8a7796",
 644                                      "renesas,etheravb-rcar-gen3";
 645                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 646                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 653                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 654                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 655                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 656                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 657                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 658                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 659                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 660                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 661                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 662                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 663                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 664                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 665                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 666                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 667                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 668                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 669                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 670                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 671                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 672                                           "ch4", "ch5", "ch6", "ch7",
 673                                           "ch8", "ch9", "ch10", "ch11",
 674                                           "ch12", "ch13", "ch14", "ch15",
 675                                           "ch16", "ch17", "ch18", "ch19",
 676                                           "ch20", "ch21", "ch22", "ch23",
 677                                           "ch24";
 678                         clocks = <&cpg CPG_MOD 812>;
 679                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 680                         resets = <&cpg 812>;
 681                         phy-mode = "rgmii-txid";
 682                         #address-cells = <1>;
 683                         #size-cells = <0>;
 684                         status = "disabled";
 685                 };
 686
 687                 hscif0: serial@e6540000 {
 688                         compatible = "renesas,hscif-r8a7796",
 689                                      "renesas,rcar-gen3-hscif",
 690                                      "renesas,hscif";
 691                         reg = <0 0xe6540000 0 0x60>;
 692                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 693                         clocks = <&cpg CPG_MOD 520>,
 694                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 695                                  <&scif_clk>;
 696                         clock-names = "fck", "brg_int", "scif_clk";
 697                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 698                                <&dmac2 0x31>, <&dmac2 0x30>;
 699                         dma-names = "tx", "rx", "tx", "rx";
 700                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 701                         resets = <&cpg 520>;
 702                         status = "disabled";
 703                 };
 704
 705                 hscif1: serial@e6550000 {
 706                         compatible = "renesas,hscif-r8a7796",
 707                                      "renesas,rcar-gen3-hscif",
 708                                      "renesas,hscif";
 709                         reg = <0 0xe6550000 0 0x60>;
 710                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 711                         clocks = <&cpg CPG_MOD 519>,
 712                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 713                                  <&scif_clk>;
 714                         clock-names = "fck", "brg_int", "scif_clk";
 715                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 716                                <&dmac2 0x33>, <&dmac2 0x32>;
 717                         dma-names = "tx", "rx", "tx", "rx";
 718                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 719                         resets = <&cpg 519>;
 720                         status = "disabled";
 721                 };
 722
 723                 hscif2: serial@e6560000 {
 724                         compatible = "renesas,hscif-r8a7796",
 725                                      "renesas,rcar-gen3-hscif",
 726                                      "renesas,hscif";
 727                         reg = <0 0xe6560000 0 0x60>;
 728                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 729                         clocks = <&cpg CPG_MOD 518>,
 730                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 731                                  <&scif_clk>;
 732                         clock-names = "fck", "brg_int", "scif_clk";
 733                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 734                                <&dmac2 0x35>, <&dmac2 0x34>;
 735                         dma-names = "tx", "rx", "tx", "rx";
 736                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 737                         resets = <&cpg 518>;
 738                         status = "disabled";
 739                 };
 740
 741                 hscif3: serial@e66a0000 {
 742                         compatible = "renesas,hscif-r8a7796",
 743                                      "renesas,rcar-gen3-hscif",
 744                                      "renesas,hscif";
 745                         reg = <0 0xe66a0000 0 0x60>;
 746                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 747                         clocks = <&cpg CPG_MOD 517>,
 748                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 749                                  <&scif_clk>;
 750                         clock-names = "fck", "brg_int", "scif_clk";
 751                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 752                         dma-names = "tx", "rx";
 753                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 754                         resets = <&cpg 517>;
 755                         status = "disabled";
 756                 };
 757
 758                 hscif4: serial@e66b0000 {
 759                         compatible = "renesas,hscif-r8a7796",
 760                                      "renesas,rcar-gen3-hscif",
 761                                      "renesas,hscif";
 762                         reg = <0 0xe66b0000 0 0x60>;
 763                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 764                         clocks = <&cpg CPG_MOD 516>,
 765                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 766                                  <&scif_clk>;
 767                         clock-names = "fck", "brg_int", "scif_clk";
 768                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 769                         dma-names = "tx", "rx";
 770                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 771                         resets = <&cpg 516>;
 772                         status = "disabled";
 773                 };
 774
 775                 scif0: serial@e6e60000 {
 776                         compatible = "renesas,scif-r8a7796",
 777                                      "renesas,rcar-gen3-scif", "renesas,scif";
 778                         reg = <0 0xe6e60000 0 64>;
 779                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 207>,
 781                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 782                                  <&scif_clk>;
 783                         clock-names = "fck", "brg_int", "scif_clk";
 784                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 785                                <&dmac2 0x51>, <&dmac2 0x50>;
 786                         dma-names = "tx", "rx", "tx", "rx";
 787                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 788                         resets = <&cpg 207>;
 789                         status = "disabled";
 790                 };
 791
 792                 scif1: serial@e6e68000 {
 793                         compatible = "renesas,scif-r8a7796",
 794                                      "renesas,rcar-gen3-scif", "renesas,scif";
 795                         reg = <0 0xe6e68000 0 64>;
 796                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 797                         clocks = <&cpg CPG_MOD 206>,
 798                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 799                                  <&scif_clk>;
 800                         clock-names = "fck", "brg_int", "scif_clk";
 801                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 802                                <&dmac2 0x53>, <&dmac2 0x52>;
 803                         dma-names = "tx", "rx", "tx", "rx";
 804                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 805                         resets = <&cpg 206>;
 806                         status = "disabled";
 807                 };
 808
 809                 scif2: serial@e6e88000 {
 810                         compatible = "renesas,scif-r8a7796",
 811                                      "renesas,rcar-gen3-scif", "renesas,scif";
 812                         reg = <0 0xe6e88000 0 64>;
 813                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 814                         clocks = <&cpg CPG_MOD 310>,
 815                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 816                                  <&scif_clk>;
 817                         clock-names = "fck", "brg_int", "scif_clk";
 818                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 819                         resets = <&cpg 310>;
 820                         status = "disabled";
 821                 };
 822
 823                 scif3: serial@e6c50000 {
 824                         compatible = "renesas,scif-r8a7796",
 825                                      "renesas,rcar-gen3-scif", "renesas,scif";
 826                         reg = <0 0xe6c50000 0 64>;
 827                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 828                         clocks = <&cpg CPG_MOD 204>,
 829                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 830                                  <&scif_clk>;
 831                         clock-names = "fck", "brg_int", "scif_clk";
 832                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 833                         dma-names = "tx", "rx";
 834                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 835                         resets = <&cpg 204>;
 836                         status = "disabled";
 837                 };
 838
 839                 scif4: serial@e6c40000 {
 840                         compatible = "renesas,scif-r8a7796",
 841                                      "renesas,rcar-gen3-scif", "renesas,scif";
 842                         reg = <0 0xe6c40000 0 64>;
 843                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 844                         clocks = <&cpg CPG_MOD 203>,
 845                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 846                                  <&scif_clk>;
 847                         clock-names = "fck", "brg_int", "scif_clk";
 848                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 849                         dma-names = "tx", "rx";
 850                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 851                         resets = <&cpg 203>;
 852                         status = "disabled";
 853                 };
 854
 855                 scif5: serial@e6f30000 {
 856                         compatible = "renesas,scif-r8a7796",
 857                                      "renesas,rcar-gen3-scif", "renesas,scif";
 858                         reg = <0 0xe6f30000 0 64>;
 859                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 860                         clocks = <&cpg CPG_MOD 202>,
 861                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 862                                  <&scif_clk>;
 863                         clock-names = "fck", "brg_int", "scif_clk";
 864                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
 865                                <&dmac2 0x5b>, <&dmac2 0x5a>;
 866                         dma-names = "tx", "rx", "tx", "rx";
 867                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 868                         resets = <&cpg 202>;
 869                         status = "disabled";
 870                 };
 871
 872                 msiof0: spi@e6e90000 {
 873                         compatible = "renesas,msiof-r8a7796",
 874                                      "renesas,rcar-gen3-msiof";
 875                         reg = <0 0xe6e90000 0 0x0064>;
 876                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 877                         clocks = <&cpg CPG_MOD 211>;
 878                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 879                                <&dmac2 0x41>, <&dmac2 0x40>;
 880                         dma-names = "tx", "rx";
 881                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 882                         resets = <&cpg 211>;
 883                         #address-cells = <1>;
 884                         #size-cells = <0>;
 885                         status = "disabled";
 886                 };
 887
 888                 msiof1: spi@e6ea0000 {
 889                         compatible = "renesas,msiof-r8a7796",
 890                                      "renesas,rcar-gen3-msiof";
 891                         reg = <0 0xe6ea0000 0 0x0064>;
 892                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 893                         clocks = <&cpg CPG_MOD 210>;
 894                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 895                                <&dmac2 0x43>, <&dmac2 0x42>;
 896                         dma-names = "tx", "rx";
 897                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 898                         resets = <&cpg 210>;
 899                         #address-cells = <1>;
 900                         #size-cells = <0>;
 901                         status = "disabled";
 902                 };
 903
 904                 msiof2: spi@e6c00000 {
 905                         compatible = "renesas,msiof-r8a7796",
 906                                      "renesas,rcar-gen3-msiof";
 907                         reg = <0 0xe6c00000 0 0x0064>;
 908                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 909                         clocks = <&cpg CPG_MOD 209>;
 910                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
 911                         dma-names = "tx", "rx";
 912                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 913                         resets = <&cpg 209>;
 914                         #address-cells = <1>;
 915                         #size-cells = <0>;
 916                         status = "disabled";
 917                 };
 918
 919                 msiof3: spi@e6c10000 {
 920                         compatible = "renesas,msiof-r8a7796",
 921                                      "renesas,rcar-gen3-msiof";
 922                         reg = <0 0xe6c10000 0 0x0064>;
 923                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 924                         clocks = <&cpg CPG_MOD 208>;
 925                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
 926                         dma-names = "tx", "rx";
 927                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 928                         resets = <&cpg 208>;
 929                         #address-cells = <1>;
 930                         #size-cells = <0>;
 931                         status = "disabled";
 932                 };
 933
 934                 dmac0: dma-controller@e6700000 {
 935                         compatible = "renesas,dmac-r8a7796",
 936                                      "renesas,rcar-dmac";
 937                         reg = <0 0xe6700000 0 0x10000>;
 938                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 939                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 940                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 941                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 942                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 943                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 944                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 945                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 946                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 947                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 948                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 949                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 950                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 951                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 952                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 953                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 954                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 955                         interrupt-names = "error",
 956                                         "ch0", "ch1", "ch2", "ch3",
 957                                         "ch4", "ch5", "ch6", "ch7",
 958                                         "ch8", "ch9", "ch10", "ch11",
 959                                         "ch12", "ch13", "ch14", "ch15";
 960                         clocks = <&cpg CPG_MOD 219>;
 961                         clock-names = "fck";
 962                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 963                         resets = <&cpg 219>;
 964                         #dma-cells = <1>;
 965                         dma-channels = <16>;
 966                 };
 967
 968                 dmac1: dma-controller@e7300000 {
 969                         compatible = "renesas,dmac-r8a7796",
 970                                      "renesas,rcar-dmac";
 971                         reg = <0 0xe7300000 0 0x10000>;
 972                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 973                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 974                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 975                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 976                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 977                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 978                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 979                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 980                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 981                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 982                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 983                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 984                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 985                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 986                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 987                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 988                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 989                         interrupt-names = "error",
 990                                         "ch0", "ch1", "ch2", "ch3",
 991                                         "ch4", "ch5", "ch6", "ch7",
 992                                         "ch8", "ch9", "ch10", "ch11",
 993                                         "ch12", "ch13", "ch14", "ch15";
 994                         clocks = <&cpg CPG_MOD 218>;
 995                         clock-names = "fck";
 996                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 997                         resets = <&cpg 218>;
 998                         #dma-cells = <1>;
 999                         dma-channels = <16>;
1000                 };
1001
1002                 dmac2: dma-controller@e7310000 {
1003                         compatible = "renesas,dmac-r8a7796",
1004                                      "renesas,rcar-dmac";
1005                         reg = <0 0xe7310000 0 0x10000>;
1006                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1007                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1008                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1009                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1010                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1011                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1012                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1013                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1014                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1015                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1016                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1017                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1018                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1019                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1020                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1021                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1022                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1023                         interrupt-names = "error",
1024                                         "ch0", "ch1", "ch2", "ch3",
1025                                         "ch4", "ch5", "ch6", "ch7",
1026                                         "ch8", "ch9", "ch10", "ch11",
1027                                         "ch12", "ch13", "ch14", "ch15";
1028                         clocks = <&cpg CPG_MOD 217>;
1029                         clock-names = "fck";
1030                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1031                         resets = <&cpg 217>;
1032                         #dma-cells = <1>;
1033                         dma-channels = <16>;
1034                 };
1035
1036                 audma0: dma-controller@ec700000 {
1037                         compatible = "renesas,dmac-r8a7796",
1038                                      "renesas,rcar-dmac";
1039                         reg = <0 0xec700000 0 0x10000>;
1040                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1041                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1042                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1043                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1044                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1045                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1046                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1047                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1048                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1049                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1050                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1051                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1052                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1053                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1054                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1055                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1056                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1057                         interrupt-names = "error",
1058                                         "ch0", "ch1", "ch2", "ch3",
1059                                         "ch4", "ch5", "ch6", "ch7",
1060                                         "ch8", "ch9", "ch10", "ch11",
1061                                         "ch12", "ch13", "ch14", "ch15";
1062                         clocks = <&cpg CPG_MOD 502>;
1063                         clock-names = "fck";
1064                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1065                         resets = <&cpg 502>;
1066                         #dma-cells = <1>;
1067                         dma-channels = <16>;
1068                 };
1069
1070                 audma1: dma-controller@ec720000 {
1071                         compatible = "renesas,dmac-r8a7796",
1072                                      "renesas,rcar-dmac";
1073                         reg = <0 0xec720000 0 0x10000>;
1074                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1075                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1076                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1077                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1078                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1079                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1080                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1081                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1082                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1083                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1084                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1085                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1086                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1087                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1088                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1089                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1090                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1091                         interrupt-names = "error",
1092                                         "ch0", "ch1", "ch2", "ch3",
1093                                         "ch4", "ch5", "ch6", "ch7",
1094                                         "ch8", "ch9", "ch10", "ch11",
1095                                         "ch12", "ch13", "ch14", "ch15";
1096                         clocks = <&cpg CPG_MOD 501>;
1097                         clock-names = "fck";
1098                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1099                         resets = <&cpg 501>;
1100                         #dma-cells = <1>;
1101                         dma-channels = <16>;
1102                 };
1103
1104                 hsusb: usb@e6590000 {
1105                         /* placeholder */
1106                 };
1107
1108                 xhci0: usb@ee000000 {
1109                         /* placeholder */
1110                 };
1111
1112                 ohci0: usb@ee080000 {
1113                         /* placeholder */
1114                 };
1115
1116                 ehci0: usb@ee080100 {
1117                         /* placeholder */
1118                 };
1119
1120                 usb2_phy0: usb-phy@ee080200 {
1121                         /* placeholder */
1122                 };
1123
1124                 ohci1: usb@ee0a0000 {
1125                         /* placeholder */
1126                 };
1127
1128                 ehci1: usb@ee0a0100 {
1129                         /* placeholder */
1130                 };
1131
1132                 usb2_phy1: usb-phy@ee0a0200 {
1133                         /* placeholder */
1134                 };
1135
1136                 sdhi0: sd@ee100000 {
1137                         compatible = "renesas,sdhi-r8a7796";
1138                         reg = <0 0xee100000 0 0x2000>;
1139                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1140                         clocks = <&cpg CPG_MOD 314>;
1141                         max-frequency = <200000000>;
1142                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1143                         resets = <&cpg 314>;
1144                         status = "disabled";
1145                 };
1146
1147                 sdhi1: sd@ee120000 {
1148                         compatible = "renesas,sdhi-r8a7796";
1149                         reg = <0 0xee120000 0 0x2000>;
1150                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1151                         clocks = <&cpg CPG_MOD 313>;
1152                         max-frequency = <200000000>;
1153                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1154                         resets = <&cpg 313>;
1155                         status = "disabled";
1156                 };
1157
1158                 sdhi2: sd@ee140000 {
1159                         compatible = "renesas,sdhi-r8a7796";
1160                         reg = <0 0xee140000 0 0x2000>;
1161                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1162                         clocks = <&cpg CPG_MOD 312>;
1163                         max-frequency = <200000000>;
1164                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1165                         resets = <&cpg 312>;
1166                         status = "disabled";
1167                 };
1168
1169                 sdhi3: sd@ee160000 {
1170                         compatible = "renesas,sdhi-r8a7796";
1171                         reg = <0 0xee160000 0 0x2000>;
1172                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1173                         clocks = <&cpg CPG_MOD 311>;
1174                         max-frequency = <200000000>;
1175                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1176                         resets = <&cpg 311>;
1177                         status = "disabled";
1178                 };
1179
1180                 tsc: thermal@e6198000 {
1181                         compatible = "renesas,r8a7796-thermal";
1182                         reg = <0 0xe6198000 0 0x68>,
1183                               <0 0xe61a0000 0 0x5c>,
1184                               <0 0xe61a8000 0 0x5c>;
1185                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1186                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1187                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1188                         clocks = <&cpg CPG_MOD 522>;
1189                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1190                         resets = <&cpg 522>;
1191                         #thermal-sensor-cells = <1>;
1192                         status = "okay";
1193                 };
1194
1195                 thermal-zones {
1196                         sensor_thermal1: sensor-thermal1 {
1197                                 polling-delay-passive = <250>;
1198                                 polling-delay = <1000>;
1199                                 thermal-sensors = <&tsc 0>;
1200
1201                                 trips {
1202                                         sensor1_crit: sensor1-crit {
1203                                                 temperature = <120000>;
1204                                                 hysteresis = <2000>;
1205                                                 type = "critical";
1206                                         };
1207                                 };
1208                         };
1209
1210                         sensor_thermal2: sensor-thermal2 {
1211                                 polling-delay-passive = <250>;
1212                                 polling-delay = <1000>;
1213                                 thermal-sensors = <&tsc 1>;
1214
1215                                 trips {
1216                                         sensor2_crit: sensor2-crit {
1217                                                 temperature = <120000>;
1218                                                 hysteresis = <2000>;
1219                                                 type = "critical";
1220                                         };
1221                                 };
1222                         };
1223
1224                         sensor_thermal3: sensor-thermal3 {
1225                                 polling-delay-passive = <250>;
1226                                 polling-delay = <1000>;
1227                                 thermal-sensors = <&tsc 2>;
1228
1229                                 trips {
1230                                         sensor3_crit: sensor3-crit {
1231                                                 temperature = <120000>;
1232                                                 hysteresis = <2000>;
1233                                                 type = "critical";
1234                                         };
1235                                 };
1236                         };
1237                 };
1238
1239                 rcar_sound: sound@ec500000 {
1240                         /*
1241                          * #sound-dai-cells is required
1242                          *
1243                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1244                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1245                          */
1246                         /*
1247                          * #clock-cells is required for audio_clkout0/1/2/3
1248                          *
1249                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1250                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1251                          */
1252                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1253                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1254                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1255                                 <0 0xec540000 0 0x1000>, /* SSIU */
1256                                 <0 0xec541000 0 0x280>,  /* SSI */
1257                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1258                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1259
1260                         clocks = <&cpg CPG_MOD 1005>,
1261                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1262                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1263                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1264                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1265                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1266                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1267                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1268                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1269                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1270                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1271                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1272                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1273                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1274                                  <&audio_clk_a>, <&audio_clk_b>,
1275                                  <&audio_clk_c>,
1276                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1277                         clock-names = "ssi-all",
1278                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1279                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1280                                       "ssi.1", "ssi.0",
1281                                       "src.9", "src.8", "src.7", "src.6",
1282                                       "src.5", "src.4", "src.3", "src.2",
1283                                       "src.1", "src.0",
1284                                       "mix.1", "mix.0",
1285                                       "ctu.1", "ctu.0",
1286                                       "dvc.0", "dvc.1",
1287                                       "clk_a", "clk_b", "clk_c", "clk_i";
1288                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1289                         resets = <&cpg 1005>,
1290                                  <&cpg 1006>, <&cpg 1007>,
1291                                  <&cpg 1008>, <&cpg 1009>,
1292                                  <&cpg 1010>, <&cpg 1011>,
1293                                  <&cpg 1012>, <&cpg 1013>,
1294                                  <&cpg 1014>, <&cpg 1015>;
1295                         reset-names = "ssi-all",
1296                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1297                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1298                                       "ssi.1", "ssi.0";
1299                         status = "disabled";
1300
1301                         rcar_sound,dvc {
1302                                 dvc0: dvc-0 {
1303                                         dmas = <&audma1 0xbc>;
1304                                         dma-names = "tx";
1305                                 };
1306                                 dvc1: dvc-1 {
1307                                         dmas = <&audma1 0xbe>;
1308                                         dma-names = "tx";
1309                                 };
1310                         };
1311
1312                         rcar_sound,mix {
1313                                 mix0: mix-0 { };
1314                                 mix1: mix-1 { };
1315                         };
1316
1317                         rcar_sound,ctu {
1318                                 ctu00: ctu-0 { };
1319                                 ctu01: ctu-1 { };
1320                                 ctu02: ctu-2 { };
1321                                 ctu03: ctu-3 { };
1322                                 ctu10: ctu-4 { };
1323                                 ctu11: ctu-5 { };
1324                                 ctu12: ctu-6 { };
1325                                 ctu13: ctu-7 { };
1326                         };
1327
1328                         rcar_sound,src {
1329                                 src0: src-0 {
1330                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1331                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1332                                         dma-names = "rx", "tx";
1333                                 };
1334                                 src1: src-1 {
1335                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1336                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1337                                         dma-names = "rx", "tx";
1338                                 };
1339                                 src2: src-2 {
1340                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1341                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1342                                         dma-names = "rx", "tx";
1343                                 };
1344                                 src3: src-3 {
1345                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1346                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1347                                         dma-names = "rx", "tx";
1348                                 };
1349                                 src4: src-4 {
1350                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1351                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1352                                         dma-names = "rx", "tx";
1353                                 };
1354                                 src5: src-5 {
1355                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1356                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1357                                         dma-names = "rx", "tx";
1358                                 };
1359                                 src6: src-6 {
1360                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1361                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1362                                         dma-names = "rx", "tx";
1363                                 };
1364                                 src7: src-7 {
1365                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1366                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1367                                         dma-names = "rx", "tx";
1368                                 };
1369                                 src8: src-8 {
1370                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1371                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1372                                         dma-names = "rx", "tx";
1373                                 };
1374                                 src9: src-9 {
1375                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1376                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1377                                         dma-names = "rx", "tx";
1378                                 };
1379                         };
1380
1381                         rcar_sound,ssi {
1382                                 ssi0: ssi-0 {
1383                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1384                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1385                                         dma-names = "rx", "tx", "rxu", "txu";
1386                                 };
1387                                 ssi1: ssi-1 {
1388                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1389                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1390                                         dma-names = "rx", "tx", "rxu", "txu";
1391                                 };
1392                                 ssi2: ssi-2 {
1393                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1394                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1395                                         dma-names = "rx", "tx", "rxu", "txu";
1396                                 };
1397                                 ssi3: ssi-3 {
1398                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1399                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1400                                         dma-names = "rx", "tx", "rxu", "txu";
1401                                 };
1402                                 ssi4: ssi-4 {
1403                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1404                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1405                                         dma-names = "rx", "tx", "rxu", "txu";
1406                                 };
1407                                 ssi5: ssi-5 {
1408                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1409                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1410                                         dma-names = "rx", "tx", "rxu", "txu";
1411                                 };
1412                                 ssi6: ssi-6 {
1413                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1414                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1415                                         dma-names = "rx", "tx", "rxu", "txu";
1416                                 };
1417                                 ssi7: ssi-7 {
1418                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1419                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1420                                         dma-names = "rx", "tx", "rxu", "txu";
1421                                 };
1422                                 ssi8: ssi-8 {
1423                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1424                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1425                                         dma-names = "rx", "tx", "rxu", "txu";
1426                                 };
1427                                 ssi9: ssi-9 {
1428                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1429                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1430                                         dma-names = "rx", "tx", "rxu", "txu";
1431                                 };
1432                         };
1433                 };
1434
1435                 pciec0: pcie@fe000000 {
1436                         /* placeholder */
1437                 };
1438
1439                 pciec1: pcie@ee800000 {
1440                         /* placeholder */
1441                 };
1442
1443                 du: display@feb00000 {
1444                         /* placeholder */
1445
1446                         ports {
1447                                 #address-cells = <1>;
1448                                 #size-cells = <0>;
1449
1450                                 port@0 {
1451                                         reg = <0>;
1452                                         du_out_rgb: endpoint {
1453                                         };
1454                                 };
1455                         };
1456                 };
1457         };
1458 };