arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a57_3: cpu@3 {
  68                         compatible = "arm,cortex-a57","arm,armv8";
  69                         reg = <0x3>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_0: cpu@100 {
  77                         compatible = "arm,cortex-a53", "arm,armv8";
  78                         reg = <0x100>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_1: cpu@101 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x101>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 a53_2: cpu@102 {
  95                         compatible = "arm,cortex-a53","arm,armv8";
  96                         reg = <0x102>;
  97                         device_type = "cpu";
  98                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  99                         next-level-cache = <&L2_CA53>;
 100                         enable-method = "psci";
 101                 };
 102
 103                 a53_3: cpu@103 {
 104                         compatible = "arm,cortex-a53","arm,armv8";
 105                         reg = <0x103>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                 };
 111
 112                 L2_CA57: cache-controller-0 {
 113                         compatible = "cache";
 114                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 115                         cache-unified;
 116                         cache-level = <2>;
 117                 };
 118
 119                 L2_CA53: cache-controller-1 {
 120                         compatible = "cache";
 121                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 122                         cache-unified;
 123                         cache-level = <2>;
 124                 };
 125         };
 126
 127         extal_clk: extal {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 /* This value must be overridden by the board */
 131                 clock-frequency = <0>;
 132         };
 133
 134         extalr_clk: extalr {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 /* This value must be overridden by the board */
 138                 clock-frequency = <0>;
 139         };
 140
 141         /*
 142          * The external audio clocks are configured as 0 Hz fixed frequency
 143          * clocks by default.
 144          * Boards that provide audio clocks should override them.
 145          */
 146         audio_clk_a: audio_clk_a {
 147                 compatible = "fixed-clock";
 148                 #clock-cells = <0>;
 149                 clock-frequency = <0>;
 150         };
 151
 152         audio_clk_b: audio_clk_b {
 153                 compatible = "fixed-clock";
 154                 #clock-cells = <0>;
 155                 clock-frequency = <0>;
 156         };
 157
 158         audio_clk_c: audio_clk_c {
 159                 compatible = "fixed-clock";
 160                 #clock-cells = <0>;
 161                 clock-frequency = <0>;
 162         };
 163
 164         /* External CAN clock - to be overridden by boards that provide it */
 165         can_clk: can {
 166                 compatible = "fixed-clock";
 167                 #clock-cells = <0>;
 168                 clock-frequency = <0>;
 169         };
 170
 171         /* External SCIF clock - to be overridden by boards that provide it */
 172         scif_clk: scif {
 173                 compatible = "fixed-clock";
 174                 #clock-cells = <0>;
 175                 clock-frequency = <0>;
 176         };
 177
 178         /* External PCIe clock - can be overridden by the board */
 179         pcie_bus_clk: pcie_bus {
 180                 compatible = "fixed-clock";
 181                 #clock-cells = <0>;
 182                 clock-frequency = <0>;
 183         };
 184
 185         soc: soc {
 186                 compatible = "simple-bus";
 187                 interrupt-parent = <&gic>;
 188
 189                 #address-cells = <2>;
 190                 #size-cells = <2>;
 191                 ranges;
 192
 193                 gic: interrupt-controller@f1010000 {
 194                         compatible = "arm,gic-400";
 195                         #interrupt-cells = <3>;
 196                         #address-cells = <0>;
 197                         interrupt-controller;
 198                         reg = <0x0 0xf1010000 0 0x1000>,
 199                               <0x0 0xf1020000 0 0x20000>,
 200                               <0x0 0xf1040000 0 0x20000>,
 201                               <0x0 0xf1060000 0 0x20000>;
 202                         interrupts = <GIC_PPI 9
 203                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 204                         clocks = <&cpg CPG_MOD 408>;
 205                         clock-names = "clk";
 206                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 207                         resets = <&cpg 408>;
 208                 };
 209
 210                 wdt0: watchdog@e6020000 {
 211                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 212                         reg = <0 0xe6020000 0 0x0c>;
 213                         clocks = <&cpg CPG_MOD 402>;
 214                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 215                         resets = <&cpg 402>;
 216                         status = "disabled";
 217                 };
 218
 219                 gpio0: gpio@e6050000 {
 220                         compatible = "renesas,gpio-r8a7795",
 221                                      "renesas,gpio-rcar";
 222                         reg = <0 0xe6050000 0 0x50>;
 223                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 224                         #gpio-cells = <2>;
 225                         gpio-controller;
 226                         gpio-ranges = <&pfc 0 0 16>;
 227                         #interrupt-cells = <2>;
 228                         interrupt-controller;
 229                         clocks = <&cpg CPG_MOD 912>;
 230                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 231                         resets = <&cpg 912>;
 232                 };
 233
 234                 gpio1: gpio@e6051000 {
 235                         compatible = "renesas,gpio-r8a7795",
 236                                      "renesas,gpio-rcar";
 237                         reg = <0 0xe6051000 0 0x50>;
 238                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241                         gpio-ranges = <&pfc 0 32 28>;
 242                         #interrupt-cells = <2>;
 243                         interrupt-controller;
 244                         clocks = <&cpg CPG_MOD 911>;
 245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 246                         resets = <&cpg 911>;
 247                 };
 248
 249                 gpio2: gpio@e6052000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6052000 0 0x50>;
 253                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 64 15>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 910>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                         resets = <&cpg 910>;
 262                 };
 263
 264                 gpio3: gpio@e6053000 {
 265                         compatible = "renesas,gpio-r8a7795",
 266                                      "renesas,gpio-rcar";
 267                         reg = <0 0xe6053000 0 0x50>;
 268                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 269                         #gpio-cells = <2>;
 270                         gpio-controller;
 271                         gpio-ranges = <&pfc 0 96 16>;
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         clocks = <&cpg CPG_MOD 909>;
 275                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 276                         resets = <&cpg 909>;
 277                 };
 278
 279                 gpio4: gpio@e6054000 {
 280                         compatible = "renesas,gpio-r8a7795",
 281                                      "renesas,gpio-rcar";
 282                         reg = <0 0xe6054000 0 0x50>;
 283                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 128 18>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 908>;
 290                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 291                         resets = <&cpg 908>;
 292                 };
 293
 294                 gpio5: gpio@e6055000 {
 295                         compatible = "renesas,gpio-r8a7795",
 296                                      "renesas,gpio-rcar";
 297                         reg = <0 0xe6055000 0 0x50>;
 298                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 160 26>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 907>;
 305                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 306                         resets = <&cpg 907>;
 307                 };
 308
 309                 gpio6: gpio@e6055400 {
 310                         compatible = "renesas,gpio-r8a7795",
 311                                      "renesas,gpio-rcar";
 312                         reg = <0 0xe6055400 0 0x50>;
 313                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 192 32>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 906>;
 320                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 321                         resets = <&cpg 906>;
 322                 };
 323
 324                 gpio7: gpio@e6055800 {
 325                         compatible = "renesas,gpio-r8a7795",
 326                                      "renesas,gpio-rcar";
 327                         reg = <0 0xe6055800 0 0x50>;
 328                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 329                         #gpio-cells = <2>;
 330                         gpio-controller;
 331                         gpio-ranges = <&pfc 0 224 4>;
 332                         #interrupt-cells = <2>;
 333                         interrupt-controller;
 334                         clocks = <&cpg CPG_MOD 905>;
 335                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 336                         resets = <&cpg 905>;
 337                 };
 338
 339                 pmu_a57 {
 340                         compatible = "arm,cortex-a57-pmu";
 341                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 345                         interrupt-affinity = <&a57_0>,
 346                                              <&a57_1>,
 347                                              <&a57_2>,
 348                                              <&a57_3>;
 349                 };
 350
 351                 pmu_a53 {
 352                         compatible = "arm,cortex-a53-pmu";
 353                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 357                         interrupt-affinity = <&a53_0>,
 358                                              <&a53_1>,
 359                                              <&a53_2>,
 360                                              <&a53_3>;
 361                 };
 362
 363                 timer {
 364                         compatible = "arm,armv8-timer";
 365                         interrupts = <GIC_PPI 13
 366                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 367                                      <GIC_PPI 14
 368                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 369                                      <GIC_PPI 11
 370                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 371                                      <GIC_PPI 10
 372                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 373                 };
 374
 375                 cpg: clock-controller@e6150000 {
 376                         compatible = "renesas,r8a7795-cpg-mssr";
 377                         reg = <0 0xe6150000 0 0x1000>;
 378                         clocks = <&extal_clk>, <&extalr_clk>;
 379                         clock-names = "extal", "extalr";
 380                         #clock-cells = <2>;
 381                         #power-domain-cells = <0>;
 382                         #reset-cells = <1>;
 383                 };
 384
 385                 rst: reset-controller@e6160000 {
 386                         compatible = "renesas,r8a7795-rst";
 387                         reg = <0 0xe6160000 0 0x0200>;
 388                 };
 389
 390                 prr: chipid@fff00044 {
 391                         compatible = "renesas,prr";
 392                         reg = <0 0xfff00044 0 4>;
 393                 };
 394
 395                 sysc: system-controller@e6180000 {
 396                         compatible = "renesas,r8a7795-sysc";
 397                         reg = <0 0xe6180000 0 0x0400>;
 398                         #power-domain-cells = <1>;
 399                 };
 400
 401                 pfc: pin-controller@e6060000 {
 402                         compatible = "renesas,pfc-r8a7795";
 403                         reg = <0 0xe6060000 0 0x50c>;
 404                 };
 405
 406                 intc_ex: interrupt-controller@e61c0000 {
 407                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 408                         #interrupt-cells = <2>;
 409                         interrupt-controller;
 410                         reg = <0 0xe61c0000 0 0x200>;
 411                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 412                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 413                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 417                         clocks = <&cpg CPG_MOD 407>;
 418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 419                         resets = <&cpg 407>;
 420                 };
 421
 422                 dmac0: dma-controller@e6700000 {
 423                         compatible = "renesas,dmac-r8a7795",
 424                                      "renesas,rcar-dmac";
 425                         reg = <0 0xe6700000 0 0x10000>;
 426                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 443                         interrupt-names = "error",
 444                                         "ch0", "ch1", "ch2", "ch3",
 445                                         "ch4", "ch5", "ch6", "ch7",
 446                                         "ch8", "ch9", "ch10", "ch11",
 447                                         "ch12", "ch13", "ch14", "ch15";
 448                         clocks = <&cpg CPG_MOD 219>;
 449                         clock-names = "fck";
 450                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 451                         resets = <&cpg 219>;
 452                         #dma-cells = <1>;
 453                         dma-channels = <16>;
 454                 };
 455
 456                 dmac1: dma-controller@e7300000 {
 457                         compatible = "renesas,dmac-r8a7795",
 458                                      "renesas,rcar-dmac";
 459                         reg = <0 0xe7300000 0 0x10000>;
 460                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 476                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 477                         interrupt-names = "error",
 478                                         "ch0", "ch1", "ch2", "ch3",
 479                                         "ch4", "ch5", "ch6", "ch7",
 480                                         "ch8", "ch9", "ch10", "ch11",
 481                                         "ch12", "ch13", "ch14", "ch15";
 482                         clocks = <&cpg CPG_MOD 218>;
 483                         clock-names = "fck";
 484                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 485                         resets = <&cpg 218>;
 486                         #dma-cells = <1>;
 487                         dma-channels = <16>;
 488                 };
 489
 490                 dmac2: dma-controller@e7310000 {
 491                         compatible = "renesas,dmac-r8a7795",
 492                                      "renesas,rcar-dmac";
 493                         reg = <0 0xe7310000 0 0x10000>;
 494                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 508                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 509                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 510                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 511                         interrupt-names = "error",
 512                                         "ch0", "ch1", "ch2", "ch3",
 513                                         "ch4", "ch5", "ch6", "ch7",
 514                                         "ch8", "ch9", "ch10", "ch11",
 515                                         "ch12", "ch13", "ch14", "ch15";
 516                         clocks = <&cpg CPG_MOD 217>;
 517                         clock-names = "fck";
 518                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 519                         resets = <&cpg 217>;
 520                         #dma-cells = <1>;
 521                         dma-channels = <16>;
 522                 };
 523
 524                 audma0: dma-controller@ec700000 {
 525                         compatible = "renesas,dmac-r8a7795",
 526                                      "renesas,rcar-dmac";
 527                         reg = <0 0xec700000 0 0x10000>;
 528                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 529                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 530                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 531                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 532                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 533                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 534                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 535                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 536                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 537                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 538                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 540                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 541                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 542                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 543                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 544                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 545                         interrupt-names = "error",
 546                                         "ch0", "ch1", "ch2", "ch3",
 547                                         "ch4", "ch5", "ch6", "ch7",
 548                                         "ch8", "ch9", "ch10", "ch11",
 549                                         "ch12", "ch13", "ch14", "ch15";
 550                         clocks = <&cpg CPG_MOD 502>;
 551                         clock-names = "fck";
 552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 553                         resets = <&cpg 502>;
 554                         #dma-cells = <1>;
 555                         dma-channels = <16>;
 556                 };
 557
 558                 audma1: dma-controller@ec720000 {
 559                         compatible = "renesas,dmac-r8a7795",
 560                                      "renesas,rcar-dmac";
 561                         reg = <0 0xec720000 0 0x10000>;
 562                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 563                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 564                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 565                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 566                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 579                         interrupt-names = "error",
 580                                         "ch0", "ch1", "ch2", "ch3",
 581                                         "ch4", "ch5", "ch6", "ch7",
 582                                         "ch8", "ch9", "ch10", "ch11",
 583                                         "ch12", "ch13", "ch14", "ch15";
 584                         clocks = <&cpg CPG_MOD 501>;
 585                         clock-names = "fck";
 586                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 587                         resets = <&cpg 501>;
 588                         #dma-cells = <1>;
 589                         dma-channels = <16>;
 590                 };
 591
 592                 avb: ethernet@e6800000 {
 593                         compatible = "renesas,etheravb-r8a7795",
 594                                      "renesas,etheravb-rcar-gen3";
 595                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 596                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 599                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 600                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 621                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 622                                           "ch4", "ch5", "ch6", "ch7",
 623                                           "ch8", "ch9", "ch10", "ch11",
 624                                           "ch12", "ch13", "ch14", "ch15",
 625                                           "ch16", "ch17", "ch18", "ch19",
 626                                           "ch20", "ch21", "ch22", "ch23",
 627                                           "ch24";
 628                         clocks = <&cpg CPG_MOD 812>;
 629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 630                         resets = <&cpg 812>;
 631                         phy-mode = "rgmii-txid";
 632                         #address-cells = <1>;
 633                         #size-cells = <0>;
 634                         status = "disabled";
 635                 };
 636
 637                 can0: can@e6c30000 {
 638                         compatible = "renesas,can-r8a7795",
 639                                      "renesas,rcar-gen3-can";
 640                         reg = <0 0xe6c30000 0 0x1000>;
 641                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 642                         clocks = <&cpg CPG_MOD 916>,
 643                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 644                                <&can_clk>;
 645                         clock-names = "clkp1", "clkp2", "can_clk";
 646                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 647                         assigned-clock-rates = <40000000>;
 648                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 649                         resets = <&cpg 916>;
 650                         status = "disabled";
 651                 };
 652
 653                 can1: can@e6c38000 {
 654                         compatible = "renesas,can-r8a7795",
 655                                      "renesas,rcar-gen3-can";
 656                         reg = <0 0xe6c38000 0 0x1000>;
 657                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 658                         clocks = <&cpg CPG_MOD 915>,
 659                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 660                                <&can_clk>;
 661                         clock-names = "clkp1", "clkp2", "can_clk";
 662                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 663                         assigned-clock-rates = <40000000>;
 664                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 665                         resets = <&cpg 915>;
 666                         status = "disabled";
 667                 };
 668
 669                 canfd: can@e66c0000 {
 670                         compatible = "renesas,r8a7795-canfd",
 671                                      "renesas,rcar-gen3-canfd";
 672                         reg = <0 0xe66c0000 0 0x8000>;
 673                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 674                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 675                         clocks = <&cpg CPG_MOD 914>,
 676                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 677                                <&can_clk>;
 678                         clock-names = "fck", "canfd", "can_clk";
 679                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 680                         assigned-clock-rates = <40000000>;
 681                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 682                         resets = <&cpg 914>;
 683                         status = "disabled";
 684
 685                         channel0 {
 686                                 status = "disabled";
 687                         };
 688
 689                         channel1 {
 690                                 status = "disabled";
 691                         };
 692                 };
 693
 694                 hscif0: serial@e6540000 {
 695                         compatible = "renesas,hscif-r8a7795",
 696                                      "renesas,rcar-gen3-hscif",
 697                                      "renesas,hscif";
 698                         reg = <0 0xe6540000 0 96>;
 699                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 700                         clocks = <&cpg CPG_MOD 520>,
 701                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 702                                  <&scif_clk>;
 703                         clock-names = "fck", "brg_int", "scif_clk";
 704                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 705                         dma-names = "tx", "rx";
 706                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 707                         resets = <&cpg 520>;
 708                         status = "disabled";
 709                 };
 710
 711                 hscif1: serial@e6550000 {
 712                         compatible = "renesas,hscif-r8a7795",
 713                                      "renesas,rcar-gen3-hscif",
 714                                      "renesas,hscif";
 715                         reg = <0 0xe6550000 0 96>;
 716                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 519>,
 718                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 719                                  <&scif_clk>;
 720                         clock-names = "fck", "brg_int", "scif_clk";
 721                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 722                         dma-names = "tx", "rx";
 723                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 724                         resets = <&cpg 519>;
 725                         status = "disabled";
 726                 };
 727
 728                 hscif2: serial@e6560000 {
 729                         compatible = "renesas,hscif-r8a7795",
 730                                      "renesas,rcar-gen3-hscif",
 731                                      "renesas,hscif";
 732                         reg = <0 0xe6560000 0 96>;
 733                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 518>,
 735                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 736                                  <&scif_clk>;
 737                         clock-names = "fck", "brg_int", "scif_clk";
 738                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 739                         dma-names = "tx", "rx";
 740                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 741                         resets = <&cpg 518>;
 742                         status = "disabled";
 743                 };
 744
 745                 hscif3: serial@e66a0000 {
 746                         compatible = "renesas,hscif-r8a7795",
 747                                      "renesas,rcar-gen3-hscif",
 748                                      "renesas,hscif";
 749                         reg = <0 0xe66a0000 0 96>;
 750                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 751                         clocks = <&cpg CPG_MOD 517>,
 752                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 753                                  <&scif_clk>;
 754                         clock-names = "fck", "brg_int", "scif_clk";
 755                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 756                         dma-names = "tx", "rx";
 757                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 758                         resets = <&cpg 517>;
 759                         status = "disabled";
 760                 };
 761
 762                 hscif4: serial@e66b0000 {
 763                         compatible = "renesas,hscif-r8a7795",
 764                                      "renesas,rcar-gen3-hscif",
 765                                      "renesas,hscif";
 766                         reg = <0 0xe66b0000 0 96>;
 767                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 768                         clocks = <&cpg CPG_MOD 516>,
 769                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 770                                  <&scif_clk>;
 771                         clock-names = "fck", "brg_int", "scif_clk";
 772                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 773                         dma-names = "tx", "rx";
 774                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 775                         resets = <&cpg 516>;
 776                         status = "disabled";
 777                 };
 778
 779                 scif0: serial@e6e60000 {
 780                         compatible = "renesas,scif-r8a7795",
 781                                      "renesas,rcar-gen3-scif", "renesas,scif";
 782                         reg = <0 0xe6e60000 0 64>;
 783                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 784                         clocks = <&cpg CPG_MOD 207>,
 785                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 786                                  <&scif_clk>;
 787                         clock-names = "fck", "brg_int", "scif_clk";
 788                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 789                         dma-names = "tx", "rx";
 790                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 791                         resets = <&cpg 207>;
 792                         status = "disabled";
 793                 };
 794
 795                 scif1: serial@e6e68000 {
 796                         compatible = "renesas,scif-r8a7795",
 797                                      "renesas,rcar-gen3-scif", "renesas,scif";
 798                         reg = <0 0xe6e68000 0 64>;
 799                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 800                         clocks = <&cpg CPG_MOD 206>,
 801                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 802                                  <&scif_clk>;
 803                         clock-names = "fck", "brg_int", "scif_clk";
 804                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 805                         dma-names = "tx", "rx";
 806                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 807                         resets = <&cpg 206>;
 808                         status = "disabled";
 809                 };
 810
 811                 scif2: serial@e6e88000 {
 812                         compatible = "renesas,scif-r8a7795",
 813                                      "renesas,rcar-gen3-scif", "renesas,scif";
 814                         reg = <0 0xe6e88000 0 64>;
 815                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 310>,
 817                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 818                                  <&scif_clk>;
 819                         clock-names = "fck", "brg_int", "scif_clk";
 820                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 821                         dma-names = "tx", "rx";
 822                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 823                         resets = <&cpg 310>;
 824                         status = "disabled";
 825                 };
 826
 827                 scif3: serial@e6c50000 {
 828                         compatible = "renesas,scif-r8a7795",
 829                                      "renesas,rcar-gen3-scif", "renesas,scif";
 830                         reg = <0 0xe6c50000 0 64>;
 831                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 832                         clocks = <&cpg CPG_MOD 204>,
 833                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 834                                  <&scif_clk>;
 835                         clock-names = "fck", "brg_int", "scif_clk";
 836                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 837                         dma-names = "tx", "rx";
 838                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 839                         resets = <&cpg 204>;
 840                         status = "disabled";
 841                 };
 842
 843                 scif4: serial@e6c40000 {
 844                         compatible = "renesas,scif-r8a7795",
 845                                      "renesas,rcar-gen3-scif", "renesas,scif";
 846                         reg = <0 0xe6c40000 0 64>;
 847                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 203>,
 849                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 850                                  <&scif_clk>;
 851                         clock-names = "fck", "brg_int", "scif_clk";
 852                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 853                         dma-names = "tx", "rx";
 854                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 855                         resets = <&cpg 203>;
 856                         status = "disabled";
 857                 };
 858
 859                 scif5: serial@e6f30000 {
 860                         compatible = "renesas,scif-r8a7795",
 861                                      "renesas,rcar-gen3-scif", "renesas,scif";
 862                         reg = <0 0xe6f30000 0 64>;
 863                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 864                         clocks = <&cpg CPG_MOD 202>,
 865                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 866                                  <&scif_clk>;
 867                         clock-names = "fck", "brg_int", "scif_clk";
 868                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 869                         dma-names = "tx", "rx";
 870                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 871                         resets = <&cpg 202>;
 872                         status = "disabled";
 873                 };
 874
 875                 i2c_dvfs: i2c@e60b0000 {
 876                         #address-cells = <1>;
 877                         #size-cells = <0>;
 878                         compatible = "renesas,iic-r8a7795",
 879                                      "renesas,rcar-gen3-iic",
 880                                      "renesas,rmobile-iic";
 881                         reg = <0 0xe60b0000 0 0x425>;
 882                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 883                         clocks = <&cpg CPG_MOD 926>;
 884                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 885                         resets = <&cpg 926>;
 886                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 887                         dma-names = "tx", "rx";
 888                         status = "disabled";
 889                 };
 890
 891                 i2c0: i2c@e6500000 {
 892                         #address-cells = <1>;
 893                         #size-cells = <0>;
 894                         compatible = "renesas,i2c-r8a7795",
 895                                      "renesas,rcar-gen3-i2c";
 896                         reg = <0 0xe6500000 0 0x40>;
 897                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 898                         clocks = <&cpg CPG_MOD 931>;
 899                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 900                         resets = <&cpg 931>;
 901                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 902                         dma-names = "tx", "rx";
 903                         i2c-scl-internal-delay-ns = <110>;
 904                         status = "disabled";
 905                 };
 906
 907                 i2c1: i2c@e6508000 {
 908                         #address-cells = <1>;
 909                         #size-cells = <0>;
 910                         compatible = "renesas,i2c-r8a7795",
 911                                      "renesas,rcar-gen3-i2c";
 912                         reg = <0 0xe6508000 0 0x40>;
 913                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 914                         clocks = <&cpg CPG_MOD 930>;
 915                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 916                         resets = <&cpg 930>;
 917                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 918                         dma-names = "tx", "rx";
 919                         i2c-scl-internal-delay-ns = <6>;
 920                         status = "disabled";
 921                 };
 922
 923                 i2c2: i2c@e6510000 {
 924                         #address-cells = <1>;
 925                         #size-cells = <0>;
 926                         compatible = "renesas,i2c-r8a7795",
 927                                      "renesas,rcar-gen3-i2c";
 928                         reg = <0 0xe6510000 0 0x40>;
 929                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 930                         clocks = <&cpg CPG_MOD 929>;
 931                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 932                         resets = <&cpg 929>;
 933                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 934                         dma-names = "tx", "rx";
 935                         i2c-scl-internal-delay-ns = <6>;
 936                         status = "disabled";
 937                 };
 938
 939                 i2c3: i2c@e66d0000 {
 940                         #address-cells = <1>;
 941                         #size-cells = <0>;
 942                         compatible = "renesas,i2c-r8a7795",
 943                                      "renesas,rcar-gen3-i2c";
 944                         reg = <0 0xe66d0000 0 0x40>;
 945                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 946                         clocks = <&cpg CPG_MOD 928>;
 947                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 948                         resets = <&cpg 928>;
 949                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 950                         dma-names = "tx", "rx";
 951                         i2c-scl-internal-delay-ns = <110>;
 952                         status = "disabled";
 953                 };
 954
 955                 i2c4: i2c@e66d8000 {
 956                         #address-cells = <1>;
 957                         #size-cells = <0>;
 958                         compatible = "renesas,i2c-r8a7795",
 959                                      "renesas,rcar-gen3-i2c";
 960                         reg = <0 0xe66d8000 0 0x40>;
 961                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 962                         clocks = <&cpg CPG_MOD 927>;
 963                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 964                         resets = <&cpg 927>;
 965                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 966                         dma-names = "tx", "rx";
 967                         i2c-scl-internal-delay-ns = <110>;
 968                         status = "disabled";
 969                 };
 970
 971                 i2c5: i2c@e66e0000 {
 972                         #address-cells = <1>;
 973                         #size-cells = <0>;
 974                         compatible = "renesas,i2c-r8a7795",
 975                                      "renesas,rcar-gen3-i2c";
 976                         reg = <0 0xe66e0000 0 0x40>;
 977                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 978                         clocks = <&cpg CPG_MOD 919>;
 979                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 980                         resets = <&cpg 919>;
 981                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 982                         dma-names = "tx", "rx";
 983                         i2c-scl-internal-delay-ns = <110>;
 984                         status = "disabled";
 985                 };
 986
 987                 i2c6: i2c@e66e8000 {
 988                         #address-cells = <1>;
 989                         #size-cells = <0>;
 990                         compatible = "renesas,i2c-r8a7795",
 991                                      "renesas,rcar-gen3-i2c";
 992                         reg = <0 0xe66e8000 0 0x40>;
 993                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 994                         clocks = <&cpg CPG_MOD 918>;
 995                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 996                         resets = <&cpg 918>;
 997                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 998                         dma-names = "tx", "rx";
 999                         i2c-scl-internal-delay-ns = <6>;
1000                         status = "disabled";
1001                 };
1002
1003                 pwm0: pwm@e6e30000 {
1004                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1005                         reg = <0 0xe6e30000 0 0x8>;
1006                         clocks = <&cpg CPG_MOD 523>;
1007                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1008                         resets = <&cpg 523>;
1009                         #pwm-cells = <2>;
1010                         status = "disabled";
1011                 };
1012
1013                 pwm1: pwm@e6e31000 {
1014                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1015                         reg = <0 0xe6e31000 0 0x8>;
1016                         clocks = <&cpg CPG_MOD 523>;
1017                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1018                         resets = <&cpg 523>;
1019                         #pwm-cells = <2>;
1020                         status = "disabled";
1021                 };
1022
1023                 pwm2: pwm@e6e32000 {
1024                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1025                         reg = <0 0xe6e32000 0 0x8>;
1026                         clocks = <&cpg CPG_MOD 523>;
1027                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1028                         resets = <&cpg 523>;
1029                         #pwm-cells = <2>;
1030                         status = "disabled";
1031                 };
1032
1033                 pwm3: pwm@e6e33000 {
1034                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1035                         reg = <0 0xe6e33000 0 0x8>;
1036                         clocks = <&cpg CPG_MOD 523>;
1037                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1038                         resets = <&cpg 523>;
1039                         #pwm-cells = <2>;
1040                         status = "disabled";
1041                 };
1042
1043                 pwm4: pwm@e6e34000 {
1044                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1045                         reg = <0 0xe6e34000 0 0x8>;
1046                         clocks = <&cpg CPG_MOD 523>;
1047                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1048                         resets = <&cpg 523>;
1049                         #pwm-cells = <2>;
1050                         status = "disabled";
1051                 };
1052
1053                 pwm5: pwm@e6e35000 {
1054                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1055                         reg = <0 0xe6e35000 0 0x8>;
1056                         clocks = <&cpg CPG_MOD 523>;
1057                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1058                         resets = <&cpg 523>;
1059                         #pwm-cells = <2>;
1060                         status = "disabled";
1061                 };
1062
1063                 pwm6: pwm@e6e36000 {
1064                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1065                         reg = <0 0xe6e36000 0 0x8>;
1066                         clocks = <&cpg CPG_MOD 523>;
1067                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1068                         resets = <&cpg 523>;
1069                         #pwm-cells = <2>;
1070                         status = "disabled";
1071                 };
1072
1073                 rcar_sound: sound@ec500000 {
1074                         /*
1075                          * #sound-dai-cells is required
1076                          *
1077                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1078                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1079                          */
1080                         /*
1081                          * #clock-cells is required for audio_clkout0/1/2/3
1082                          *
1083                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1084                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1085                          */
1086                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1087                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1088                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1089                                 <0 0xec540000 0 0x1000>, /* SSIU */
1090                                 <0 0xec541000 0 0x280>,  /* SSI */
1091                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1092                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1093
1094                         clocks = <&cpg CPG_MOD 1005>,
1095                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1096                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1097                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1098                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1099                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1100                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1101                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1102                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1103                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1104                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1105                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1106                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1107                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1108                                  <&audio_clk_a>, <&audio_clk_b>,
1109                                  <&audio_clk_c>,
1110                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1111                         clock-names = "ssi-all",
1112                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1113                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1114                                       "ssi.1", "ssi.0",
1115                                       "src.9", "src.8", "src.7", "src.6",
1116                                       "src.5", "src.4", "src.3", "src.2",
1117                                       "src.1", "src.0",
1118                                       "mix.1", "mix.0",
1119                                       "ctu.1", "ctu.0",
1120                                       "dvc.0", "dvc.1",
1121                                       "clk_a", "clk_b", "clk_c", "clk_i";
1122                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1123                         resets = <&cpg 1005>,
1124                                  <&cpg 1006>, <&cpg 1007>,
1125                                  <&cpg 1008>, <&cpg 1009>,
1126                                  <&cpg 1010>, <&cpg 1011>,
1127                                  <&cpg 1012>, <&cpg 1013>,
1128                                  <&cpg 1014>, <&cpg 1015>;
1129                         reset-names = "ssi-all",
1130                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1131                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1132                                       "ssi.1", "ssi.0";
1133                         status = "disabled";
1134
1135                         rcar_sound,dvc {
1136                                 dvc0: dvc-0 {
1137                                         dmas = <&audma1 0xbc>;
1138                                         dma-names = "tx";
1139                                 };
1140                                 dvc1: dvc-1 {
1141                                         dmas = <&audma1 0xbe>;
1142                                         dma-names = "tx";
1143                                 };
1144                         };
1145
1146                         rcar_sound,mix {
1147                                 mix0: mix-0 { };
1148                                 mix1: mix-1 { };
1149                         };
1150
1151                         rcar_sound,ctu {
1152                                 ctu00: ctu-0 { };
1153                                 ctu01: ctu-1 { };
1154                                 ctu02: ctu-2 { };
1155                                 ctu03: ctu-3 { };
1156                                 ctu10: ctu-4 { };
1157                                 ctu11: ctu-5 { };
1158                                 ctu12: ctu-6 { };
1159                                 ctu13: ctu-7 { };
1160                         };
1161
1162                         rcar_sound,src {
1163                                 src0: src-0 {
1164                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1165                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1166                                         dma-names = "rx", "tx";
1167                                 };
1168                                 src1: src-1 {
1169                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1170                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1171                                         dma-names = "rx", "tx";
1172                                 };
1173                                 src2: src-2 {
1174                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1175                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1176                                         dma-names = "rx", "tx";
1177                                 };
1178                                 src3: src-3 {
1179                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1180                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1181                                         dma-names = "rx", "tx";
1182                                 };
1183                                 src4: src-4 {
1184                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1185                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1186                                         dma-names = "rx", "tx";
1187                                 };
1188                                 src5: src-5 {
1189                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1190                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1191                                         dma-names = "rx", "tx";
1192                                 };
1193                                 src6: src-6 {
1194                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1195                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1196                                         dma-names = "rx", "tx";
1197                                 };
1198                                 src7: src-7 {
1199                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1200                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1201                                         dma-names = "rx", "tx";
1202                                 };
1203                                 src8: src-8 {
1204                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1205                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1206                                         dma-names = "rx", "tx";
1207                                 };
1208                                 src9: src-9 {
1209                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1210                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1211                                         dma-names = "rx", "tx";
1212                                 };
1213                         };
1214
1215                         rcar_sound,ssi {
1216                                 ssi0: ssi-0 {
1217                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1218                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1219                                         dma-names = "rx", "tx", "rxu", "txu";
1220                                 };
1221                                 ssi1: ssi-1 {
1222                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1223                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1224                                         dma-names = "rx", "tx", "rxu", "txu";
1225                                 };
1226                                 ssi2: ssi-2 {
1227                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1228                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1229                                         dma-names = "rx", "tx", "rxu", "txu";
1230                                 };
1231                                 ssi3: ssi-3 {
1232                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1233                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1234                                         dma-names = "rx", "tx", "rxu", "txu";
1235                                 };
1236                                 ssi4: ssi-4 {
1237                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1238                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1239                                         dma-names = "rx", "tx", "rxu", "txu";
1240                                 };
1241                                 ssi5: ssi-5 {
1242                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1243                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1244                                         dma-names = "rx", "tx", "rxu", "txu";
1245                                 };
1246                                 ssi6: ssi-6 {
1247                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1248                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1249                                         dma-names = "rx", "tx", "rxu", "txu";
1250                                 };
1251                                 ssi7: ssi-7 {
1252                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1253                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1254                                         dma-names = "rx", "tx", "rxu", "txu";
1255                                 };
1256                                 ssi8: ssi-8 {
1257                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1258                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1259                                         dma-names = "rx", "tx", "rxu", "txu";
1260                                 };
1261                                 ssi9: ssi-9 {
1262                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1263                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1264                                         dma-names = "rx", "tx", "rxu", "txu";
1265                                 };
1266                         };
1267                 };
1268
1269                 sata: sata@ee300000 {
1270                         compatible = "renesas,sata-r8a7795";
1271                         reg = <0 0xee300000 0 0x200000>;
1272                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1273                         clocks = <&cpg CPG_MOD 815>;
1274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1275                         resets = <&cpg 815>;
1276                         status = "disabled";
1277                 };
1278
1279                 xhci0: usb@ee000000 {
1280                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1281                         reg = <0 0xee000000 0 0xc00>;
1282                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1283                         clocks = <&cpg CPG_MOD 328>;
1284                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1285                         resets = <&cpg 328>;
1286                         status = "disabled";
1287                 };
1288
1289                 usb_dmac0: dma-controller@e65a0000 {
1290                         compatible = "renesas,r8a7795-usb-dmac",
1291                                      "renesas,usb-dmac";
1292                         reg = <0 0xe65a0000 0 0x100>;
1293                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1294                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1295                         interrupt-names = "ch0", "ch1";
1296                         clocks = <&cpg CPG_MOD 330>;
1297                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1298                         resets = <&cpg 330>;
1299                         #dma-cells = <1>;
1300                         dma-channels = <2>;
1301                 };
1302
1303                 usb_dmac1: dma-controller@e65b0000 {
1304                         compatible = "renesas,r8a7795-usb-dmac",
1305                                      "renesas,usb-dmac";
1306                         reg = <0 0xe65b0000 0 0x100>;
1307                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1308                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1309                         interrupt-names = "ch0", "ch1";
1310                         clocks = <&cpg CPG_MOD 331>;
1311                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1312                         resets = <&cpg 331>;
1313                         #dma-cells = <1>;
1314                         dma-channels = <2>;
1315                 };
1316
1317                 sdhi0: sd@ee100000 {
1318                         compatible = "renesas,sdhi-r8a7795";
1319                         reg = <0 0xee100000 0 0x2000>;
1320                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1321                         clocks = <&cpg CPG_MOD 314>;
1322                         max-frequency = <200000000>;
1323                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1324                         resets = <&cpg 314>;
1325                         status = "disabled";
1326                 };
1327
1328                 sdhi1: sd@ee120000 {
1329                         compatible = "renesas,sdhi-r8a7795";
1330                         reg = <0 0xee120000 0 0x2000>;
1331                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1332                         clocks = <&cpg CPG_MOD 313>;
1333                         max-frequency = <200000000>;
1334                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1335                         resets = <&cpg 313>;
1336                         status = "disabled";
1337                 };
1338
1339                 sdhi2: sd@ee140000 {
1340                         compatible = "renesas,sdhi-r8a7795";
1341                         reg = <0 0xee140000 0 0x2000>;
1342                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1343                         clocks = <&cpg CPG_MOD 312>;
1344                         max-frequency = <200000000>;
1345                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1346                         resets = <&cpg 312>;
1347                         status = "disabled";
1348                 };
1349
1350                 sdhi3: sd@ee160000 {
1351                         compatible = "renesas,sdhi-r8a7795";
1352                         reg = <0 0xee160000 0 0x2000>;
1353                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1354                         clocks = <&cpg CPG_MOD 311>;
1355                         max-frequency = <200000000>;
1356                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1357                         resets = <&cpg 311>;
1358                         status = "disabled";
1359                 };
1360
1361                 usb2_phy0: usb-phy@ee080200 {
1362                         compatible = "renesas,usb2-phy-r8a7795",
1363                                      "renesas,rcar-gen3-usb2-phy";
1364                         reg = <0 0xee080200 0 0x700>;
1365                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1366                         clocks = <&cpg CPG_MOD 703>;
1367                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1368                         resets = <&cpg 703>;
1369                         #phy-cells = <0>;
1370                         status = "disabled";
1371                 };
1372
1373                 usb2_phy1: usb-phy@ee0a0200 {
1374                         compatible = "renesas,usb2-phy-r8a7795",
1375                                      "renesas,rcar-gen3-usb2-phy";
1376                         reg = <0 0xee0a0200 0 0x700>;
1377                         clocks = <&cpg CPG_MOD 702>;
1378                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1379                         resets = <&cpg 702>;
1380                         #phy-cells = <0>;
1381                         status = "disabled";
1382                 };
1383
1384                 usb2_phy2: usb-phy@ee0c0200 {
1385                         compatible = "renesas,usb2-phy-r8a7795",
1386                                      "renesas,rcar-gen3-usb2-phy";
1387                         reg = <0 0xee0c0200 0 0x700>;
1388                         clocks = <&cpg CPG_MOD 701>;
1389                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1390                         resets = <&cpg 701>;
1391                         #phy-cells = <0>;
1392                         status = "disabled";
1393                 };
1394
1395                 ehci0: usb@ee080100 {
1396                         compatible = "generic-ehci";
1397                         reg = <0 0xee080100 0 0x100>;
1398                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1399                         clocks = <&cpg CPG_MOD 703>;
1400                         phys = <&usb2_phy0>;
1401                         phy-names = "usb";
1402                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1403                         resets = <&cpg 703>;
1404                         status = "disabled";
1405                 };
1406
1407                 ehci1: usb@ee0a0100 {
1408                         compatible = "generic-ehci";
1409                         reg = <0 0xee0a0100 0 0x100>;
1410                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1411                         clocks = <&cpg CPG_MOD 702>;
1412                         phys = <&usb2_phy1>;
1413                         phy-names = "usb";
1414                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1415                         resets = <&cpg 702>;
1416                         status = "disabled";
1417                 };
1418
1419                 ehci2: usb@ee0c0100 {
1420                         compatible = "generic-ehci";
1421                         reg = <0 0xee0c0100 0 0x100>;
1422                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1423                         clocks = <&cpg CPG_MOD 701>;
1424                         phys = <&usb2_phy2>;
1425                         phy-names = "usb";
1426                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1427                         resets = <&cpg 701>;
1428                         status = "disabled";
1429                 };
1430
1431                 ohci0: usb@ee080000 {
1432                         compatible = "generic-ohci";
1433                         reg = <0 0xee080000 0 0x100>;
1434                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1435                         clocks = <&cpg CPG_MOD 703>;
1436                         phys = <&usb2_phy0>;
1437                         phy-names = "usb";
1438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1439                         resets = <&cpg 703>;
1440                         status = "disabled";
1441                 };
1442
1443                 ohci1: usb@ee0a0000 {
1444                         compatible = "generic-ohci";
1445                         reg = <0 0xee0a0000 0 0x100>;
1446                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1447                         clocks = <&cpg CPG_MOD 702>;
1448                         phys = <&usb2_phy1>;
1449                         phy-names = "usb";
1450                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1451                         resets = <&cpg 702>;
1452                         status = "disabled";
1453                 };
1454
1455                 ohci2: usb@ee0c0000 {
1456                         compatible = "generic-ohci";
1457                         reg = <0 0xee0c0000 0 0x100>;
1458                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1459                         clocks = <&cpg CPG_MOD 701>;
1460                         phys = <&usb2_phy2>;
1461                         phy-names = "usb";
1462                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1463                         resets = <&cpg 701>;
1464                         status = "disabled";
1465                 };
1466
1467                 hsusb: usb@e6590000 {
1468                         compatible = "renesas,usbhs-r8a7795",
1469                                      "renesas,rcar-gen3-usbhs";
1470                         reg = <0 0xe6590000 0 0x100>;
1471                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1472                         clocks = <&cpg CPG_MOD 704>;
1473                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1474                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1475                         dma-names = "ch0", "ch1", "ch2", "ch3";
1476                         renesas,buswait = <11>;
1477                         phys = <&usb2_phy0>;
1478                         phy-names = "usb";
1479                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1480                         resets = <&cpg 704>;
1481                         status = "disabled";
1482                 };
1483
1484                 pciec0: pcie@fe000000 {
1485                         compatible = "renesas,pcie-r8a7795",
1486                                      "renesas,pcie-rcar-gen3";
1487                         reg = <0 0xfe000000 0 0x80000>;
1488                         #address-cells = <3>;
1489                         #size-cells = <2>;
1490                         bus-range = <0x00 0xff>;
1491                         device_type = "pci";
1492                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1493                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1494                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1495                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1496                         /* Map all possible DDR as inbound ranges */
1497                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1498                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1499                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1500                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1501                         #interrupt-cells = <1>;
1502                         interrupt-map-mask = <0 0 0 0>;
1503                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1504                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1505                         clock-names = "pcie", "pcie_bus";
1506                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1507                         resets = <&cpg 319>;
1508                         status = "disabled";
1509                 };
1510
1511                 pciec1: pcie@ee800000 {
1512                         compatible = "renesas,pcie-r8a7795",
1513                                      "renesas,pcie-rcar-gen3";
1514                         reg = <0 0xee800000 0 0x80000>;
1515                         #address-cells = <3>;
1516                         #size-cells = <2>;
1517                         bus-range = <0x00 0xff>;
1518                         device_type = "pci";
1519                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1520                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1521                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1522                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1523                         /* Map all possible DDR as inbound ranges */
1524                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1525                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1526                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1527                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1528                         #interrupt-cells = <1>;
1529                         interrupt-map-mask = <0 0 0 0>;
1530                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1531                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1532                         clock-names = "pcie", "pcie_bus";
1533                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1534                         resets = <&cpg 318>;
1535                         status = "disabled";
1536                 };
1537
1538                 vspbc: vsp@fe920000 {
1539                         compatible = "renesas,vsp2";
1540                         reg = <0 0xfe920000 0 0x8000>;
1541                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1542                         clocks = <&cpg CPG_MOD 624>;
1543                         power-domains = <&sysc R8A7795_PD_A3VP>;
1544                         resets = <&cpg 624>;
1545
1546                         renesas,fcp = <&fcpvb1>;
1547                 };
1548
1549                 fcpvb1: fcp@fe92f000 {
1550                         compatible = "renesas,fcpv";
1551                         reg = <0 0xfe92f000 0 0x200>;
1552                         clocks = <&cpg CPG_MOD 606>;
1553                         power-domains = <&sysc R8A7795_PD_A3VP>;
1554                         resets = <&cpg 606>;
1555                 };
1556
1557                 fcpf0: fcp@fe950000 {
1558                         compatible = "renesas,fcpf";
1559                         reg = <0 0xfe950000 0 0x200>;
1560                         clocks = <&cpg CPG_MOD 615>;
1561                         power-domains = <&sysc R8A7795_PD_A3VP>;
1562                         resets = <&cpg 615>;
1563                 };
1564
1565                 fcpf1: fcp@fe951000 {
1566                         compatible = "renesas,fcpf";
1567                         reg = <0 0xfe951000 0 0x200>;
1568                         clocks = <&cpg CPG_MOD 614>;
1569                         power-domains = <&sysc R8A7795_PD_A3VP>;
1570                         resets = <&cpg 614>;
1571                 };
1572
1573                 vspbd: vsp@fe960000 {
1574                         compatible = "renesas,vsp2";
1575                         reg = <0 0xfe960000 0 0x8000>;
1576                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1577                         clocks = <&cpg CPG_MOD 626>;
1578                         power-domains = <&sysc R8A7795_PD_A3VP>;
1579                         resets = <&cpg 626>;
1580
1581                         renesas,fcp = <&fcpvb0>;
1582                 };
1583
1584                 fcpvb0: fcp@fe96f000 {
1585                         compatible = "renesas,fcpv";
1586                         reg = <0 0xfe96f000 0 0x200>;
1587                         clocks = <&cpg CPG_MOD 607>;
1588                         power-domains = <&sysc R8A7795_PD_A3VP>;
1589                         resets = <&cpg 607>;
1590                 };
1591
1592                 vspi0: vsp@fe9a0000 {
1593                         compatible = "renesas,vsp2";
1594                         reg = <0 0xfe9a0000 0 0x8000>;
1595                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1596                         clocks = <&cpg CPG_MOD 631>;
1597                         power-domains = <&sysc R8A7795_PD_A3VP>;
1598                         resets = <&cpg 631>;
1599
1600                         renesas,fcp = <&fcpvi0>;
1601                 };
1602
1603                 fcpvi0: fcp@fe9af000 {
1604                         compatible = "renesas,fcpv";
1605                         reg = <0 0xfe9af000 0 0x200>;
1606                         clocks = <&cpg CPG_MOD 611>;
1607                         power-domains = <&sysc R8A7795_PD_A3VP>;
1608                         resets = <&cpg 611>;
1609                 };
1610
1611                 vspi1: vsp@fe9b0000 {
1612                         compatible = "renesas,vsp2";
1613                         reg = <0 0xfe9b0000 0 0x8000>;
1614                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1615                         clocks = <&cpg CPG_MOD 630>;
1616                         power-domains = <&sysc R8A7795_PD_A3VP>;
1617                         resets = <&cpg 630>;
1618
1619                         renesas,fcp = <&fcpvi1>;
1620                 };
1621
1622                 fcpvi1: fcp@fe9bf000 {
1623                         compatible = "renesas,fcpv";
1624                         reg = <0 0xfe9bf000 0 0x200>;
1625                         clocks = <&cpg CPG_MOD 610>;
1626                         power-domains = <&sysc R8A7795_PD_A3VP>;
1627                         resets = <&cpg 610>;
1628                 };
1629
1630                 vspd0: vsp@fea20000 {
1631                         compatible = "renesas,vsp2";
1632                         reg = <0 0xfea20000 0 0x4000>;
1633                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1634                         clocks = <&cpg CPG_MOD 623>;
1635                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1636                         resets = <&cpg 623>;
1637
1638                         renesas,fcp = <&fcpvd0>;
1639                 };
1640
1641                 fcpvd0: fcp@fea27000 {
1642                         compatible = "renesas,fcpv";
1643                         reg = <0 0xfea27000 0 0x200>;
1644                         clocks = <&cpg CPG_MOD 603>;
1645                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1646                         resets = <&cpg 603>;
1647                 };
1648
1649                 vspd1: vsp@fea28000 {
1650                         compatible = "renesas,vsp2";
1651                         reg = <0 0xfea28000 0 0x4000>;
1652                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1653                         clocks = <&cpg CPG_MOD 622>;
1654                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1655                         resets = <&cpg 622>;
1656
1657                         renesas,fcp = <&fcpvd1>;
1658                 };
1659
1660                 fcpvd1: fcp@fea2f000 {
1661                         compatible = "renesas,fcpv";
1662                         reg = <0 0xfea2f000 0 0x200>;
1663                         clocks = <&cpg CPG_MOD 602>;
1664                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1665                         resets = <&cpg 602>;
1666                 };
1667
1668                 vspd2: vsp@fea30000 {
1669                         compatible = "renesas,vsp2";
1670                         reg = <0 0xfea30000 0 0x4000>;
1671                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1672                         clocks = <&cpg CPG_MOD 621>;
1673                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1674                         resets = <&cpg 621>;
1675
1676                         renesas,fcp = <&fcpvd2>;
1677                 };
1678
1679                 fcpvd2: fcp@fea37000 {
1680                         compatible = "renesas,fcpv";
1681                         reg = <0 0xfea37000 0 0x200>;
1682                         clocks = <&cpg CPG_MOD 601>;
1683                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1684                         resets = <&cpg 601>;
1685                 };
1686
1687                 fdp1@fe940000 {
1688                         compatible = "renesas,fdp1";
1689                         reg = <0 0xfe940000 0 0x2400>;
1690                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 119>;
1692                         power-domains = <&sysc R8A7795_PD_A3VP>;
1693                         resets = <&cpg 119>;
1694                         renesas,fcp = <&fcpf0>;
1695                 };
1696
1697                 fdp1@fe944000 {
1698                         compatible = "renesas,fdp1";
1699                         reg = <0 0xfe944000 0 0x2400>;
1700                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1701                         clocks = <&cpg CPG_MOD 118>;
1702                         power-domains = <&sysc R8A7795_PD_A3VP>;
1703                         resets = <&cpg 118>;
1704                         renesas,fcp = <&fcpf1>;
1705                 };
1706
1707                 hdmi0: hdmi0@fead0000 {
1708                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1709                         reg = <0 0xfead0000 0 0x10000>;
1710                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1711                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1712                         clock-names = "iahb", "isfr";
1713                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1714                         resets = <&cpg 729>;
1715                         status = "disabled";
1716
1717                         ports {
1718                                 #address-cells = <1>;
1719                                 #size-cells = <0>;
1720                                 port@0 {
1721                                         reg = <0>;
1722                                         dw_hdmi0_in: endpoint {
1723                                                 remote-endpoint = <&du_out_hdmi0>;
1724                                         };
1725                                 };
1726                                 port@1 {
1727                                         reg = <1>;
1728                                 };
1729                         };
1730                 };
1731
1732                 hdmi1: hdmi1@feae0000 {
1733                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1734                         reg = <0 0xfeae0000 0 0x10000>;
1735                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
1736                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1737                         clock-names = "iahb", "isfr";
1738                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1739                         resets = <&cpg 728>;
1740                         status = "disabled";
1741
1742                         ports {
1743                                 #address-cells = <1>;
1744                                 #size-cells = <0>;
1745                                 port@0 {
1746                                         reg = <0>;
1747                                         dw_hdmi1_in: endpoint {
1748                                                 remote-endpoint = <&du_out_hdmi1>;
1749                                         };
1750                                 };
1751                                 port@1 {
1752                                         reg = <1>;
1753                                 };
1754                         };
1755                 };
1756
1757                 du: display@feb00000 {
1758                         reg = <0 0xfeb00000 0 0x80000>,
1759                               <0 0xfeb90000 0 0x14>;
1760                         reg-names = "du", "lvds.0";
1761                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1762                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1763                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1764                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1765                         clocks = <&cpg CPG_MOD 724>,
1766                                  <&cpg CPG_MOD 723>,
1767                                  <&cpg CPG_MOD 722>,
1768                                  <&cpg CPG_MOD 721>,
1769                                  <&cpg CPG_MOD 727>;
1770                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1771                         status = "disabled";
1772
1773                         ports {
1774                                 #address-cells = <1>;
1775                                 #size-cells = <0>;
1776
1777                                 port@0 {
1778                                         reg = <0>;
1779                                         du_out_rgb: endpoint {
1780                                         };
1781                                 };
1782                                 port@1 {
1783                                         reg = <1>;
1784                                         du_out_hdmi0: endpoint {
1785                                                 remote-endpoint = <&dw_hdmi0_in>;
1786                                         };
1787                                 };
1788                                 port@2 {
1789                                         reg = <2>;
1790                                         du_out_hdmi1: endpoint {
1791                                                 remote-endpoint = <&dw_hdmi1_in>;
1792                                         };
1793                                 };
1794                                 port@3 {
1795                                         reg = <3>;
1796                                         du_out_lvds0: endpoint {
1797                                         };
1798                                 };
1799                         };
1800                 };
1801
1802                 tsc: thermal@e6198000 {
1803                         compatible = "renesas,r8a7795-thermal";
1804                         reg = <0 0xe6198000 0 0x68>,
1805                               <0 0xe61a0000 0 0x5c>,
1806                               <0 0xe61a8000 0 0x5c>;
1807                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1808                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1809                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1810                         clocks = <&cpg CPG_MOD 522>;
1811                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1812                         resets = <&cpg 522>;
1813                         #thermal-sensor-cells = <1>;
1814                         status = "okay";
1815                 };
1816
1817                 thermal-zones {
1818                         sensor_thermal1: sensor-thermal1 {
1819                                 polling-delay-passive = <250>;
1820                                 polling-delay = <1000>;
1821                                 thermal-sensors = <&tsc 0>;
1822
1823                                 trips {
1824                                         sensor1_crit: sensor1-crit {
1825                                                 temperature = <120000>;
1826                                                 hysteresis = <2000>;
1827                                                 type = "critical";
1828                                         };
1829                                 };
1830                         };
1831
1832                         sensor_thermal2: sensor-thermal2 {
1833                                 polling-delay-passive = <250>;
1834                                 polling-delay = <1000>;
1835                                 thermal-sensors = <&tsc 1>;
1836
1837                                 trips {
1838                                         sensor2_crit: sensor2-crit {
1839                                                 temperature = <120000>;
1840                                                 hysteresis = <2000>;
1841                                                 type = "critical";
1842                                         };
1843                                 };
1844                         };
1845
1846                         sensor_thermal3: sensor-thermal3 {
1847                                 polling-delay-passive = <250>;
1848                                 polling-delay = <1000>;
1849                                 thermal-sensors = <&tsc 2>;
1850
1851                                 trips {
1852                                         sensor3_crit: sensor3-crit {
1853                                                 temperature = <120000>;
1854                                                 hysteresis = <2000>;
1855                                                 type = "critical";
1856                                         };
1857                                 };
1858                         };
1859                 };
1860         };
1861 };