Merge branch 'akpm' (patches from Andrew)
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the R-Car H3 (R8A77950) SoC
4  *
5  * Copyright (C) 2015 Renesas Electronics Corp.
6  */
7
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
11
12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
13
14 / {
15         compatible = "renesas,r8a7795";
16         #address-cells = <2>;
17         #size-cells = <2>;
18
19         aliases {
20                 i2c0 = &i2c0;
21                 i2c1 = &i2c1;
22                 i2c2 = &i2c2;
23                 i2c3 = &i2c3;
24                 i2c4 = &i2c4;
25                 i2c5 = &i2c5;
26                 i2c6 = &i2c6;
27                 i2c7 = &i2c_dvfs;
28         };
29
30         /*
31          * The external audio clocks are configured as 0 Hz fixed frequency
32          * clocks by default.
33          * Boards that provide audio clocks should override them.
34          */
35         audio_clk_a: audio_clk_a {
36                 compatible = "fixed-clock";
37                 #clock-cells = <0>;
38                 clock-frequency = <0>;
39         };
40
41         audio_clk_b: audio_clk_b {
42                 compatible = "fixed-clock";
43                 #clock-cells = <0>;
44                 clock-frequency = <0>;
45         };
46
47         audio_clk_c: audio_clk_c {
48                 compatible = "fixed-clock";
49                 #clock-cells = <0>;
50                 clock-frequency = <0>;
51         };
52
53         /* External CAN clock - to be overridden by boards that provide it */
54         can_clk: can {
55                 compatible = "fixed-clock";
56                 #clock-cells = <0>;
57                 clock-frequency = <0>;
58         };
59
60         cluster0_opp: opp_table0 {
61                 compatible = "operating-points-v2";
62                 opp-shared;
63
64                 opp-500000000 {
65                         opp-hz = /bits/ 64 <500000000>;
66                         opp-microvolt = <830000>;
67                         clock-latency-ns = <300000>;
68                 };
69                 opp-1000000000 {
70                         opp-hz = /bits/ 64 <1000000000>;
71                         opp-microvolt = <830000>;
72                         clock-latency-ns = <300000>;
73                 };
74                 opp-1500000000 {
75                         opp-hz = /bits/ 64 <1500000000>;
76                         opp-microvolt = <830000>;
77                         clock-latency-ns = <300000>;
78                         opp-suspend;
79                 };
80                 opp-1600000000 {
81                         opp-hz = /bits/ 64 <1600000000>;
82                         opp-microvolt = <900000>;
83                         clock-latency-ns = <300000>;
84                         turbo-mode;
85                 };
86                 opp-1700000000 {
87                         opp-hz = /bits/ 64 <1700000000>;
88                         opp-microvolt = <960000>;
89                         clock-latency-ns = <300000>;
90                         turbo-mode;
91                 };
92         };
93
94         cluster1_opp: opp_table1 {
95                 compatible = "operating-points-v2";
96                 opp-shared;
97
98                 opp-800000000 {
99                         opp-hz = /bits/ 64 <800000000>;
100                         opp-microvolt = <820000>;
101                         clock-latency-ns = <300000>;
102                 };
103                 opp-1000000000 {
104                         opp-hz = /bits/ 64 <1000000000>;
105                         opp-microvolt = <820000>;
106                         clock-latency-ns = <300000>;
107                 };
108                 opp-1200000000 {
109                         opp-hz = /bits/ 64 <1200000000>;
110                         opp-microvolt = <820000>;
111                         clock-latency-ns = <300000>;
112                 };
113         };
114
115         cpus {
116                 #address-cells = <1>;
117                 #size-cells = <0>;
118
119                 cpu-map {
120                         cluster0 {
121                                 core0 {
122                                         cpu = <&a57_0>;
123                                 };
124                                 core1 {
125                                         cpu = <&a57_1>;
126                                 };
127                                 core2 {
128                                         cpu = <&a57_2>;
129                                 };
130                                 core3 {
131                                         cpu = <&a57_3>;
132                                 };
133                         };
134
135                         cluster1 {
136                                 core0 {
137                                         cpu = <&a53_0>;
138                                 };
139                                 core1 {
140                                         cpu = <&a53_1>;
141                                 };
142                                 core2 {
143                                         cpu = <&a53_2>;
144                                 };
145                                 core3 {
146                                         cpu = <&a53_3>;
147                                 };
148                         };
149                 };
150
151                 a57_0: cpu@0 {
152                         compatible = "arm,cortex-a57";
153                         reg = <0x0>;
154                         device_type = "cpu";
155                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
156                         next-level-cache = <&L2_CA57>;
157                         enable-method = "psci";
158                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
159                         operating-points-v2 = <&cluster0_opp>;
160                         capacity-dmips-mhz = <1024>;
161                         #cooling-cells = <2>;
162                 };
163
164                 a57_1: cpu@1 {
165                         compatible = "arm,cortex-a57";
166                         reg = <0x1>;
167                         device_type = "cpu";
168                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
169                         next-level-cache = <&L2_CA57>;
170                         enable-method = "psci";
171                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
172                         operating-points-v2 = <&cluster0_opp>;
173                         capacity-dmips-mhz = <1024>;
174                         #cooling-cells = <2>;
175                 };
176
177                 a57_2: cpu@2 {
178                         compatible = "arm,cortex-a57";
179                         reg = <0x2>;
180                         device_type = "cpu";
181                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
182                         next-level-cache = <&L2_CA57>;
183                         enable-method = "psci";
184                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
185                         operating-points-v2 = <&cluster0_opp>;
186                         capacity-dmips-mhz = <1024>;
187                         #cooling-cells = <2>;
188                 };
189
190                 a57_3: cpu@3 {
191                         compatible = "arm,cortex-a57";
192                         reg = <0x3>;
193                         device_type = "cpu";
194                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
195                         next-level-cache = <&L2_CA57>;
196                         enable-method = "psci";
197                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
198                         operating-points-v2 = <&cluster0_opp>;
199                         capacity-dmips-mhz = <1024>;
200                         #cooling-cells = <2>;
201                 };
202
203                 a53_0: cpu@100 {
204                         compatible = "arm,cortex-a53";
205                         reg = <0x100>;
206                         device_type = "cpu";
207                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
208                         next-level-cache = <&L2_CA53>;
209                         enable-method = "psci";
210                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
211                         operating-points-v2 = <&cluster1_opp>;
212                         capacity-dmips-mhz = <535>;
213                 };
214
215                 a53_1: cpu@101 {
216                         compatible = "arm,cortex-a53";
217                         reg = <0x101>;
218                         device_type = "cpu";
219                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
220                         next-level-cache = <&L2_CA53>;
221                         enable-method = "psci";
222                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
223                         operating-points-v2 = <&cluster1_opp>;
224                         capacity-dmips-mhz = <535>;
225                 };
226
227                 a53_2: cpu@102 {
228                         compatible = "arm,cortex-a53";
229                         reg = <0x102>;
230                         device_type = "cpu";
231                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
232                         next-level-cache = <&L2_CA53>;
233                         enable-method = "psci";
234                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
235                         operating-points-v2 = <&cluster1_opp>;
236                         capacity-dmips-mhz = <535>;
237                 };
238
239                 a53_3: cpu@103 {
240                         compatible = "arm,cortex-a53";
241                         reg = <0x103>;
242                         device_type = "cpu";
243                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
244                         next-level-cache = <&L2_CA53>;
245                         enable-method = "psci";
246                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
247                         operating-points-v2 = <&cluster1_opp>;
248                         capacity-dmips-mhz = <535>;
249                 };
250
251                 L2_CA57: cache-controller-0 {
252                         compatible = "cache";
253                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
254                         cache-unified;
255                         cache-level = <2>;
256                 };
257
258                 L2_CA53: cache-controller-1 {
259                         compatible = "cache";
260                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
261                         cache-unified;
262                         cache-level = <2>;
263                 };
264         };
265
266         extal_clk: extal {
267                 compatible = "fixed-clock";
268                 #clock-cells = <0>;
269                 /* This value must be overridden by the board */
270                 clock-frequency = <0>;
271         };
272
273         extalr_clk: extalr {
274                 compatible = "fixed-clock";
275                 #clock-cells = <0>;
276                 /* This value must be overridden by the board */
277                 clock-frequency = <0>;
278         };
279
280         /* External PCIe clock - can be overridden by the board */
281         pcie_bus_clk: pcie_bus {
282                 compatible = "fixed-clock";
283                 #clock-cells = <0>;
284                 clock-frequency = <0>;
285         };
286
287         pmu_a53 {
288                 compatible = "arm,cortex-a53-pmu";
289                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
290                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
291                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
292                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
293                 interrupt-affinity = <&a53_0>,
294                                      <&a53_1>,
295                                      <&a53_2>,
296                                      <&a53_3>;
297         };
298
299         pmu_a57 {
300                 compatible = "arm,cortex-a57-pmu";
301                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
302                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
303                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
304                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
305                 interrupt-affinity = <&a57_0>,
306                                      <&a57_1>,
307                                      <&a57_2>,
308                                      <&a57_3>;
309         };
310
311         psci {
312                 compatible = "arm,psci-1.0", "arm,psci-0.2";
313                 method = "smc";
314         };
315
316         /* External SCIF clock - to be overridden by boards that provide it */
317         scif_clk: scif {
318                 compatible = "fixed-clock";
319                 #clock-cells = <0>;
320                 clock-frequency = <0>;
321         };
322
323         soc: soc {
324                 compatible = "simple-bus";
325                 interrupt-parent = <&gic>;
326
327                 #address-cells = <2>;
328                 #size-cells = <2>;
329                 ranges;
330
331                 rwdt: watchdog@e6020000 {
332                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
333                         reg = <0 0xe6020000 0 0x0c>;
334                         clocks = <&cpg CPG_MOD 402>;
335                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
336                         resets = <&cpg 402>;
337                         status = "disabled";
338                 };
339
340                 gpio0: gpio@e6050000 {
341                         compatible = "renesas,gpio-r8a7795",
342                                      "renesas,rcar-gen3-gpio";
343                         reg = <0 0xe6050000 0 0x50>;
344                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
345                         #gpio-cells = <2>;
346                         gpio-controller;
347                         gpio-ranges = <&pfc 0 0 16>;
348                         #interrupt-cells = <2>;
349                         interrupt-controller;
350                         clocks = <&cpg CPG_MOD 912>;
351                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
352                         resets = <&cpg 912>;
353                 };
354
355                 gpio1: gpio@e6051000 {
356                         compatible = "renesas,gpio-r8a7795",
357                                      "renesas,rcar-gen3-gpio";
358                         reg = <0 0xe6051000 0 0x50>;
359                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
360                         #gpio-cells = <2>;
361                         gpio-controller;
362                         gpio-ranges = <&pfc 0 32 29>;
363                         #interrupt-cells = <2>;
364                         interrupt-controller;
365                         clocks = <&cpg CPG_MOD 911>;
366                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
367                         resets = <&cpg 911>;
368                 };
369
370                 gpio2: gpio@e6052000 {
371                         compatible = "renesas,gpio-r8a7795",
372                                      "renesas,rcar-gen3-gpio";
373                         reg = <0 0xe6052000 0 0x50>;
374                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
375                         #gpio-cells = <2>;
376                         gpio-controller;
377                         gpio-ranges = <&pfc 0 64 15>;
378                         #interrupt-cells = <2>;
379                         interrupt-controller;
380                         clocks = <&cpg CPG_MOD 910>;
381                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
382                         resets = <&cpg 910>;
383                 };
384
385                 gpio3: gpio@e6053000 {
386                         compatible = "renesas,gpio-r8a7795",
387                                      "renesas,rcar-gen3-gpio";
388                         reg = <0 0xe6053000 0 0x50>;
389                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
390                         #gpio-cells = <2>;
391                         gpio-controller;
392                         gpio-ranges = <&pfc 0 96 16>;
393                         #interrupt-cells = <2>;
394                         interrupt-controller;
395                         clocks = <&cpg CPG_MOD 909>;
396                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
397                         resets = <&cpg 909>;
398                 };
399
400                 gpio4: gpio@e6054000 {
401                         compatible = "renesas,gpio-r8a7795",
402                                      "renesas,rcar-gen3-gpio";
403                         reg = <0 0xe6054000 0 0x50>;
404                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
405                         #gpio-cells = <2>;
406                         gpio-controller;
407                         gpio-ranges = <&pfc 0 128 18>;
408                         #interrupt-cells = <2>;
409                         interrupt-controller;
410                         clocks = <&cpg CPG_MOD 908>;
411                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
412                         resets = <&cpg 908>;
413                 };
414
415                 gpio5: gpio@e6055000 {
416                         compatible = "renesas,gpio-r8a7795",
417                                      "renesas,rcar-gen3-gpio";
418                         reg = <0 0xe6055000 0 0x50>;
419                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
420                         #gpio-cells = <2>;
421                         gpio-controller;
422                         gpio-ranges = <&pfc 0 160 26>;
423                         #interrupt-cells = <2>;
424                         interrupt-controller;
425                         clocks = <&cpg CPG_MOD 907>;
426                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
427                         resets = <&cpg 907>;
428                 };
429
430                 gpio6: gpio@e6055400 {
431                         compatible = "renesas,gpio-r8a7795",
432                                      "renesas,rcar-gen3-gpio";
433                         reg = <0 0xe6055400 0 0x50>;
434                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
435                         #gpio-cells = <2>;
436                         gpio-controller;
437                         gpio-ranges = <&pfc 0 192 32>;
438                         #interrupt-cells = <2>;
439                         interrupt-controller;
440                         clocks = <&cpg CPG_MOD 906>;
441                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
442                         resets = <&cpg 906>;
443                 };
444
445                 gpio7: gpio@e6055800 {
446                         compatible = "renesas,gpio-r8a7795",
447                                      "renesas,rcar-gen3-gpio";
448                         reg = <0 0xe6055800 0 0x50>;
449                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
450                         #gpio-cells = <2>;
451                         gpio-controller;
452                         gpio-ranges = <&pfc 0 224 4>;
453                         #interrupt-cells = <2>;
454                         interrupt-controller;
455                         clocks = <&cpg CPG_MOD 905>;
456                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
457                         resets = <&cpg 905>;
458                 };
459
460                 pfc: pin-controller@e6060000 {
461                         compatible = "renesas,pfc-r8a7795";
462                         reg = <0 0xe6060000 0 0x50c>;
463                 };
464
465                 cpg: clock-controller@e6150000 {
466                         compatible = "renesas,r8a7795-cpg-mssr";
467                         reg = <0 0xe6150000 0 0x1000>;
468                         clocks = <&extal_clk>, <&extalr_clk>;
469                         clock-names = "extal", "extalr";
470                         #clock-cells = <2>;
471                         #power-domain-cells = <0>;
472                         #reset-cells = <1>;
473                 };
474
475                 rst: reset-controller@e6160000 {
476                         compatible = "renesas,r8a7795-rst";
477                         reg = <0 0xe6160000 0 0x0200>;
478                 };
479
480                 sysc: system-controller@e6180000 {
481                         compatible = "renesas,r8a7795-sysc";
482                         reg = <0 0xe6180000 0 0x0400>;
483                         #power-domain-cells = <1>;
484                 };
485
486                 tsc: thermal@e6198000 {
487                         compatible = "renesas,r8a7795-thermal";
488                         reg = <0 0xe6198000 0 0x100>,
489                               <0 0xe61a0000 0 0x100>,
490                               <0 0xe61a8000 0 0x100>;
491                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
492                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
493                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
494                         clocks = <&cpg CPG_MOD 522>;
495                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
496                         resets = <&cpg 522>;
497                         #thermal-sensor-cells = <1>;
498                 };
499
500                 intc_ex: interrupt-controller@e61c0000 {
501                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
502                         #interrupt-cells = <2>;
503                         interrupt-controller;
504                         reg = <0 0xe61c0000 0 0x200>;
505                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
506                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
507                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
508                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
509                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
510                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
511                         clocks = <&cpg CPG_MOD 407>;
512                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
513                         resets = <&cpg 407>;
514                 };
515
516                 i2c0: i2c@e6500000 {
517                         #address-cells = <1>;
518                         #size-cells = <0>;
519                         compatible = "renesas,i2c-r8a7795",
520                                      "renesas,rcar-gen3-i2c";
521                         reg = <0 0xe6500000 0 0x40>;
522                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
523                         clocks = <&cpg CPG_MOD 931>;
524                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
525                         resets = <&cpg 931>;
526                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
527                                <&dmac2 0x91>, <&dmac2 0x90>;
528                         dma-names = "tx", "rx", "tx", "rx";
529                         i2c-scl-internal-delay-ns = <110>;
530                         status = "disabled";
531                 };
532
533                 i2c1: i2c@e6508000 {
534                         #address-cells = <1>;
535                         #size-cells = <0>;
536                         compatible = "renesas,i2c-r8a7795",
537                                      "renesas,rcar-gen3-i2c";
538                         reg = <0 0xe6508000 0 0x40>;
539                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
540                         clocks = <&cpg CPG_MOD 930>;
541                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
542                         resets = <&cpg 930>;
543                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
544                                <&dmac2 0x93>, <&dmac2 0x92>;
545                         dma-names = "tx", "rx", "tx", "rx";
546                         i2c-scl-internal-delay-ns = <6>;
547                         status = "disabled";
548                 };
549
550                 i2c2: i2c@e6510000 {
551                         #address-cells = <1>;
552                         #size-cells = <0>;
553                         compatible = "renesas,i2c-r8a7795",
554                                      "renesas,rcar-gen3-i2c";
555                         reg = <0 0xe6510000 0 0x40>;
556                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
557                         clocks = <&cpg CPG_MOD 929>;
558                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
559                         resets = <&cpg 929>;
560                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
561                                <&dmac2 0x95>, <&dmac2 0x94>;
562                         dma-names = "tx", "rx", "tx", "rx";
563                         i2c-scl-internal-delay-ns = <6>;
564                         status = "disabled";
565                 };
566
567                 i2c3: i2c@e66d0000 {
568                         #address-cells = <1>;
569                         #size-cells = <0>;
570                         compatible = "renesas,i2c-r8a7795",
571                                      "renesas,rcar-gen3-i2c";
572                         reg = <0 0xe66d0000 0 0x40>;
573                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
574                         clocks = <&cpg CPG_MOD 928>;
575                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
576                         resets = <&cpg 928>;
577                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
578                         dma-names = "tx", "rx";
579                         i2c-scl-internal-delay-ns = <110>;
580                         status = "disabled";
581                 };
582
583                 i2c4: i2c@e66d8000 {
584                         #address-cells = <1>;
585                         #size-cells = <0>;
586                         compatible = "renesas,i2c-r8a7795",
587                                      "renesas,rcar-gen3-i2c";
588                         reg = <0 0xe66d8000 0 0x40>;
589                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
590                         clocks = <&cpg CPG_MOD 927>;
591                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
592                         resets = <&cpg 927>;
593                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
594                         dma-names = "tx", "rx";
595                         i2c-scl-internal-delay-ns = <110>;
596                         status = "disabled";
597                 };
598
599                 i2c5: i2c@e66e0000 {
600                         #address-cells = <1>;
601                         #size-cells = <0>;
602                         compatible = "renesas,i2c-r8a7795",
603                                      "renesas,rcar-gen3-i2c";
604                         reg = <0 0xe66e0000 0 0x40>;
605                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
606                         clocks = <&cpg CPG_MOD 919>;
607                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
608                         resets = <&cpg 919>;
609                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
610                         dma-names = "tx", "rx";
611                         i2c-scl-internal-delay-ns = <110>;
612                         status = "disabled";
613                 };
614
615                 i2c6: i2c@e66e8000 {
616                         #address-cells = <1>;
617                         #size-cells = <0>;
618                         compatible = "renesas,i2c-r8a7795",
619                                      "renesas,rcar-gen3-i2c";
620                         reg = <0 0xe66e8000 0 0x40>;
621                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
622                         clocks = <&cpg CPG_MOD 918>;
623                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
624                         resets = <&cpg 918>;
625                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
626                         dma-names = "tx", "rx";
627                         i2c-scl-internal-delay-ns = <6>;
628                         status = "disabled";
629                 };
630
631                 i2c_dvfs: i2c@e60b0000 {
632                         #address-cells = <1>;
633                         #size-cells = <0>;
634                         compatible = "renesas,iic-r8a7795",
635                                      "renesas,rcar-gen3-iic",
636                                      "renesas,rmobile-iic";
637                         reg = <0 0xe60b0000 0 0x425>;
638                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
639                         clocks = <&cpg CPG_MOD 926>;
640                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
641                         resets = <&cpg 926>;
642                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
643                         dma-names = "tx", "rx";
644                         status = "disabled";
645                 };
646
647                 hscif0: serial@e6540000 {
648                         compatible = "renesas,hscif-r8a7795",
649                                      "renesas,rcar-gen3-hscif",
650                                      "renesas,hscif";
651                         reg = <0 0xe6540000 0 96>;
652                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
653                         clocks = <&cpg CPG_MOD 520>,
654                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
655                                  <&scif_clk>;
656                         clock-names = "fck", "brg_int", "scif_clk";
657                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
658                                <&dmac2 0x31>, <&dmac2 0x30>;
659                         dma-names = "tx", "rx", "tx", "rx";
660                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
661                         resets = <&cpg 520>;
662                         status = "disabled";
663                 };
664
665                 hscif1: serial@e6550000 {
666                         compatible = "renesas,hscif-r8a7795",
667                                      "renesas,rcar-gen3-hscif",
668                                      "renesas,hscif";
669                         reg = <0 0xe6550000 0 96>;
670                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
671                         clocks = <&cpg CPG_MOD 519>,
672                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
673                                  <&scif_clk>;
674                         clock-names = "fck", "brg_int", "scif_clk";
675                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
676                                <&dmac2 0x33>, <&dmac2 0x32>;
677                         dma-names = "tx", "rx", "tx", "rx";
678                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
679                         resets = <&cpg 519>;
680                         status = "disabled";
681                 };
682
683                 hscif2: serial@e6560000 {
684                         compatible = "renesas,hscif-r8a7795",
685                                      "renesas,rcar-gen3-hscif",
686                                      "renesas,hscif";
687                         reg = <0 0xe6560000 0 96>;
688                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
689                         clocks = <&cpg CPG_MOD 518>,
690                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
691                                  <&scif_clk>;
692                         clock-names = "fck", "brg_int", "scif_clk";
693                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
694                                <&dmac2 0x35>, <&dmac2 0x34>;
695                         dma-names = "tx", "rx", "tx", "rx";
696                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
697                         resets = <&cpg 518>;
698                         status = "disabled";
699                 };
700
701                 hscif3: serial@e66a0000 {
702                         compatible = "renesas,hscif-r8a7795",
703                                      "renesas,rcar-gen3-hscif",
704                                      "renesas,hscif";
705                         reg = <0 0xe66a0000 0 96>;
706                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
707                         clocks = <&cpg CPG_MOD 517>,
708                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
709                                  <&scif_clk>;
710                         clock-names = "fck", "brg_int", "scif_clk";
711                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
712                         dma-names = "tx", "rx";
713                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
714                         resets = <&cpg 517>;
715                         status = "disabled";
716                 };
717
718                 hscif4: serial@e66b0000 {
719                         compatible = "renesas,hscif-r8a7795",
720                                      "renesas,rcar-gen3-hscif",
721                                      "renesas,hscif";
722                         reg = <0 0xe66b0000 0 96>;
723                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
724                         clocks = <&cpg CPG_MOD 516>,
725                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
726                                  <&scif_clk>;
727                         clock-names = "fck", "brg_int", "scif_clk";
728                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
729                         dma-names = "tx", "rx";
730                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
731                         resets = <&cpg 516>;
732                         status = "disabled";
733                 };
734
735                 hsusb: usb@e6590000 {
736                         compatible = "renesas,usbhs-r8a7795",
737                                      "renesas,rcar-gen3-usbhs";
738                         reg = <0 0xe6590000 0 0x200>;
739                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
740                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
741                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
742                                <&usb_dmac1 0>, <&usb_dmac1 1>;
743                         dma-names = "ch0", "ch1", "ch2", "ch3";
744                         renesas,buswait = <11>;
745                         phys = <&usb2_phy0>;
746                         phy-names = "usb";
747                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
748                         resets = <&cpg 704>, <&cpg 703>;
749                         status = "disabled";
750                 };
751
752                 hsusb3: usb@e659c000 {
753                         compatible = "renesas,usbhs-r8a7795",
754                                      "renesas,rcar-gen3-usbhs";
755                         reg = <0 0xe659c000 0 0x200>;
756                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
757                         clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
758                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
759                                <&usb_dmac3 0>, <&usb_dmac3 1>;
760                         dma-names = "ch0", "ch1", "ch2", "ch3";
761                         renesas,buswait = <11>;
762                         phys = <&usb2_phy3>;
763                         phy-names = "usb";
764                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
765                         resets = <&cpg 705>, <&cpg 700>;
766                         status = "disabled";
767                 };
768
769                 usb_dmac0: dma-controller@e65a0000 {
770                         compatible = "renesas,r8a7795-usb-dmac",
771                                      "renesas,usb-dmac";
772                         reg = <0 0xe65a0000 0 0x100>;
773                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
774                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
775                         interrupt-names = "ch0", "ch1";
776                         clocks = <&cpg CPG_MOD 330>;
777                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
778                         resets = <&cpg 330>;
779                         #dma-cells = <1>;
780                         dma-channels = <2>;
781                 };
782
783                 usb_dmac1: dma-controller@e65b0000 {
784                         compatible = "renesas,r8a7795-usb-dmac",
785                                      "renesas,usb-dmac";
786                         reg = <0 0xe65b0000 0 0x100>;
787                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
788                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
789                         interrupt-names = "ch0", "ch1";
790                         clocks = <&cpg CPG_MOD 331>;
791                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
792                         resets = <&cpg 331>;
793                         #dma-cells = <1>;
794                         dma-channels = <2>;
795                 };
796
797                 usb_dmac2: dma-controller@e6460000 {
798                         compatible = "renesas,r8a7795-usb-dmac",
799                                      "renesas,usb-dmac";
800                         reg = <0 0xe6460000 0 0x100>;
801                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
802                                       GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
803                         interrupt-names = "ch0", "ch1";
804                         clocks = <&cpg CPG_MOD 326>;
805                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
806                         resets = <&cpg 326>;
807                         #dma-cells = <1>;
808                         dma-channels = <2>;
809                 };
810
811                 usb_dmac3: dma-controller@e6470000 {
812                         compatible = "renesas,r8a7795-usb-dmac",
813                                      "renesas,usb-dmac";
814                         reg = <0 0xe6470000 0 0x100>;
815                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
816                                       GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
817                         interrupt-names = "ch0", "ch1";
818                         clocks = <&cpg CPG_MOD 329>;
819                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
820                         resets = <&cpg 329>;
821                         #dma-cells = <1>;
822                         dma-channels = <2>;
823                 };
824
825                 usb3_phy0: usb-phy@e65ee000 {
826                         compatible = "renesas,r8a7795-usb3-phy",
827                                      "renesas,rcar-gen3-usb3-phy";
828                         reg = <0 0xe65ee000 0 0x90>;
829                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
830                                  <&usb_extal_clk>;
831                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
832                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
833                         resets = <&cpg 328>;
834                         #phy-cells = <0>;
835                         status = "disabled";
836                 };
837
838                 arm_cc630p: crypto@e6601000 {
839                         compatible = "arm,cryptocell-630p-ree";
840                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
841                         reg = <0x0 0xe6601000 0 0x1000>;
842                         clocks = <&cpg CPG_MOD 229>;
843                         resets = <&cpg 229>;
844                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
845                 };
846
847                 dmac0: dma-controller@e6700000 {
848                         compatible = "renesas,dmac-r8a7795",
849                                      "renesas,rcar-dmac";
850                         reg = <0 0xe6700000 0 0x10000>;
851                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
852                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
853                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
854                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
855                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
856                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
857                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
858                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
859                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
860                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
861                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
862                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
863                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
864                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
865                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
866                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
867                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
868                         interrupt-names = "error",
869                                         "ch0", "ch1", "ch2", "ch3",
870                                         "ch4", "ch5", "ch6", "ch7",
871                                         "ch8", "ch9", "ch10", "ch11",
872                                         "ch12", "ch13", "ch14", "ch15";
873                         clocks = <&cpg CPG_MOD 219>;
874                         clock-names = "fck";
875                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
876                         resets = <&cpg 219>;
877                         #dma-cells = <1>;
878                         dma-channels = <16>;
879                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
880                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
881                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
882                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
883                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
884                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
885                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
886                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
887                 };
888
889                 dmac1: dma-controller@e7300000 {
890                         compatible = "renesas,dmac-r8a7795",
891                                      "renesas,rcar-dmac";
892                         reg = <0 0xe7300000 0 0x10000>;
893                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
894                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
895                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
896                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
897                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
898                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
899                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
900                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
901                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
902                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
903                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
904                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
905                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
906                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
907                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
908                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
909                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
910                         interrupt-names = "error",
911                                         "ch0", "ch1", "ch2", "ch3",
912                                         "ch4", "ch5", "ch6", "ch7",
913                                         "ch8", "ch9", "ch10", "ch11",
914                                         "ch12", "ch13", "ch14", "ch15";
915                         clocks = <&cpg CPG_MOD 218>;
916                         clock-names = "fck";
917                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
918                         resets = <&cpg 218>;
919                         #dma-cells = <1>;
920                         dma-channels = <16>;
921                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
922                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
923                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
924                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
925                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
926                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
927                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
928                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
929                 };
930
931                 dmac2: dma-controller@e7310000 {
932                         compatible = "renesas,dmac-r8a7795",
933                                      "renesas,rcar-dmac";
934                         reg = <0 0xe7310000 0 0x10000>;
935                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
936                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
937                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
938                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
939                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
940                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
941                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
942                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
943                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
944                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
945                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
946                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
947                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
948                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
949                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
950                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
951                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
952                         interrupt-names = "error",
953                                         "ch0", "ch1", "ch2", "ch3",
954                                         "ch4", "ch5", "ch6", "ch7",
955                                         "ch8", "ch9", "ch10", "ch11",
956                                         "ch12", "ch13", "ch14", "ch15";
957                         clocks = <&cpg CPG_MOD 217>;
958                         clock-names = "fck";
959                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
960                         resets = <&cpg 217>;
961                         #dma-cells = <1>;
962                         dma-channels = <16>;
963                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
964                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
965                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
966                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
967                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
968                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
969                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
970                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
971                 };
972
973                 ipmmu_ds0: mmu@e6740000 {
974                         compatible = "renesas,ipmmu-r8a7795";
975                         reg = <0 0xe6740000 0 0x1000>;
976                         renesas,ipmmu-main = <&ipmmu_mm 0>;
977                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
978                         #iommu-cells = <1>;
979                 };
980
981                 ipmmu_ds1: mmu@e7740000 {
982                         compatible = "renesas,ipmmu-r8a7795";
983                         reg = <0 0xe7740000 0 0x1000>;
984                         renesas,ipmmu-main = <&ipmmu_mm 1>;
985                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
986                         #iommu-cells = <1>;
987                 };
988
989                 ipmmu_hc: mmu@e6570000 {
990                         compatible = "renesas,ipmmu-r8a7795";
991                         reg = <0 0xe6570000 0 0x1000>;
992                         renesas,ipmmu-main = <&ipmmu_mm 2>;
993                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
994                         #iommu-cells = <1>;
995                 };
996
997                 ipmmu_ir: mmu@ff8b0000 {
998                         compatible = "renesas,ipmmu-r8a7795";
999                         reg = <0 0xff8b0000 0 0x1000>;
1000                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1001                         power-domains = <&sysc R8A7795_PD_A3IR>;
1002                         #iommu-cells = <1>;
1003                 };
1004
1005                 ipmmu_mm: mmu@e67b0000 {
1006                         compatible = "renesas,ipmmu-r8a7795";
1007                         reg = <0 0xe67b0000 0 0x1000>;
1008                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1009                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1010                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1011                         #iommu-cells = <1>;
1012                 };
1013
1014                 ipmmu_mp0: mmu@ec670000 {
1015                         compatible = "renesas,ipmmu-r8a7795";
1016                         reg = <0 0xec670000 0 0x1000>;
1017                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1018                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1019                         #iommu-cells = <1>;
1020                 };
1021
1022                 ipmmu_pv0: mmu@fd800000 {
1023                         compatible = "renesas,ipmmu-r8a7795";
1024                         reg = <0 0xfd800000 0 0x1000>;
1025                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1026                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1027                         #iommu-cells = <1>;
1028                 };
1029
1030                 ipmmu_pv1: mmu@fd950000 {
1031                         compatible = "renesas,ipmmu-r8a7795";
1032                         reg = <0 0xfd950000 0 0x1000>;
1033                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1034                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1035                         #iommu-cells = <1>;
1036                 };
1037
1038                 ipmmu_pv2: mmu@fd960000 {
1039                         compatible = "renesas,ipmmu-r8a7795";
1040                         reg = <0 0xfd960000 0 0x1000>;
1041                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1042                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1043                         #iommu-cells = <1>;
1044                 };
1045
1046                 ipmmu_pv3: mmu@fd970000 {
1047                         compatible = "renesas,ipmmu-r8a7795";
1048                         reg = <0 0xfd970000 0 0x1000>;
1049                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1050                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1051                         #iommu-cells = <1>;
1052                 };
1053
1054                 ipmmu_rt: mmu@ffc80000 {
1055                         compatible = "renesas,ipmmu-r8a7795";
1056                         reg = <0 0xffc80000 0 0x1000>;
1057                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1058                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1059                         #iommu-cells = <1>;
1060                 };
1061
1062                 ipmmu_vc0: mmu@fe6b0000 {
1063                         compatible = "renesas,ipmmu-r8a7795";
1064                         reg = <0 0xfe6b0000 0 0x1000>;
1065                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1066                         power-domains = <&sysc R8A7795_PD_A3VC>;
1067                         #iommu-cells = <1>;
1068                 };
1069
1070                 ipmmu_vc1: mmu@fe6f0000 {
1071                         compatible = "renesas,ipmmu-r8a7795";
1072                         reg = <0 0xfe6f0000 0 0x1000>;
1073                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1074                         power-domains = <&sysc R8A7795_PD_A3VC>;
1075                         #iommu-cells = <1>;
1076                 };
1077
1078                 ipmmu_vi0: mmu@febd0000 {
1079                         compatible = "renesas,ipmmu-r8a7795";
1080                         reg = <0 0xfebd0000 0 0x1000>;
1081                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1082                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1083                         #iommu-cells = <1>;
1084                 };
1085
1086                 ipmmu_vi1: mmu@febe0000 {
1087                         compatible = "renesas,ipmmu-r8a7795";
1088                         reg = <0 0xfebe0000 0 0x1000>;
1089                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1090                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1091                         #iommu-cells = <1>;
1092                 };
1093
1094                 ipmmu_vp0: mmu@fe990000 {
1095                         compatible = "renesas,ipmmu-r8a7795";
1096                         reg = <0 0xfe990000 0 0x1000>;
1097                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1098                         power-domains = <&sysc R8A7795_PD_A3VP>;
1099                         #iommu-cells = <1>;
1100                 };
1101
1102                 ipmmu_vp1: mmu@fe980000 {
1103                         compatible = "renesas,ipmmu-r8a7795";
1104                         reg = <0 0xfe980000 0 0x1000>;
1105                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1106                         power-domains = <&sysc R8A7795_PD_A3VP>;
1107                         #iommu-cells = <1>;
1108                 };
1109
1110                 avb: ethernet@e6800000 {
1111                         compatible = "renesas,etheravb-r8a7795",
1112                                      "renesas,etheravb-rcar-gen3";
1113                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1114                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1115                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1116                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1117                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1118                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1119                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1120                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1121                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1122                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1123                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1124                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1125                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1126                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1127                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1128                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1129                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1130                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1131                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1132                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1133                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1134                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1135                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1136                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1137                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1138                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1139                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1140                                           "ch4", "ch5", "ch6", "ch7",
1141                                           "ch8", "ch9", "ch10", "ch11",
1142                                           "ch12", "ch13", "ch14", "ch15",
1143                                           "ch16", "ch17", "ch18", "ch19",
1144                                           "ch20", "ch21", "ch22", "ch23",
1145                                           "ch24";
1146                         clocks = <&cpg CPG_MOD 812>;
1147                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1148                         resets = <&cpg 812>;
1149                         phy-mode = "rgmii";
1150                         iommus = <&ipmmu_ds0 16>;
1151                         #address-cells = <1>;
1152                         #size-cells = <0>;
1153                         status = "disabled";
1154                 };
1155
1156                 can0: can@e6c30000 {
1157                         compatible = "renesas,can-r8a7795",
1158                                      "renesas,rcar-gen3-can";
1159                         reg = <0 0xe6c30000 0 0x1000>;
1160                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1161                         clocks = <&cpg CPG_MOD 916>,
1162                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1163                                <&can_clk>;
1164                         clock-names = "clkp1", "clkp2", "can_clk";
1165                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1166                         assigned-clock-rates = <40000000>;
1167                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1168                         resets = <&cpg 916>;
1169                         status = "disabled";
1170                 };
1171
1172                 can1: can@e6c38000 {
1173                         compatible = "renesas,can-r8a7795",
1174                                      "renesas,rcar-gen3-can";
1175                         reg = <0 0xe6c38000 0 0x1000>;
1176                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1177                         clocks = <&cpg CPG_MOD 915>,
1178                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1179                                <&can_clk>;
1180                         clock-names = "clkp1", "clkp2", "can_clk";
1181                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1182                         assigned-clock-rates = <40000000>;
1183                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1184                         resets = <&cpg 915>;
1185                         status = "disabled";
1186                 };
1187
1188                 canfd: can@e66c0000 {
1189                         compatible = "renesas,r8a7795-canfd",
1190                                      "renesas,rcar-gen3-canfd";
1191                         reg = <0 0xe66c0000 0 0x8000>;
1192                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1193                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1194                         clocks = <&cpg CPG_MOD 914>,
1195                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1196                                <&can_clk>;
1197                         clock-names = "fck", "canfd", "can_clk";
1198                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1199                         assigned-clock-rates = <40000000>;
1200                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1201                         resets = <&cpg 914>;
1202                         status = "disabled";
1203
1204                         channel0 {
1205                                 status = "disabled";
1206                         };
1207
1208                         channel1 {
1209                                 status = "disabled";
1210                         };
1211                 };
1212
1213                 pwm0: pwm@e6e30000 {
1214                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1215                         reg = <0 0xe6e30000 0 0x8>;
1216                         clocks = <&cpg CPG_MOD 523>;
1217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1218                         resets = <&cpg 523>;
1219                         #pwm-cells = <2>;
1220                         status = "disabled";
1221                 };
1222
1223                 pwm1: pwm@e6e31000 {
1224                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1225                         reg = <0 0xe6e31000 0 0x8>;
1226                         clocks = <&cpg CPG_MOD 523>;
1227                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1228                         resets = <&cpg 523>;
1229                         #pwm-cells = <2>;
1230                         status = "disabled";
1231                 };
1232
1233                 pwm2: pwm@e6e32000 {
1234                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1235                         reg = <0 0xe6e32000 0 0x8>;
1236                         clocks = <&cpg CPG_MOD 523>;
1237                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1238                         resets = <&cpg 523>;
1239                         #pwm-cells = <2>;
1240                         status = "disabled";
1241                 };
1242
1243                 pwm3: pwm@e6e33000 {
1244                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1245                         reg = <0 0xe6e33000 0 0x8>;
1246                         clocks = <&cpg CPG_MOD 523>;
1247                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1248                         resets = <&cpg 523>;
1249                         #pwm-cells = <2>;
1250                         status = "disabled";
1251                 };
1252
1253                 pwm4: pwm@e6e34000 {
1254                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1255                         reg = <0 0xe6e34000 0 0x8>;
1256                         clocks = <&cpg CPG_MOD 523>;
1257                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1258                         resets = <&cpg 523>;
1259                         #pwm-cells = <2>;
1260                         status = "disabled";
1261                 };
1262
1263                 pwm5: pwm@e6e35000 {
1264                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1265                         reg = <0 0xe6e35000 0 0x8>;
1266                         clocks = <&cpg CPG_MOD 523>;
1267                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1268                         resets = <&cpg 523>;
1269                         #pwm-cells = <2>;
1270                         status = "disabled";
1271                 };
1272
1273                 pwm6: pwm@e6e36000 {
1274                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1275                         reg = <0 0xe6e36000 0 0x8>;
1276                         clocks = <&cpg CPG_MOD 523>;
1277                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1278                         resets = <&cpg 523>;
1279                         #pwm-cells = <2>;
1280                         status = "disabled";
1281                 };
1282
1283                 scif0: serial@e6e60000 {
1284                         compatible = "renesas,scif-r8a7795",
1285                                      "renesas,rcar-gen3-scif", "renesas,scif";
1286                         reg = <0 0xe6e60000 0 64>;
1287                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1288                         clocks = <&cpg CPG_MOD 207>,
1289                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1290                                  <&scif_clk>;
1291                         clock-names = "fck", "brg_int", "scif_clk";
1292                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1293                                <&dmac2 0x51>, <&dmac2 0x50>;
1294                         dma-names = "tx", "rx", "tx", "rx";
1295                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1296                         resets = <&cpg 207>;
1297                         status = "disabled";
1298                 };
1299
1300                 scif1: serial@e6e68000 {
1301                         compatible = "renesas,scif-r8a7795",
1302                                      "renesas,rcar-gen3-scif", "renesas,scif";
1303                         reg = <0 0xe6e68000 0 64>;
1304                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1305                         clocks = <&cpg CPG_MOD 206>,
1306                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1307                                  <&scif_clk>;
1308                         clock-names = "fck", "brg_int", "scif_clk";
1309                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1310                                <&dmac2 0x53>, <&dmac2 0x52>;
1311                         dma-names = "tx", "rx", "tx", "rx";
1312                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1313                         resets = <&cpg 206>;
1314                         status = "disabled";
1315                 };
1316
1317                 scif2: serial@e6e88000 {
1318                         compatible = "renesas,scif-r8a7795",
1319                                      "renesas,rcar-gen3-scif", "renesas,scif";
1320                         reg = <0 0xe6e88000 0 64>;
1321                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1322                         clocks = <&cpg CPG_MOD 310>,
1323                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1324                                  <&scif_clk>;
1325                         clock-names = "fck", "brg_int", "scif_clk";
1326                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1327                                <&dmac2 0x13>, <&dmac2 0x12>;
1328                         dma-names = "tx", "rx", "tx", "rx";
1329                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1330                         resets = <&cpg 310>;
1331                         status = "disabled";
1332                 };
1333
1334                 scif3: serial@e6c50000 {
1335                         compatible = "renesas,scif-r8a7795",
1336                                      "renesas,rcar-gen3-scif", "renesas,scif";
1337                         reg = <0 0xe6c50000 0 64>;
1338                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1339                         clocks = <&cpg CPG_MOD 204>,
1340                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1341                                  <&scif_clk>;
1342                         clock-names = "fck", "brg_int", "scif_clk";
1343                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1344                         dma-names = "tx", "rx";
1345                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1346                         resets = <&cpg 204>;
1347                         status = "disabled";
1348                 };
1349
1350                 scif4: serial@e6c40000 {
1351                         compatible = "renesas,scif-r8a7795",
1352                                      "renesas,rcar-gen3-scif", "renesas,scif";
1353                         reg = <0 0xe6c40000 0 64>;
1354                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1355                         clocks = <&cpg CPG_MOD 203>,
1356                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1357                                  <&scif_clk>;
1358                         clock-names = "fck", "brg_int", "scif_clk";
1359                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1360                         dma-names = "tx", "rx";
1361                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1362                         resets = <&cpg 203>;
1363                         status = "disabled";
1364                 };
1365
1366                 scif5: serial@e6f30000 {
1367                         compatible = "renesas,scif-r8a7795",
1368                                      "renesas,rcar-gen3-scif", "renesas,scif";
1369                         reg = <0 0xe6f30000 0 64>;
1370                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1371                         clocks = <&cpg CPG_MOD 202>,
1372                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1373                                  <&scif_clk>;
1374                         clock-names = "fck", "brg_int", "scif_clk";
1375                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1376                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1377                         dma-names = "tx", "rx", "tx", "rx";
1378                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1379                         resets = <&cpg 202>;
1380                         status = "disabled";
1381                 };
1382
1383                 msiof0: spi@e6e90000 {
1384                         compatible = "renesas,msiof-r8a7795",
1385                                      "renesas,rcar-gen3-msiof";
1386                         reg = <0 0xe6e90000 0 0x0064>;
1387                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1388                         clocks = <&cpg CPG_MOD 211>;
1389                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1390                                <&dmac2 0x41>, <&dmac2 0x40>;
1391                         dma-names = "tx", "rx", "tx", "rx";
1392                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1393                         resets = <&cpg 211>;
1394                         #address-cells = <1>;
1395                         #size-cells = <0>;
1396                         status = "disabled";
1397                 };
1398
1399                 msiof1: spi@e6ea0000 {
1400                         compatible = "renesas,msiof-r8a7795",
1401                                      "renesas,rcar-gen3-msiof";
1402                         reg = <0 0xe6ea0000 0 0x0064>;
1403                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1404                         clocks = <&cpg CPG_MOD 210>;
1405                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1406                                <&dmac2 0x43>, <&dmac2 0x42>;
1407                         dma-names = "tx", "rx", "tx", "rx";
1408                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1409                         resets = <&cpg 210>;
1410                         #address-cells = <1>;
1411                         #size-cells = <0>;
1412                         status = "disabled";
1413                 };
1414
1415                 msiof2: spi@e6c00000 {
1416                         compatible = "renesas,msiof-r8a7795",
1417                                      "renesas,rcar-gen3-msiof";
1418                         reg = <0 0xe6c00000 0 0x0064>;
1419                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1420                         clocks = <&cpg CPG_MOD 209>;
1421                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1422                         dma-names = "tx", "rx";
1423                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1424                         resets = <&cpg 209>;
1425                         #address-cells = <1>;
1426                         #size-cells = <0>;
1427                         status = "disabled";
1428                 };
1429
1430                 msiof3: spi@e6c10000 {
1431                         compatible = "renesas,msiof-r8a7795",
1432                                      "renesas,rcar-gen3-msiof";
1433                         reg = <0 0xe6c10000 0 0x0064>;
1434                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1435                         clocks = <&cpg CPG_MOD 208>;
1436                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1437                         dma-names = "tx", "rx";
1438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1439                         resets = <&cpg 208>;
1440                         #address-cells = <1>;
1441                         #size-cells = <0>;
1442                         status = "disabled";
1443                 };
1444
1445                 vin0: video@e6ef0000 {
1446                         compatible = "renesas,vin-r8a7795";
1447                         reg = <0 0xe6ef0000 0 0x1000>;
1448                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1449                         clocks = <&cpg CPG_MOD 811>;
1450                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1451                         resets = <&cpg 811>;
1452                         renesas,id = <0>;
1453                         status = "disabled";
1454
1455                         ports {
1456                                 #address-cells = <1>;
1457                                 #size-cells = <0>;
1458
1459                                 port@1 {
1460                                         #address-cells = <1>;
1461                                         #size-cells = <0>;
1462
1463                                         reg = <1>;
1464
1465                                         vin0csi20: endpoint@0 {
1466                                                 reg = <0>;
1467                                                 remote-endpoint = <&csi20vin0>;
1468                                         };
1469                                         vin0csi40: endpoint@2 {
1470                                                 reg = <2>;
1471                                                 remote-endpoint = <&csi40vin0>;
1472                                         };
1473                                 };
1474                         };
1475                 };
1476
1477                 vin1: video@e6ef1000 {
1478                         compatible = "renesas,vin-r8a7795";
1479                         reg = <0 0xe6ef1000 0 0x1000>;
1480                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1481                         clocks = <&cpg CPG_MOD 810>;
1482                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1483                         resets = <&cpg 810>;
1484                         renesas,id = <1>;
1485                         status = "disabled";
1486
1487                         ports {
1488                                 #address-cells = <1>;
1489                                 #size-cells = <0>;
1490
1491                                 port@1 {
1492                                         #address-cells = <1>;
1493                                         #size-cells = <0>;
1494
1495                                         reg = <1>;
1496
1497                                         vin1csi20: endpoint@0 {
1498                                                 reg = <0>;
1499                                                 remote-endpoint = <&csi20vin1>;
1500                                         };
1501                                         vin1csi40: endpoint@2 {
1502                                                 reg = <2>;
1503                                                 remote-endpoint = <&csi40vin1>;
1504                                         };
1505                                 };
1506                         };
1507                 };
1508
1509                 vin2: video@e6ef2000 {
1510                         compatible = "renesas,vin-r8a7795";
1511                         reg = <0 0xe6ef2000 0 0x1000>;
1512                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1513                         clocks = <&cpg CPG_MOD 809>;
1514                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1515                         resets = <&cpg 809>;
1516                         renesas,id = <2>;
1517                         status = "disabled";
1518
1519                         ports {
1520                                 #address-cells = <1>;
1521                                 #size-cells = <0>;
1522
1523                                 port@1 {
1524                                         #address-cells = <1>;
1525                                         #size-cells = <0>;
1526
1527                                         reg = <1>;
1528
1529                                         vin2csi20: endpoint@0 {
1530                                                 reg = <0>;
1531                                                 remote-endpoint = <&csi20vin2>;
1532                                         };
1533                                         vin2csi40: endpoint@2 {
1534                                                 reg = <2>;
1535                                                 remote-endpoint = <&csi40vin2>;
1536                                         };
1537                                 };
1538                         };
1539                 };
1540
1541                 vin3: video@e6ef3000 {
1542                         compatible = "renesas,vin-r8a7795";
1543                         reg = <0 0xe6ef3000 0 0x1000>;
1544                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1545                         clocks = <&cpg CPG_MOD 808>;
1546                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1547                         resets = <&cpg 808>;
1548                         renesas,id = <3>;
1549                         status = "disabled";
1550
1551                         ports {
1552                                 #address-cells = <1>;
1553                                 #size-cells = <0>;
1554
1555                                 port@1 {
1556                                         #address-cells = <1>;
1557                                         #size-cells = <0>;
1558
1559                                         reg = <1>;
1560
1561                                         vin3csi20: endpoint@0 {
1562                                                 reg = <0>;
1563                                                 remote-endpoint = <&csi20vin3>;
1564                                         };
1565                                         vin3csi40: endpoint@2 {
1566                                                 reg = <2>;
1567                                                 remote-endpoint = <&csi40vin3>;
1568                                         };
1569                                 };
1570                         };
1571                 };
1572
1573                 vin4: video@e6ef4000 {
1574                         compatible = "renesas,vin-r8a7795";
1575                         reg = <0 0xe6ef4000 0 0x1000>;
1576                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1577                         clocks = <&cpg CPG_MOD 807>;
1578                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1579                         resets = <&cpg 807>;
1580                         renesas,id = <4>;
1581                         status = "disabled";
1582
1583                         ports {
1584                                 #address-cells = <1>;
1585                                 #size-cells = <0>;
1586
1587                                 port@1 {
1588                                         #address-cells = <1>;
1589                                         #size-cells = <0>;
1590
1591                                         reg = <1>;
1592
1593                                         vin4csi20: endpoint@0 {
1594                                                 reg = <0>;
1595                                                 remote-endpoint = <&csi20vin4>;
1596                                         };
1597                                         vin4csi41: endpoint@3 {
1598                                                 reg = <3>;
1599                                                 remote-endpoint = <&csi41vin4>;
1600                                         };
1601                                 };
1602                         };
1603                 };
1604
1605                 vin5: video@e6ef5000 {
1606                         compatible = "renesas,vin-r8a7795";
1607                         reg = <0 0xe6ef5000 0 0x1000>;
1608                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1609                         clocks = <&cpg CPG_MOD 806>;
1610                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1611                         resets = <&cpg 806>;
1612                         renesas,id = <5>;
1613                         status = "disabled";
1614
1615                         ports {
1616                                 #address-cells = <1>;
1617                                 #size-cells = <0>;
1618
1619                                 port@1 {
1620                                         #address-cells = <1>;
1621                                         #size-cells = <0>;
1622
1623                                         reg = <1>;
1624
1625                                         vin5csi20: endpoint@0 {
1626                                                 reg = <0>;
1627                                                 remote-endpoint = <&csi20vin5>;
1628                                         };
1629                                         vin5csi41: endpoint@3 {
1630                                                 reg = <3>;
1631                                                 remote-endpoint = <&csi41vin5>;
1632                                         };
1633                                 };
1634                         };
1635                 };
1636
1637                 vin6: video@e6ef6000 {
1638                         compatible = "renesas,vin-r8a7795";
1639                         reg = <0 0xe6ef6000 0 0x1000>;
1640                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1641                         clocks = <&cpg CPG_MOD 805>;
1642                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1643                         resets = <&cpg 805>;
1644                         renesas,id = <6>;
1645                         status = "disabled";
1646
1647                         ports {
1648                                 #address-cells = <1>;
1649                                 #size-cells = <0>;
1650
1651                                 port@1 {
1652                                         #address-cells = <1>;
1653                                         #size-cells = <0>;
1654
1655                                         reg = <1>;
1656
1657                                         vin6csi20: endpoint@0 {
1658                                                 reg = <0>;
1659                                                 remote-endpoint = <&csi20vin6>;
1660                                         };
1661                                         vin6csi41: endpoint@3 {
1662                                                 reg = <3>;
1663                                                 remote-endpoint = <&csi41vin6>;
1664                                         };
1665                                 };
1666                         };
1667                 };
1668
1669                 vin7: video@e6ef7000 {
1670                         compatible = "renesas,vin-r8a7795";
1671                         reg = <0 0xe6ef7000 0 0x1000>;
1672                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1673                         clocks = <&cpg CPG_MOD 804>;
1674                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1675                         resets = <&cpg 804>;
1676                         renesas,id = <7>;
1677                         status = "disabled";
1678
1679                         ports {
1680                                 #address-cells = <1>;
1681                                 #size-cells = <0>;
1682
1683                                 port@1 {
1684                                         #address-cells = <1>;
1685                                         #size-cells = <0>;
1686
1687                                         reg = <1>;
1688
1689                                         vin7csi20: endpoint@0 {
1690                                                 reg = <0>;
1691                                                 remote-endpoint = <&csi20vin7>;
1692                                         };
1693                                         vin7csi41: endpoint@3 {
1694                                                 reg = <3>;
1695                                                 remote-endpoint = <&csi41vin7>;
1696                                         };
1697                                 };
1698                         };
1699                 };
1700
1701                 drif00: rif@e6f40000 {
1702                         compatible = "renesas,r8a7795-drif",
1703                                      "renesas,rcar-gen3-drif";
1704                         reg = <0 0xe6f40000 0 0x64>;
1705                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 515>;
1707                         clock-names = "fck";
1708                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1709                         dma-names = "rx", "rx";
1710                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1711                         resets = <&cpg 515>;
1712                         renesas,bonding = <&drif01>;
1713                         status = "disabled";
1714                 };
1715
1716                 drif01: rif@e6f50000 {
1717                         compatible = "renesas,r8a7795-drif",
1718                                      "renesas,rcar-gen3-drif";
1719                         reg = <0 0xe6f50000 0 0x64>;
1720                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1721                         clocks = <&cpg CPG_MOD 514>;
1722                         clock-names = "fck";
1723                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1724                         dma-names = "rx", "rx";
1725                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1726                         resets = <&cpg 514>;
1727                         renesas,bonding = <&drif00>;
1728                         status = "disabled";
1729                 };
1730
1731                 drif10: rif@e6f60000 {
1732                         compatible = "renesas,r8a7795-drif",
1733                                      "renesas,rcar-gen3-drif";
1734                         reg = <0 0xe6f60000 0 0x64>;
1735                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1736                         clocks = <&cpg CPG_MOD 513>;
1737                         clock-names = "fck";
1738                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1739                         dma-names = "rx", "rx";
1740                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1741                         resets = <&cpg 513>;
1742                         renesas,bonding = <&drif11>;
1743                         status = "disabled";
1744                 };
1745
1746                 drif11: rif@e6f70000 {
1747                         compatible = "renesas,r8a7795-drif",
1748                                      "renesas,rcar-gen3-drif";
1749                         reg = <0 0xe6f70000 0 0x64>;
1750                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1751                         clocks = <&cpg CPG_MOD 512>;
1752                         clock-names = "fck";
1753                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1754                         dma-names = "rx", "rx";
1755                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1756                         resets = <&cpg 512>;
1757                         renesas,bonding = <&drif10>;
1758                         status = "disabled";
1759                 };
1760
1761                 drif20: rif@e6f80000 {
1762                         compatible = "renesas,r8a7795-drif",
1763                                      "renesas,rcar-gen3-drif";
1764                         reg = <0 0xe6f80000 0 0x64>;
1765                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1766                         clocks = <&cpg CPG_MOD 511>;
1767                         clock-names = "fck";
1768                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1769                         dma-names = "rx", "rx";
1770                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1771                         resets = <&cpg 511>;
1772                         renesas,bonding = <&drif21>;
1773                         status = "disabled";
1774                 };
1775
1776                 drif21: rif@e6f90000 {
1777                         compatible = "renesas,r8a7795-drif",
1778                                      "renesas,rcar-gen3-drif";
1779                         reg = <0 0xe6f90000 0 0x64>;
1780                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1781                         clocks = <&cpg CPG_MOD 510>;
1782                         clock-names = "fck";
1783                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1784                         dma-names = "rx", "rx";
1785                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1786                         resets = <&cpg 510>;
1787                         renesas,bonding = <&drif20>;
1788                         status = "disabled";
1789                 };
1790
1791                 drif30: rif@e6fa0000 {
1792                         compatible = "renesas,r8a7795-drif",
1793                                      "renesas,rcar-gen3-drif";
1794                         reg = <0 0xe6fa0000 0 0x64>;
1795                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1796                         clocks = <&cpg CPG_MOD 509>;
1797                         clock-names = "fck";
1798                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1799                         dma-names = "rx", "rx";
1800                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1801                         resets = <&cpg 509>;
1802                         renesas,bonding = <&drif31>;
1803                         status = "disabled";
1804                 };
1805
1806                 drif31: rif@e6fb0000 {
1807                         compatible = "renesas,r8a7795-drif",
1808                                      "renesas,rcar-gen3-drif";
1809                         reg = <0 0xe6fb0000 0 0x64>;
1810                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1811                         clocks = <&cpg CPG_MOD 508>;
1812                         clock-names = "fck";
1813                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1814                         dma-names = "rx", "rx";
1815                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1816                         resets = <&cpg 508>;
1817                         renesas,bonding = <&drif30>;
1818                         status = "disabled";
1819                 };
1820
1821                 rcar_sound: sound@ec500000 {
1822                         /*
1823                          * #sound-dai-cells is required
1824                          *
1825                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1826                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1827                          */
1828                         /*
1829                          * #clock-cells is required for audio_clkout0/1/2/3
1830                          *
1831                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1832                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1833                          */
1834                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1835                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1836                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1837                                 <0 0xec540000 0 0x1000>, /* SSIU */
1838                                 <0 0xec541000 0 0x280>,  /* SSI */
1839                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1840                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1841
1842                         clocks = <&cpg CPG_MOD 1005>,
1843                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1844                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1845                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1846                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1847                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1848                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1849                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1850                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1851                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1852                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1853                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1854                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1855                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1856                                  <&audio_clk_a>, <&audio_clk_b>,
1857                                  <&audio_clk_c>,
1858                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1859                         clock-names = "ssi-all",
1860                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1861                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1862                                       "ssi.1", "ssi.0",
1863                                       "src.9", "src.8", "src.7", "src.6",
1864                                       "src.5", "src.4", "src.3", "src.2",
1865                                       "src.1", "src.0",
1866                                       "mix.1", "mix.0",
1867                                       "ctu.1", "ctu.0",
1868                                       "dvc.0", "dvc.1",
1869                                       "clk_a", "clk_b", "clk_c", "clk_i";
1870                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1871                         resets = <&cpg 1005>,
1872                                  <&cpg 1006>, <&cpg 1007>,
1873                                  <&cpg 1008>, <&cpg 1009>,
1874                                  <&cpg 1010>, <&cpg 1011>,
1875                                  <&cpg 1012>, <&cpg 1013>,
1876                                  <&cpg 1014>, <&cpg 1015>;
1877                         reset-names = "ssi-all",
1878                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1879                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1880                                       "ssi.1", "ssi.0";
1881                         status = "disabled";
1882
1883                         rcar_sound,dvc {
1884                                 dvc0: dvc-0 {
1885                                         dmas = <&audma1 0xbc>;
1886                                         dma-names = "tx";
1887                                 };
1888                                 dvc1: dvc-1 {
1889                                         dmas = <&audma1 0xbe>;
1890                                         dma-names = "tx";
1891                                 };
1892                         };
1893
1894                         rcar_sound,mix {
1895                                 mix0: mix-0 { };
1896                                 mix1: mix-1 { };
1897                         };
1898
1899                         rcar_sound,ctu {
1900                                 ctu00: ctu-0 { };
1901                                 ctu01: ctu-1 { };
1902                                 ctu02: ctu-2 { };
1903                                 ctu03: ctu-3 { };
1904                                 ctu10: ctu-4 { };
1905                                 ctu11: ctu-5 { };
1906                                 ctu12: ctu-6 { };
1907                                 ctu13: ctu-7 { };
1908                         };
1909
1910                         rcar_sound,src {
1911                                 src0: src-0 {
1912                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1913                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1914                                         dma-names = "rx", "tx";
1915                                 };
1916                                 src1: src-1 {
1917                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1918                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1919                                         dma-names = "rx", "tx";
1920                                 };
1921                                 src2: src-2 {
1922                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1923                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1924                                         dma-names = "rx", "tx";
1925                                 };
1926                                 src3: src-3 {
1927                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1928                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1929                                         dma-names = "rx", "tx";
1930                                 };
1931                                 src4: src-4 {
1932                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1933                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1934                                         dma-names = "rx", "tx";
1935                                 };
1936                                 src5: src-5 {
1937                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1938                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1939                                         dma-names = "rx", "tx";
1940                                 };
1941                                 src6: src-6 {
1942                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1943                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1944                                         dma-names = "rx", "tx";
1945                                 };
1946                                 src7: src-7 {
1947                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1948                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1949                                         dma-names = "rx", "tx";
1950                                 };
1951                                 src8: src-8 {
1952                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1953                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1954                                         dma-names = "rx", "tx";
1955                                 };
1956                                 src9: src-9 {
1957                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1958                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1959                                         dma-names = "rx", "tx";
1960                                 };
1961                         };
1962
1963                         rcar_sound,ssiu {
1964                                 ssiu00: ssiu-0 {
1965                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1966                                         dma-names = "rx", "tx";
1967                                 };
1968                                 ssiu01: ssiu-1 {
1969                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1970                                         dma-names = "rx", "tx";
1971                                 };
1972                                 ssiu02: ssiu-2 {
1973                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1974                                         dma-names = "rx", "tx";
1975                                 };
1976                                 ssiu03: ssiu-3 {
1977                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1978                                         dma-names = "rx", "tx";
1979                                 };
1980                                 ssiu04: ssiu-4 {
1981                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1982                                         dma-names = "rx", "tx";
1983                                 };
1984                                 ssiu05: ssiu-5 {
1985                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1986                                         dma-names = "rx", "tx";
1987                                 };
1988                                 ssiu06: ssiu-6 {
1989                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1990                                         dma-names = "rx", "tx";
1991                                 };
1992                                 ssiu07: ssiu-7 {
1993                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1994                                         dma-names = "rx", "tx";
1995                                 };
1996                                 ssiu10: ssiu-8 {
1997                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1998                                         dma-names = "rx", "tx";
1999                                 };
2000                                 ssiu11: ssiu-9 {
2001                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2002                                         dma-names = "rx", "tx";
2003                                 };
2004                                 ssiu12: ssiu-10 {
2005                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2006                                         dma-names = "rx", "tx";
2007                                 };
2008                                 ssiu13: ssiu-11 {
2009                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2010                                         dma-names = "rx", "tx";
2011                                 };
2012                                 ssiu14: ssiu-12 {
2013                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2014                                         dma-names = "rx", "tx";
2015                                 };
2016                                 ssiu15: ssiu-13 {
2017                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2018                                         dma-names = "rx", "tx";
2019                                 };
2020                                 ssiu16: ssiu-14 {
2021                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2022                                         dma-names = "rx", "tx";
2023                                 };
2024                                 ssiu17: ssiu-15 {
2025                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2026                                         dma-names = "rx", "tx";
2027                                 };
2028                                 ssiu20: ssiu-16 {
2029                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2030                                         dma-names = "rx", "tx";
2031                                 };
2032                                 ssiu21: ssiu-17 {
2033                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2034                                         dma-names = "rx", "tx";
2035                                 };
2036                                 ssiu22: ssiu-18 {
2037                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2038                                         dma-names = "rx", "tx";
2039                                 };
2040                                 ssiu23: ssiu-19 {
2041                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2042                                         dma-names = "rx", "tx";
2043                                 };
2044                                 ssiu24: ssiu-20 {
2045                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2046                                         dma-names = "rx", "tx";
2047                                 };
2048                                 ssiu25: ssiu-21 {
2049                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2050                                         dma-names = "rx", "tx";
2051                                 };
2052                                 ssiu26: ssiu-22 {
2053                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2054                                         dma-names = "rx", "tx";
2055                                 };
2056                                 ssiu27: ssiu-23 {
2057                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2058                                         dma-names = "rx", "tx";
2059                                 };
2060                                 ssiu30: ssiu-24 {
2061                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2062                                         dma-names = "rx", "tx";
2063                                 };
2064                                 ssiu31: ssiu-25 {
2065                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2066                                         dma-names = "rx", "tx";
2067                                 };
2068                                 ssiu32: ssiu-26 {
2069                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2070                                         dma-names = "rx", "tx";
2071                                 };
2072                                 ssiu33: ssiu-27 {
2073                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2074                                         dma-names = "rx", "tx";
2075                                 };
2076                                 ssiu34: ssiu-28 {
2077                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2078                                         dma-names = "rx", "tx";
2079                                 };
2080                                 ssiu35: ssiu-29 {
2081                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2082                                         dma-names = "rx", "tx";
2083                                 };
2084                                 ssiu36: ssiu-30 {
2085                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2086                                         dma-names = "rx", "tx";
2087                                 };
2088                                 ssiu37: ssiu-31 {
2089                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2090                                         dma-names = "rx", "tx";
2091                                 };
2092                                 ssiu40: ssiu-32 {
2093                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2094                                         dma-names = "rx", "tx";
2095                                 };
2096                                 ssiu41: ssiu-33 {
2097                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2098                                         dma-names = "rx", "tx";
2099                                 };
2100                                 ssiu42: ssiu-34 {
2101                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2102                                         dma-names = "rx", "tx";
2103                                 };
2104                                 ssiu43: ssiu-35 {
2105                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2106                                         dma-names = "rx", "tx";
2107                                 };
2108                                 ssiu44: ssiu-36 {
2109                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2110                                         dma-names = "rx", "tx";
2111                                 };
2112                                 ssiu45: ssiu-37 {
2113                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2114                                         dma-names = "rx", "tx";
2115                                 };
2116                                 ssiu46: ssiu-38 {
2117                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2118                                         dma-names = "rx", "tx";
2119                                 };
2120                                 ssiu47: ssiu-39 {
2121                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2122                                         dma-names = "rx", "tx";
2123                                 };
2124                                 ssiu50: ssiu-40 {
2125                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2126                                         dma-names = "rx", "tx";
2127                                 };
2128                                 ssiu60: ssiu-41 {
2129                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2130                                         dma-names = "rx", "tx";
2131                                 };
2132                                 ssiu70: ssiu-42 {
2133                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2134                                         dma-names = "rx", "tx";
2135                                 };
2136                                 ssiu80: ssiu-43 {
2137                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2138                                         dma-names = "rx", "tx";
2139                                 };
2140                                 ssiu90: ssiu-44 {
2141                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2142                                         dma-names = "rx", "tx";
2143                                 };
2144                                 ssiu91: ssiu-45 {
2145                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2146                                         dma-names = "rx", "tx";
2147                                 };
2148                                 ssiu92: ssiu-46 {
2149                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2150                                         dma-names = "rx", "tx";
2151                                 };
2152                                 ssiu93: ssiu-47 {
2153                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2154                                         dma-names = "rx", "tx";
2155                                 };
2156                                 ssiu94: ssiu-48 {
2157                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2158                                         dma-names = "rx", "tx";
2159                                 };
2160                                 ssiu95: ssiu-49 {
2161                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2162                                         dma-names = "rx", "tx";
2163                                 };
2164                                 ssiu96: ssiu-50 {
2165                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2166                                         dma-names = "rx", "tx";
2167                                 };
2168                                 ssiu97: ssiu-51 {
2169                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2170                                         dma-names = "rx", "tx";
2171                                 };
2172                         };
2173
2174                         rcar_sound,ssi {
2175                                 ssi0: ssi-0 {
2176                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2177                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2178                                         dma-names = "rx", "tx";
2179                                 };
2180                                 ssi1: ssi-1 {
2181                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2182                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2183                                         dma-names = "rx", "tx";
2184                                 };
2185                                 ssi2: ssi-2 {
2186                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2187                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2188                                         dma-names = "rx", "tx";
2189                                 };
2190                                 ssi3: ssi-3 {
2191                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2192                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2193                                         dma-names = "rx", "tx";
2194                                 };
2195                                 ssi4: ssi-4 {
2196                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2197                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2198                                         dma-names = "rx", "tx";
2199                                 };
2200                                 ssi5: ssi-5 {
2201                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2202                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2203                                         dma-names = "rx", "tx";
2204                                 };
2205                                 ssi6: ssi-6 {
2206                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2207                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2208                                         dma-names = "rx", "tx";
2209                                 };
2210                                 ssi7: ssi-7 {
2211                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2212                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2213                                         dma-names = "rx", "tx";
2214                                 };
2215                                 ssi8: ssi-8 {
2216                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2217                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2218                                         dma-names = "rx", "tx";
2219                                 };
2220                                 ssi9: ssi-9 {
2221                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2222                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2223                                         dma-names = "rx", "tx";
2224                                 };
2225                         };
2226                 };
2227
2228                 audma0: dma-controller@ec700000 {
2229                         compatible = "renesas,dmac-r8a7795",
2230                                      "renesas,rcar-dmac";
2231                         reg = <0 0xec700000 0 0x10000>;
2232                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2233                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
2234                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
2235                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
2236                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2237                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2238                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2239                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2240                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2241                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2242                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2243                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2244                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2245                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2246                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2247                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2248                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2249                         interrupt-names = "error",
2250                                         "ch0", "ch1", "ch2", "ch3",
2251                                         "ch4", "ch5", "ch6", "ch7",
2252                                         "ch8", "ch9", "ch10", "ch11",
2253                                         "ch12", "ch13", "ch14", "ch15";
2254                         clocks = <&cpg CPG_MOD 502>;
2255                         clock-names = "fck";
2256                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2257                         resets = <&cpg 502>;
2258                         #dma-cells = <1>;
2259                         dma-channels = <16>;
2260                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2261                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2262                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2263                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2264                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2265                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2266                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2267                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2268                 };
2269
2270                 audma1: dma-controller@ec720000 {
2271                         compatible = "renesas,dmac-r8a7795",
2272                                      "renesas,rcar-dmac";
2273                         reg = <0 0xec720000 0 0x10000>;
2274                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2275                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2276                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2277                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2278                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2279                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2280                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2281                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2282                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2283                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2284                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2285                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2286                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2287                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2288                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2289                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2290                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2291                         interrupt-names = "error",
2292                                         "ch0", "ch1", "ch2", "ch3",
2293                                         "ch4", "ch5", "ch6", "ch7",
2294                                         "ch8", "ch9", "ch10", "ch11",
2295                                         "ch12", "ch13", "ch14", "ch15";
2296                         clocks = <&cpg CPG_MOD 501>;
2297                         clock-names = "fck";
2298                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2299                         resets = <&cpg 501>;
2300                         #dma-cells = <1>;
2301                         dma-channels = <16>;
2302                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2303                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2304                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2305                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2306                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2307                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2308                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2309                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2310                 };
2311
2312                 xhci0: usb@ee000000 {
2313                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2314                         reg = <0 0xee000000 0 0xc00>;
2315                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2316                         clocks = <&cpg CPG_MOD 328>;
2317                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2318                         resets = <&cpg 328>;
2319                         status = "disabled";
2320                 };
2321
2322                 usb3_peri0: usb@ee020000 {
2323                         compatible = "renesas,r8a7795-usb3-peri",
2324                                      "renesas,rcar-gen3-usb3-peri";
2325                         reg = <0 0xee020000 0 0x400>;
2326                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2327                         clocks = <&cpg CPG_MOD 328>;
2328                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2329                         resets = <&cpg 328>;
2330                         status = "disabled";
2331                 };
2332
2333                 ohci0: usb@ee080000 {
2334                         compatible = "generic-ohci";
2335                         reg = <0 0xee080000 0 0x100>;
2336                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2337                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2338                         phys = <&usb2_phy0>;
2339                         phy-names = "usb";
2340                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2341                         resets = <&cpg 703>, <&cpg 704>;
2342                         status = "disabled";
2343                 };
2344
2345                 ohci1: usb@ee0a0000 {
2346                         compatible = "generic-ohci";
2347                         reg = <0 0xee0a0000 0 0x100>;
2348                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2349                         clocks = <&cpg CPG_MOD 702>;
2350                         phys = <&usb2_phy1>;
2351                         phy-names = "usb";
2352                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2353                         resets = <&cpg 702>;
2354                         status = "disabled";
2355                 };
2356
2357                 ohci2: usb@ee0c0000 {
2358                         compatible = "generic-ohci";
2359                         reg = <0 0xee0c0000 0 0x100>;
2360                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2361                         clocks = <&cpg CPG_MOD 701>;
2362                         phys = <&usb2_phy2>;
2363                         phy-names = "usb";
2364                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2365                         resets = <&cpg 701>;
2366                         status = "disabled";
2367                 };
2368
2369                 ohci3: usb@ee0e0000 {
2370                         compatible = "generic-ohci";
2371                         reg = <0 0xee0e0000 0 0x100>;
2372                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2373                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2374                         phys = <&usb2_phy3>;
2375                         phy-names = "usb";
2376                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2377                         resets = <&cpg 700>, <&cpg 705>;
2378                         status = "disabled";
2379                 };
2380
2381                 ehci0: usb@ee080100 {
2382                         compatible = "generic-ehci";
2383                         reg = <0 0xee080100 0 0x100>;
2384                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2385                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2386                         phys = <&usb2_phy0>;
2387                         phy-names = "usb";
2388                         companion = <&ohci0>;
2389                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2390                         resets = <&cpg 703>, <&cpg 704>;
2391                         status = "disabled";
2392                 };
2393
2394                 ehci1: usb@ee0a0100 {
2395                         compatible = "generic-ehci";
2396                         reg = <0 0xee0a0100 0 0x100>;
2397                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2398                         clocks = <&cpg CPG_MOD 702>;
2399                         phys = <&usb2_phy1>;
2400                         phy-names = "usb";
2401                         companion = <&ohci1>;
2402                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2403                         resets = <&cpg 702>;
2404                         status = "disabled";
2405                 };
2406
2407                 ehci2: usb@ee0c0100 {
2408                         compatible = "generic-ehci";
2409                         reg = <0 0xee0c0100 0 0x100>;
2410                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2411                         clocks = <&cpg CPG_MOD 701>;
2412                         phys = <&usb2_phy2>;
2413                         phy-names = "usb";
2414                         companion = <&ohci2>;
2415                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2416                         resets = <&cpg 701>;
2417                         status = "disabled";
2418                 };
2419
2420                 ehci3: usb@ee0e0100 {
2421                         compatible = "generic-ehci";
2422                         reg = <0 0xee0e0100 0 0x100>;
2423                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2424                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2425                         phys = <&usb2_phy3>;
2426                         phy-names = "usb";
2427                         companion = <&ohci3>;
2428                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2429                         resets = <&cpg 700>, <&cpg 705>;
2430                         status = "disabled";
2431                 };
2432
2433                 usb2_phy0: usb-phy@ee080200 {
2434                         compatible = "renesas,usb2-phy-r8a7795",
2435                                      "renesas,rcar-gen3-usb2-phy";
2436                         reg = <0 0xee080200 0 0x700>;
2437                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2438                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2439                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2440                         resets = <&cpg 703>, <&cpg 704>;
2441                         #phy-cells = <0>;
2442                         status = "disabled";
2443                 };
2444
2445                 usb2_phy1: usb-phy@ee0a0200 {
2446                         compatible = "renesas,usb2-phy-r8a7795",
2447                                      "renesas,rcar-gen3-usb2-phy";
2448                         reg = <0 0xee0a0200 0 0x700>;
2449                         clocks = <&cpg CPG_MOD 702>;
2450                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2451                         resets = <&cpg 702>;
2452                         #phy-cells = <0>;
2453                         status = "disabled";
2454                 };
2455
2456                 usb2_phy2: usb-phy@ee0c0200 {
2457                         compatible = "renesas,usb2-phy-r8a7795",
2458                                      "renesas,rcar-gen3-usb2-phy";
2459                         reg = <0 0xee0c0200 0 0x700>;
2460                         clocks = <&cpg CPG_MOD 701>;
2461                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2462                         resets = <&cpg 701>;
2463                         #phy-cells = <0>;
2464                         status = "disabled";
2465                 };
2466
2467                 usb2_phy3: usb-phy@ee0e0200 {
2468                         compatible = "renesas,usb2-phy-r8a7795",
2469                                      "renesas,rcar-gen3-usb2-phy";
2470                         reg = <0 0xee0e0200 0 0x700>;
2471                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2472                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2473                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2474                         resets = <&cpg 700>, <&cpg 705>;
2475                         #phy-cells = <0>;
2476                         status = "disabled";
2477                 };
2478
2479                 sdhi0: sd@ee100000 {
2480                         compatible = "renesas,sdhi-r8a7795",
2481                                      "renesas,rcar-gen3-sdhi";
2482                         reg = <0 0xee100000 0 0x2000>;
2483                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2484                         clocks = <&cpg CPG_MOD 314>;
2485                         max-frequency = <200000000>;
2486                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2487                         resets = <&cpg 314>;
2488                         status = "disabled";
2489                 };
2490
2491                 sdhi1: sd@ee120000 {
2492                         compatible = "renesas,sdhi-r8a7795",
2493                                      "renesas,rcar-gen3-sdhi";
2494                         reg = <0 0xee120000 0 0x2000>;
2495                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2496                         clocks = <&cpg CPG_MOD 313>;
2497                         max-frequency = <200000000>;
2498                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2499                         resets = <&cpg 313>;
2500                         status = "disabled";
2501                 };
2502
2503                 sdhi2: sd@ee140000 {
2504                         compatible = "renesas,sdhi-r8a7795",
2505                                      "renesas,rcar-gen3-sdhi";
2506                         reg = <0 0xee140000 0 0x2000>;
2507                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2508                         clocks = <&cpg CPG_MOD 312>;
2509                         max-frequency = <200000000>;
2510                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2511                         resets = <&cpg 312>;
2512                         status = "disabled";
2513                 };
2514
2515                 sdhi3: sd@ee160000 {
2516                         compatible = "renesas,sdhi-r8a7795",
2517                                      "renesas,rcar-gen3-sdhi";
2518                         reg = <0 0xee160000 0 0x2000>;
2519                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2520                         clocks = <&cpg CPG_MOD 311>;
2521                         max-frequency = <200000000>;
2522                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2523                         resets = <&cpg 311>;
2524                         status = "disabled";
2525                 };
2526
2527                 sata: sata@ee300000 {
2528                         compatible = "renesas,sata-r8a7795",
2529                                      "renesas,rcar-gen3-sata";
2530                         reg = <0 0xee300000 0 0x200000>;
2531                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2532                         clocks = <&cpg CPG_MOD 815>;
2533                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2534                         resets = <&cpg 815>;
2535                         status = "disabled";
2536                         iommus = <&ipmmu_hc 2>;
2537                 };
2538
2539                 gic: interrupt-controller@f1010000 {
2540                         compatible = "arm,gic-400";
2541                         #interrupt-cells = <3>;
2542                         #address-cells = <0>;
2543                         interrupt-controller;
2544                         reg = <0x0 0xf1010000 0 0x1000>,
2545                               <0x0 0xf1020000 0 0x20000>,
2546                               <0x0 0xf1040000 0 0x20000>,
2547                               <0x0 0xf1060000 0 0x20000>;
2548                         interrupts = <GIC_PPI 9
2549                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2550                         clocks = <&cpg CPG_MOD 408>;
2551                         clock-names = "clk";
2552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2553                         resets = <&cpg 408>;
2554                 };
2555
2556                 pciec0: pcie@fe000000 {
2557                         compatible = "renesas,pcie-r8a7795",
2558                                      "renesas,pcie-rcar-gen3";
2559                         reg = <0 0xfe000000 0 0x80000>;
2560                         #address-cells = <3>;
2561                         #size-cells = <2>;
2562                         bus-range = <0x00 0xff>;
2563                         device_type = "pci";
2564                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2565                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2566                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2567                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2568                         /* Map all possible DDR as inbound ranges */
2569                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2570                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2571                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2572                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2573                         #interrupt-cells = <1>;
2574                         interrupt-map-mask = <0 0 0 0>;
2575                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2576                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2577                         clock-names = "pcie", "pcie_bus";
2578                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2579                         resets = <&cpg 319>;
2580                         status = "disabled";
2581                 };
2582
2583                 pciec1: pcie@ee800000 {
2584                         compatible = "renesas,pcie-r8a7795",
2585                                      "renesas,pcie-rcar-gen3";
2586                         reg = <0 0xee800000 0 0x80000>;
2587                         #address-cells = <3>;
2588                         #size-cells = <2>;
2589                         bus-range = <0x00 0xff>;
2590                         device_type = "pci";
2591                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2592                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2593                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2594                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2595                         /* Map all possible DDR as inbound ranges */
2596                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2597                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2598                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2599                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2600                         #interrupt-cells = <1>;
2601                         interrupt-map-mask = <0 0 0 0>;
2602                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2603                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2604                         clock-names = "pcie", "pcie_bus";
2605                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2606                         resets = <&cpg 318>;
2607                         status = "disabled";
2608                 };
2609
2610                 imr-lx4@fe860000 {
2611                         compatible = "renesas,r8a7795-imr-lx4",
2612                                      "renesas,imr-lx4";
2613                         reg = <0 0xfe860000 0 0x2000>;
2614                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2615                         clocks = <&cpg CPG_MOD 823>;
2616                         power-domains = <&sysc R8A7795_PD_A3VC>;
2617                         resets = <&cpg 823>;
2618                 };
2619
2620                 imr-lx4@fe870000 {
2621                         compatible = "renesas,r8a7795-imr-lx4",
2622                                      "renesas,imr-lx4";
2623                         reg = <0 0xfe870000 0 0x2000>;
2624                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2625                         clocks = <&cpg CPG_MOD 822>;
2626                         power-domains = <&sysc R8A7795_PD_A3VC>;
2627                         resets = <&cpg 822>;
2628                 };
2629
2630                 imr-lx4@fe880000 {
2631                         compatible = "renesas,r8a7795-imr-lx4",
2632                                      "renesas,imr-lx4";
2633                         reg = <0 0xfe880000 0 0x2000>;
2634                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2635                         clocks = <&cpg CPG_MOD 821>;
2636                         power-domains = <&sysc R8A7795_PD_A3VC>;
2637                         resets = <&cpg 821>;
2638                 };
2639
2640                 imr-lx4@fe890000 {
2641                         compatible = "renesas,r8a7795-imr-lx4",
2642                                      "renesas,imr-lx4";
2643                         reg = <0 0xfe890000 0 0x2000>;
2644                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2645                         clocks = <&cpg CPG_MOD 820>;
2646                         power-domains = <&sysc R8A7795_PD_A3VC>;
2647                         resets = <&cpg 820>;
2648                 };
2649
2650                 fdp1@fe940000 {
2651                         compatible = "renesas,fdp1";
2652                         reg = <0 0xfe940000 0 0x2400>;
2653                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2654                         clocks = <&cpg CPG_MOD 119>;
2655                         power-domains = <&sysc R8A7795_PD_A3VP>;
2656                         resets = <&cpg 119>;
2657                         renesas,fcp = <&fcpf0>;
2658                 };
2659
2660                 fdp1@fe944000 {
2661                         compatible = "renesas,fdp1";
2662                         reg = <0 0xfe944000 0 0x2400>;
2663                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2664                         clocks = <&cpg CPG_MOD 118>;
2665                         power-domains = <&sysc R8A7795_PD_A3VP>;
2666                         resets = <&cpg 118>;
2667                         renesas,fcp = <&fcpf1>;
2668                 };
2669
2670                 fcpf0: fcp@fe950000 {
2671                         compatible = "renesas,fcpf";
2672                         reg = <0 0xfe950000 0 0x200>;
2673                         clocks = <&cpg CPG_MOD 615>;
2674                         power-domains = <&sysc R8A7795_PD_A3VP>;
2675                         resets = <&cpg 615>;
2676                         iommus = <&ipmmu_vp0 0>;
2677                 };
2678
2679                 fcpf1: fcp@fe951000 {
2680                         compatible = "renesas,fcpf";
2681                         reg = <0 0xfe951000 0 0x200>;
2682                         clocks = <&cpg CPG_MOD 614>;
2683                         power-domains = <&sysc R8A7795_PD_A3VP>;
2684                         resets = <&cpg 614>;
2685                         iommus = <&ipmmu_vp1 1>;
2686                 };
2687
2688                 fcpvb0: fcp@fe96f000 {
2689                         compatible = "renesas,fcpv";
2690                         reg = <0 0xfe96f000 0 0x200>;
2691                         clocks = <&cpg CPG_MOD 607>;
2692                         power-domains = <&sysc R8A7795_PD_A3VP>;
2693                         resets = <&cpg 607>;
2694                         iommus = <&ipmmu_vp0 5>;
2695                 };
2696
2697                 fcpvb1: fcp@fe92f000 {
2698                         compatible = "renesas,fcpv";
2699                         reg = <0 0xfe92f000 0 0x200>;
2700                         clocks = <&cpg CPG_MOD 606>;
2701                         power-domains = <&sysc R8A7795_PD_A3VP>;
2702                         resets = <&cpg 606>;
2703                         iommus = <&ipmmu_vp1 7>;
2704                 };
2705
2706                 fcpvi0: fcp@fe9af000 {
2707                         compatible = "renesas,fcpv";
2708                         reg = <0 0xfe9af000 0 0x200>;
2709                         clocks = <&cpg CPG_MOD 611>;
2710                         power-domains = <&sysc R8A7795_PD_A3VP>;
2711                         resets = <&cpg 611>;
2712                         iommus = <&ipmmu_vp0 8>;
2713                 };
2714
2715                 fcpvi1: fcp@fe9bf000 {
2716                         compatible = "renesas,fcpv";
2717                         reg = <0 0xfe9bf000 0 0x200>;
2718                         clocks = <&cpg CPG_MOD 610>;
2719                         power-domains = <&sysc R8A7795_PD_A3VP>;
2720                         resets = <&cpg 610>;
2721                         iommus = <&ipmmu_vp1 9>;
2722                 };
2723
2724                 fcpvd0: fcp@fea27000 {
2725                         compatible = "renesas,fcpv";
2726                         reg = <0 0xfea27000 0 0x200>;
2727                         clocks = <&cpg CPG_MOD 603>;
2728                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2729                         resets = <&cpg 603>;
2730                         iommus = <&ipmmu_vi0 8>;
2731                 };
2732
2733                 fcpvd1: fcp@fea2f000 {
2734                         compatible = "renesas,fcpv";
2735                         reg = <0 0xfea2f000 0 0x200>;
2736                         clocks = <&cpg CPG_MOD 602>;
2737                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2738                         resets = <&cpg 602>;
2739                         iommus = <&ipmmu_vi0 9>;
2740                 };
2741
2742                 fcpvd2: fcp@fea37000 {
2743                         compatible = "renesas,fcpv";
2744                         reg = <0 0xfea37000 0 0x200>;
2745                         clocks = <&cpg CPG_MOD 601>;
2746                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2747                         resets = <&cpg 601>;
2748                         iommus = <&ipmmu_vi1 10>;
2749                 };
2750
2751                 vspbd: vsp@fe960000 {
2752                         compatible = "renesas,vsp2";
2753                         reg = <0 0xfe960000 0 0x8000>;
2754                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2755                         clocks = <&cpg CPG_MOD 626>;
2756                         power-domains = <&sysc R8A7795_PD_A3VP>;
2757                         resets = <&cpg 626>;
2758
2759                         renesas,fcp = <&fcpvb0>;
2760                 };
2761
2762                 vspbc: vsp@fe920000 {
2763                         compatible = "renesas,vsp2";
2764                         reg = <0 0xfe920000 0 0x8000>;
2765                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2766                         clocks = <&cpg CPG_MOD 624>;
2767                         power-domains = <&sysc R8A7795_PD_A3VP>;
2768                         resets = <&cpg 624>;
2769
2770                         renesas,fcp = <&fcpvb1>;
2771                 };
2772
2773                 vspd0: vsp@fea20000 {
2774                         compatible = "renesas,vsp2";
2775                         reg = <0 0xfea20000 0 0x5000>;
2776                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2777                         clocks = <&cpg CPG_MOD 623>;
2778                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2779                         resets = <&cpg 623>;
2780
2781                         renesas,fcp = <&fcpvd0>;
2782                 };
2783
2784                 vspd1: vsp@fea28000 {
2785                         compatible = "renesas,vsp2";
2786                         reg = <0 0xfea28000 0 0x5000>;
2787                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2788                         clocks = <&cpg CPG_MOD 622>;
2789                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2790                         resets = <&cpg 622>;
2791
2792                         renesas,fcp = <&fcpvd1>;
2793                 };
2794
2795                 vspd2: vsp@fea30000 {
2796                         compatible = "renesas,vsp2";
2797                         reg = <0 0xfea30000 0 0x5000>;
2798                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2799                         clocks = <&cpg CPG_MOD 621>;
2800                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2801                         resets = <&cpg 621>;
2802
2803                         renesas,fcp = <&fcpvd2>;
2804                 };
2805
2806                 vspi0: vsp@fe9a0000 {
2807                         compatible = "renesas,vsp2";
2808                         reg = <0 0xfe9a0000 0 0x8000>;
2809                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2810                         clocks = <&cpg CPG_MOD 631>;
2811                         power-domains = <&sysc R8A7795_PD_A3VP>;
2812                         resets = <&cpg 631>;
2813
2814                         renesas,fcp = <&fcpvi0>;
2815                 };
2816
2817                 vspi1: vsp@fe9b0000 {
2818                         compatible = "renesas,vsp2";
2819                         reg = <0 0xfe9b0000 0 0x8000>;
2820                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2821                         clocks = <&cpg CPG_MOD 630>;
2822                         power-domains = <&sysc R8A7795_PD_A3VP>;
2823                         resets = <&cpg 630>;
2824
2825                         renesas,fcp = <&fcpvi1>;
2826                 };
2827
2828                 csi20: csi2@fea80000 {
2829                         compatible = "renesas,r8a7795-csi2";
2830                         reg = <0 0xfea80000 0 0x10000>;
2831                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2832                         clocks = <&cpg CPG_MOD 714>;
2833                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2834                         resets = <&cpg 714>;
2835                         status = "disabled";
2836
2837                         ports {
2838                                 #address-cells = <1>;
2839                                 #size-cells = <0>;
2840
2841                                 port@1 {
2842                                         #address-cells = <1>;
2843                                         #size-cells = <0>;
2844
2845                                         reg = <1>;
2846
2847                                         csi20vin0: endpoint@0 {
2848                                                 reg = <0>;
2849                                                 remote-endpoint = <&vin0csi20>;
2850                                         };
2851                                         csi20vin1: endpoint@1 {
2852                                                 reg = <1>;
2853                                                 remote-endpoint = <&vin1csi20>;
2854                                         };
2855                                         csi20vin2: endpoint@2 {
2856                                                 reg = <2>;
2857                                                 remote-endpoint = <&vin2csi20>;
2858                                         };
2859                                         csi20vin3: endpoint@3 {
2860                                                 reg = <3>;
2861                                                 remote-endpoint = <&vin3csi20>;
2862                                         };
2863                                         csi20vin4: endpoint@4 {
2864                                                 reg = <4>;
2865                                                 remote-endpoint = <&vin4csi20>;
2866                                         };
2867                                         csi20vin5: endpoint@5 {
2868                                                 reg = <5>;
2869                                                 remote-endpoint = <&vin5csi20>;
2870                                         };
2871                                         csi20vin6: endpoint@6 {
2872                                                 reg = <6>;
2873                                                 remote-endpoint = <&vin6csi20>;
2874                                         };
2875                                         csi20vin7: endpoint@7 {
2876                                                 reg = <7>;
2877                                                 remote-endpoint = <&vin7csi20>;
2878                                         };
2879                                 };
2880                         };
2881                 };
2882
2883                 csi40: csi2@feaa0000 {
2884                         compatible = "renesas,r8a7795-csi2";
2885                         reg = <0 0xfeaa0000 0 0x10000>;
2886                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2887                         clocks = <&cpg CPG_MOD 716>;
2888                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2889                         resets = <&cpg 716>;
2890                         status = "disabled";
2891
2892                         ports {
2893                                 #address-cells = <1>;
2894                                 #size-cells = <0>;
2895
2896                                 port@1 {
2897                                         #address-cells = <1>;
2898                                         #size-cells = <0>;
2899
2900                                         reg = <1>;
2901
2902                                         csi40vin0: endpoint@0 {
2903                                                 reg = <0>;
2904                                                 remote-endpoint = <&vin0csi40>;
2905                                         };
2906                                         csi40vin1: endpoint@1 {
2907                                                 reg = <1>;
2908                                                 remote-endpoint = <&vin1csi40>;
2909                                         };
2910                                         csi40vin2: endpoint@2 {
2911                                                 reg = <2>;
2912                                                 remote-endpoint = <&vin2csi40>;
2913                                         };
2914                                         csi40vin3: endpoint@3 {
2915                                                 reg = <3>;
2916                                                 remote-endpoint = <&vin3csi40>;
2917                                         };
2918                                 };
2919                         };
2920                 };
2921
2922                 csi41: csi2@feab0000 {
2923                         compatible = "renesas,r8a7795-csi2";
2924                         reg = <0 0xfeab0000 0 0x10000>;
2925                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
2926                         clocks = <&cpg CPG_MOD 715>;
2927                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2928                         resets = <&cpg 715>;
2929                         status = "disabled";
2930
2931                         ports {
2932                                 #address-cells = <1>;
2933                                 #size-cells = <0>;
2934
2935                                 port@1 {
2936                                         #address-cells = <1>;
2937                                         #size-cells = <0>;
2938
2939                                         reg = <1>;
2940
2941                                         csi41vin4: endpoint@0 {
2942                                                 reg = <0>;
2943                                                 remote-endpoint = <&vin4csi41>;
2944                                         };
2945                                         csi41vin5: endpoint@1 {
2946                                                 reg = <1>;
2947                                                 remote-endpoint = <&vin5csi41>;
2948                                         };
2949                                         csi41vin6: endpoint@2 {
2950                                                 reg = <2>;
2951                                                 remote-endpoint = <&vin6csi41>;
2952                                         };
2953                                         csi41vin7: endpoint@3 {
2954                                                 reg = <3>;
2955                                                 remote-endpoint = <&vin7csi41>;
2956                                         };
2957                                 };
2958                         };
2959                 };
2960
2961                 hdmi0: hdmi@fead0000 {
2962                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2963                         reg = <0 0xfead0000 0 0x10000>;
2964                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2965                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2966                         clock-names = "iahb", "isfr";
2967                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2968                         resets = <&cpg 729>;
2969                         status = "disabled";
2970
2971                         ports {
2972                                 #address-cells = <1>;
2973                                 #size-cells = <0>;
2974                                 port@0 {
2975                                         reg = <0>;
2976                                         dw_hdmi0_in: endpoint {
2977                                                 remote-endpoint = <&du_out_hdmi0>;
2978                                         };
2979                                 };
2980                                 port@1 {
2981                                         reg = <1>;
2982                                 };
2983                                 port@2 {
2984                                         /* HDMI sound */
2985                                         reg = <2>;
2986                                 };
2987                         };
2988                 };
2989
2990                 hdmi1: hdmi@feae0000 {
2991                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2992                         reg = <0 0xfeae0000 0 0x10000>;
2993                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2994                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2995                         clock-names = "iahb", "isfr";
2996                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2997                         resets = <&cpg 728>;
2998                         status = "disabled";
2999
3000                         ports {
3001                                 #address-cells = <1>;
3002                                 #size-cells = <0>;
3003                                 port@0 {
3004                                         reg = <0>;
3005                                         dw_hdmi1_in: endpoint {
3006                                                 remote-endpoint = <&du_out_hdmi1>;
3007                                         };
3008                                 };
3009                                 port@1 {
3010                                         reg = <1>;
3011                                 };
3012                                 port@2 {
3013                                         /* HDMI sound */
3014                                         reg = <2>;
3015                                 };
3016                         };
3017                 };
3018
3019                 du: display@feb00000 {
3020                         compatible = "renesas,du-r8a7795";
3021                         reg = <0 0xfeb00000 0 0x80000>;
3022                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3023                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3024                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3025                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3026                         clocks = <&cpg CPG_MOD 724>,
3027                                  <&cpg CPG_MOD 723>,
3028                                  <&cpg CPG_MOD 722>,
3029                                  <&cpg CPG_MOD 721>;
3030                         clock-names = "du.0", "du.1", "du.2", "du.3";
3031                         vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
3032                         status = "disabled";
3033
3034                         ports {
3035                                 #address-cells = <1>;
3036                                 #size-cells = <0>;
3037
3038                                 port@0 {
3039                                         reg = <0>;
3040                                         du_out_rgb: endpoint {
3041                                         };
3042                                 };
3043                                 port@1 {
3044                                         reg = <1>;
3045                                         du_out_hdmi0: endpoint {
3046                                                 remote-endpoint = <&dw_hdmi0_in>;
3047                                         };
3048                                 };
3049                                 port@2 {
3050                                         reg = <2>;
3051                                         du_out_hdmi1: endpoint {
3052                                                 remote-endpoint = <&dw_hdmi1_in>;
3053                                         };
3054                                 };
3055                                 port@3 {
3056                                         reg = <3>;
3057                                         du_out_lvds0: endpoint {
3058                                                 remote-endpoint = <&lvds0_in>;
3059                                         };
3060                                 };
3061                         };
3062                 };
3063
3064                 lvds0: lvds@feb90000 {
3065                         compatible = "renesas,r8a7795-lvds";
3066                         reg = <0 0xfeb90000 0 0x14>;
3067                         clocks = <&cpg CPG_MOD 727>;
3068                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3069                         resets = <&cpg 727>;
3070                         status = "disabled";
3071
3072                         ports {
3073                                 #address-cells = <1>;
3074                                 #size-cells = <0>;
3075
3076                                 port@0 {
3077                                         reg = <0>;
3078                                         lvds0_in: endpoint {
3079                                                 remote-endpoint = <&du_out_lvds0>;
3080                                         };
3081                                 };
3082                                 port@1 {
3083                                         reg = <1>;
3084                                         lvds0_out: endpoint {
3085                                         };
3086                                 };
3087                         };
3088                 };
3089
3090                 prr: chipid@fff00044 {
3091                         compatible = "renesas,prr";
3092                         reg = <0 0xfff00044 0 4>;
3093                 };
3094         };
3095
3096         thermal-zones {
3097                 sensor_thermal1: sensor-thermal1 {
3098                         polling-delay-passive = <250>;
3099                         polling-delay = <1000>;
3100                         thermal-sensors = <&tsc 0>;
3101
3102                         trips {
3103                                 sensor1_passive: sensor1-passive {
3104                                         temperature = <95000>;
3105                                         hysteresis = <1000>;
3106                                         type = "passive";
3107                                 };
3108                                 sensor1_crit: sensor1-crit {
3109                                         temperature = <120000>;
3110                                         hysteresis = <1000>;
3111                                         type = "critical";
3112                                 };
3113                         };
3114
3115                         cooling-maps {
3116                                 map0 {
3117                                         trip = <&sensor1_passive>;
3118                                         cooling-device = <&a57_0 4 4>,
3119                                                          <&a57_1 4 4>,
3120                                                          <&a57_2 4 4>,
3121                                                          <&a57_3 4 4>;
3122                                 };
3123                         };
3124                 };
3125
3126                 sensor_thermal2: sensor-thermal2 {
3127                         polling-delay-passive = <250>;
3128                         polling-delay = <1000>;
3129                         thermal-sensors = <&tsc 1>;
3130
3131                         trips {
3132                                 sensor2_passive: sensor2-passive {
3133                                         temperature = <95000>;
3134                                         hysteresis = <1000>;
3135                                         type = "passive";
3136                                 };
3137                                 sensor2_crit: sensor2-crit {
3138                                         temperature = <120000>;
3139                                         hysteresis = <1000>;
3140                                         type = "critical";
3141                                 };
3142                         };
3143
3144                         cooling-maps {
3145                                 map0 {
3146                                         trip = <&sensor2_passive>;
3147                                         cooling-device = <&a57_0 4 4>,
3148                                                          <&a57_1 4 4>,
3149                                                          <&a57_2 4 4>,
3150                                                          <&a57_3 4 4>;
3151                                 };
3152                         };
3153                 };
3154
3155                 sensor_thermal3: sensor-thermal3 {
3156                         polling-delay-passive = <250>;
3157                         polling-delay = <1000>;
3158                         thermal-sensors = <&tsc 2>;
3159
3160                         trips {
3161                                 sensor3_passive: sensor3-passive {
3162                                         temperature = <95000>;
3163                                         hysteresis = <1000>;
3164                                         type = "passive";
3165                                 };
3166                                 sensor3_crit: sensor3-crit {
3167                                         temperature = <120000>;
3168                                         hysteresis = <1000>;
3169                                         type = "critical";
3170                                 };
3171                         };
3172
3173                         cooling-maps {
3174                                 map0 {
3175                                         trip = <&sensor3_passive>;
3176                                         cooling-device = <&a57_0 4 4>,
3177                                                          <&a57_1 4 4>,
3178                                                          <&a57_2 4 4>,
3179                                                          <&a57_3 4 4>;
3180                                 };
3181                         };
3182                 };
3183         };
3184
3185         timer {
3186                 compatible = "arm,armv8-timer";
3187                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3188                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3189                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3190                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3191         };
3192
3193         /* External USB clocks - can be overridden by the board */
3194         usb3s0_clk: usb3s0 {
3195                 compatible = "fixed-clock";
3196                 #clock-cells = <0>;
3197                 clock-frequency = <0>;
3198         };
3199
3200         usb_extal_clk: usb_extal {
3201                 compatible = "fixed-clock";
3202                 #clock-cells = <0>;
3203                 clock-frequency = <0>;
3204         };
3205 };