arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27         };
  28
  29         psci {
  30                 compatible = "arm,psci-0.2";
  31                 method = "smc";
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 a57_0: cpu@0 {
  39                         compatible = "arm,cortex-a57", "arm,armv8";
  40                         reg = <0x0>;
  41                         device_type = "cpu";
  42                         next-level-cache = <&L2_CA57>;
  43                         enable-method = "psci";
  44                 };
  45
  46                 a57_1: cpu@1 {
  47                         compatible = "arm,cortex-a57","arm,armv8";
  48                         reg = <0x1>;
  49                         device_type = "cpu";
  50                         next-level-cache = <&L2_CA57>;
  51                         enable-method = "psci";
  52                 };
  53                 a57_2: cpu@2 {
  54                         compatible = "arm,cortex-a57","arm,armv8";
  55                         reg = <0x2>;
  56                         device_type = "cpu";
  57                         next-level-cache = <&L2_CA57>;
  58                         enable-method = "psci";
  59                 };
  60                 a57_3: cpu@3 {
  61                         compatible = "arm,cortex-a57","arm,armv8";
  62                         reg = <0x3>;
  63                         device_type = "cpu";
  64                         next-level-cache = <&L2_CA57>;
  65                         enable-method = "psci";
  66                 };
  67         };
  68
  69         L2_CA57: cache-controller@0 {
  70                 compatible = "cache";
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         L2_CA53: cache-controller@1 {
  76                 compatible = "cache";
  77                 cache-unified;
  78                 cache-level = <2>;
  79         };
  80
  81         extal_clk: extal {
  82                 compatible = "fixed-clock";
  83                 #clock-cells = <0>;
  84                 /* This value must be overridden by the board */
  85                 clock-frequency = <0>;
  86         };
  87
  88         extalr_clk: extalr {
  89                 compatible = "fixed-clock";
  90                 #clock-cells = <0>;
  91                 /* This value must be overridden by the board */
  92                 clock-frequency = <0>;
  93         };
  94
  95         /*
  96          * The external audio clocks are configured as 0 Hz fixed frequency
  97          * clocks by default.
  98          * Boards that provide audio clocks should override them.
  99          */
 100         audio_clk_a: audio_clk_a {
 101                 compatible = "fixed-clock";
 102                 #clock-cells = <0>;
 103                 clock-frequency = <0>;
 104         };
 105
 106         audio_clk_b: audio_clk_b {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 clock-frequency = <0>;
 110         };
 111
 112         audio_clk_c: audio_clk_c {
 113                 compatible = "fixed-clock";
 114                 #clock-cells = <0>;
 115                 clock-frequency = <0>;
 116         };
 117
 118         /* External SCIF clock - to be overridden by boards that provide it */
 119         scif_clk: scif {
 120                 compatible = "fixed-clock";
 121                 #clock-cells = <0>;
 122                 clock-frequency = <0>;
 123                 status = "disabled";
 124         };
 125
 126         soc {
 127                 compatible = "simple-bus";
 128                 interrupt-parent = <&gic>;
 129
 130                 #address-cells = <2>;
 131                 #size-cells = <2>;
 132                 ranges;
 133
 134                 gic: interrupt-controller@0xf1010000 {
 135                         compatible = "arm,gic-400";
 136                         #interrupt-cells = <3>;
 137                         #address-cells = <0>;
 138                         interrupt-controller;
 139                         reg = <0x0 0xf1010000 0 0x1000>,
 140                               <0x0 0xf1020000 0 0x2000>,
 141                               <0x0 0xf1040000 0 0x20000>,
 142                               <0x0 0xf1060000 0 0x2000>;
 143                         interrupts = <GIC_PPI 9
 144                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 145                 };
 146
 147                 gpio0: gpio@e6050000 {
 148                         compatible = "renesas,gpio-r8a7795",
 149                                      "renesas,gpio-rcar";
 150                         reg = <0 0xe6050000 0 0x50>;
 151                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 152                         #gpio-cells = <2>;
 153                         gpio-controller;
 154                         gpio-ranges = <&pfc 0 0 16>;
 155                         #interrupt-cells = <2>;
 156                         interrupt-controller;
 157                         clocks = <&cpg CPG_MOD 912>;
 158                         power-domains = <&cpg>;
 159                 };
 160
 161                 gpio1: gpio@e6051000 {
 162                         compatible = "renesas,gpio-r8a7795",
 163                                      "renesas,gpio-rcar";
 164                         reg = <0 0xe6051000 0 0x50>;
 165                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 166                         #gpio-cells = <2>;
 167                         gpio-controller;
 168                         gpio-ranges = <&pfc 0 32 28>;
 169                         #interrupt-cells = <2>;
 170                         interrupt-controller;
 171                         clocks = <&cpg CPG_MOD 911>;
 172                         power-domains = <&cpg>;
 173                 };
 174
 175                 gpio2: gpio@e6052000 {
 176                         compatible = "renesas,gpio-r8a7795",
 177                                      "renesas,gpio-rcar";
 178                         reg = <0 0xe6052000 0 0x50>;
 179                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 180                         #gpio-cells = <2>;
 181                         gpio-controller;
 182                         gpio-ranges = <&pfc 0 64 15>;
 183                         #interrupt-cells = <2>;
 184                         interrupt-controller;
 185                         clocks = <&cpg CPG_MOD 910>;
 186                         power-domains = <&cpg>;
 187                 };
 188
 189                 gpio3: gpio@e6053000 {
 190                         compatible = "renesas,gpio-r8a7795",
 191                                      "renesas,gpio-rcar";
 192                         reg = <0 0xe6053000 0 0x50>;
 193                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 194                         #gpio-cells = <2>;
 195                         gpio-controller;
 196                         gpio-ranges = <&pfc 0 96 16>;
 197                         #interrupt-cells = <2>;
 198                         interrupt-controller;
 199                         clocks = <&cpg CPG_MOD 909>;
 200                         power-domains = <&cpg>;
 201                 };
 202
 203                 gpio4: gpio@e6054000 {
 204                         compatible = "renesas,gpio-r8a7795",
 205                                      "renesas,gpio-rcar";
 206                         reg = <0 0xe6054000 0 0x50>;
 207                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 208                         #gpio-cells = <2>;
 209                         gpio-controller;
 210                         gpio-ranges = <&pfc 0 128 18>;
 211                         #interrupt-cells = <2>;
 212                         interrupt-controller;
 213                         clocks = <&cpg CPG_MOD 908>;
 214                         power-domains = <&cpg>;
 215                 };
 216
 217                 gpio5: gpio@e6055000 {
 218                         compatible = "renesas,gpio-r8a7795",
 219                                      "renesas,gpio-rcar";
 220                         reg = <0 0xe6055000 0 0x50>;
 221                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 222                         #gpio-cells = <2>;
 223                         gpio-controller;
 224                         gpio-ranges = <&pfc 0 160 26>;
 225                         #interrupt-cells = <2>;
 226                         interrupt-controller;
 227                         clocks = <&cpg CPG_MOD 907>;
 228                         power-domains = <&cpg>;
 229                 };
 230
 231                 gpio6: gpio@e6055400 {
 232                         compatible = "renesas,gpio-r8a7795",
 233                                      "renesas,gpio-rcar";
 234                         reg = <0 0xe6055400 0 0x50>;
 235                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 236                         #gpio-cells = <2>;
 237                         gpio-controller;
 238                         gpio-ranges = <&pfc 0 192 32>;
 239                         #interrupt-cells = <2>;
 240                         interrupt-controller;
 241                         clocks = <&cpg CPG_MOD 906>;
 242                         power-domains = <&cpg>;
 243                 };
 244
 245                 gpio7: gpio@e6055800 {
 246                         compatible = "renesas,gpio-r8a7795",
 247                                      "renesas,gpio-rcar";
 248                         reg = <0 0xe6055800 0 0x50>;
 249                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 250                         #gpio-cells = <2>;
 251                         gpio-controller;
 252                         gpio-ranges = <&pfc 0 224 4>;
 253                         #interrupt-cells = <2>;
 254                         interrupt-controller;
 255                         clocks = <&cpg CPG_MOD 905>;
 256                         power-domains = <&cpg>;
 257                 };
 258
 259                 pmu_a57 {
 260                         compatible = "arm,cortex-a57-pmu";
 261                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 265                         interrupt-affinity = <&a57_0>,
 266                                              <&a57_1>,
 267                                              <&a57_2>,
 268                                              <&a57_3>;
 269                 };
 270
 271                 timer {
 272                         compatible = "arm,armv8-timer";
 273                         interrupts = <GIC_PPI 13
 274                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 275                                      <GIC_PPI 14
 276                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 277                                      <GIC_PPI 11
 278                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 279                                      <GIC_PPI 10
 280                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 281                 };
 282
 283                 cpg: clock-controller@e6150000 {
 284                         compatible = "renesas,r8a7795-cpg-mssr";
 285                         reg = <0 0xe6150000 0 0x1000>;
 286                         clocks = <&extal_clk>, <&extalr_clk>;
 287                         clock-names = "extal", "extalr";
 288                         #clock-cells = <2>;
 289                         #power-domain-cells = <0>;
 290                 };
 291
 292                 audma0: dma-controller@ec700000 {
 293                         compatible = "renesas,rcar-dmac";
 294                         reg = <0 0xec700000 0 0x10000>;
 295                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 296                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 297                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 302                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 303                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 304                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 305                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 306                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 307                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 308                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 311                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 312                         interrupt-names = "error",
 313                                         "ch0", "ch1", "ch2", "ch3",
 314                                         "ch4", "ch5", "ch6", "ch7",
 315                                         "ch8", "ch9", "ch10", "ch11",
 316                                         "ch12", "ch13", "ch14", "ch15";
 317                         clocks = <&cpg CPG_MOD 502>;
 318                         clock-names = "fck";
 319                         power-domains = <&cpg>;
 320                         #dma-cells = <1>;
 321                         dma-channels = <16>;
 322                 };
 323
 324                 audma1: dma-controller@ec720000 {
 325                         compatible = "renesas,rcar-dmac";
 326                         reg = <0 0xec720000 0 0x10000>;
 327                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 328                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 329                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 330                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 331                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 332                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 333                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 334                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 344                         interrupt-names = "error",
 345                                         "ch0", "ch1", "ch2", "ch3",
 346                                         "ch4", "ch5", "ch6", "ch7",
 347                                         "ch8", "ch9", "ch10", "ch11",
 348                                         "ch12", "ch13", "ch14", "ch15";
 349                         clocks = <&cpg CPG_MOD 501>;
 350                         clock-names = "fck";
 351                         power-domains = <&cpg>;
 352                         #dma-cells = <1>;
 353                         dma-channels = <16>;
 354                 };
 355
 356                 pfc: pfc@e6060000 {
 357                         compatible = "renesas,pfc-r8a7795";
 358                         reg = <0 0xe6060000 0 0x50c>;
 359                 };
 360
 361                 intc_ex: interrupt-controller@e61c0000 {
 362                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 363                         #interrupt-cells = <2>;
 364                         interrupt-controller;
 365                         reg = <0 0xe61c0000 0 0x200>;
 366                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 367                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 368                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 372                         clocks = <&cpg CPG_MOD 407>;
 373                         power-domains = <&cpg>;
 374                 };
 375
 376                 dmac0: dma-controller@e6700000 {
 377                         compatible = "renesas,dmac-r8a7795",
 378                                      "renesas,rcar-dmac";
 379                         reg = <0 0xe6700000 0 0x10000>;
 380                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 384                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 385                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 386                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 387                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 388                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 389                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 390                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 391                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 392                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 393                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 394                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 395                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 396                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 397                         interrupt-names = "error",
 398                                         "ch0", "ch1", "ch2", "ch3",
 399                                         "ch4", "ch5", "ch6", "ch7",
 400                                         "ch8", "ch9", "ch10", "ch11",
 401                                         "ch12", "ch13", "ch14", "ch15";
 402                         clocks = <&cpg CPG_MOD 219>;
 403                         clock-names = "fck";
 404                         power-domains = <&cpg>;
 405                         #dma-cells = <1>;
 406                         dma-channels = <16>;
 407                 };
 408
 409                 dmac1: dma-controller@e7300000 {
 410                         compatible = "renesas,dmac-r8a7795",
 411                                      "renesas,rcar-dmac";
 412                         reg = <0 0xe7300000 0 0x10000>;
 413                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 417                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 418                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 430                         interrupt-names = "error",
 431                                         "ch0", "ch1", "ch2", "ch3",
 432                                         "ch4", "ch5", "ch6", "ch7",
 433                                         "ch8", "ch9", "ch10", "ch11",
 434                                         "ch12", "ch13", "ch14", "ch15";
 435                         clocks = <&cpg CPG_MOD 218>;
 436                         clock-names = "fck";
 437                         power-domains = <&cpg>;
 438                         #dma-cells = <1>;
 439                         dma-channels = <16>;
 440                 };
 441
 442                 dmac2: dma-controller@e7310000 {
 443                         compatible = "renesas,dmac-r8a7795",
 444                                      "renesas,rcar-dmac";
 445                         reg = <0 0xe7310000 0 0x10000>;
 446                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 450                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 451                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 452                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 453                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 463                         interrupt-names = "error",
 464                                         "ch0", "ch1", "ch2", "ch3",
 465                                         "ch4", "ch5", "ch6", "ch7",
 466                                         "ch8", "ch9", "ch10", "ch11",
 467                                         "ch12", "ch13", "ch14", "ch15";
 468                         clocks = <&cpg CPG_MOD 217>;
 469                         clock-names = "fck";
 470                         power-domains = <&cpg>;
 471                         #dma-cells = <1>;
 472                         dma-channels = <16>;
 473                 };
 474
 475                 avb: ethernet@e6800000 {
 476                         compatible = "renesas,etheravb-r8a7795",
 477                                      "renesas,etheravb-rcar-gen3";
 478                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 479                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 483                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 484                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 485                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 486                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 487                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 488                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 502                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 504                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 505                                           "ch4", "ch5", "ch6", "ch7",
 506                                           "ch8", "ch9", "ch10", "ch11",
 507                                           "ch12", "ch13", "ch14", "ch15",
 508                                           "ch16", "ch17", "ch18", "ch19",
 509                                           "ch20", "ch21", "ch22", "ch23",
 510                                           "ch24";
 511                         clocks = <&cpg CPG_MOD 812>;
 512                         power-domains = <&cpg>;
 513                         phy-mode = "rgmii-id";
 514                         #address-cells = <1>;
 515                         #size-cells = <0>;
 516                 };
 517
 518                 hscif0: serial@e6540000 {
 519                         compatible = "renesas,hscif-r8a7795",
 520                                      "renesas,rcar-gen3-hscif",
 521                                      "renesas,hscif";
 522                         reg = <0 0xe6540000 0 96>;
 523                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 524                         clocks = <&cpg CPG_MOD 520>,
 525                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 526                                  <&scif_clk>;
 527                         clock-names = "fck", "brg_int", "scif_clk";
 528                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 529                         dma-names = "tx", "rx";
 530                         power-domains = <&cpg>;
 531                         status = "disabled";
 532                 };
 533
 534                 hscif1: serial@e6550000 {
 535                         compatible = "renesas,hscif-r8a7795",
 536                                      "renesas,rcar-gen3-hscif",
 537                                      "renesas,hscif";
 538                         reg = <0 0xe6550000 0 96>;
 539                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 540                         clocks = <&cpg CPG_MOD 519>,
 541                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 542                                  <&scif_clk>;
 543                         clock-names = "fck", "brg_int", "scif_clk";
 544                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 545                         dma-names = "tx", "rx";
 546                         power-domains = <&cpg>;
 547                         status = "disabled";
 548                 };
 549
 550                 hscif2: serial@e6560000 {
 551                         compatible = "renesas,hscif-r8a7795",
 552                                      "renesas,rcar-gen3-hscif",
 553                                      "renesas,hscif";
 554                         reg = <0 0xe6560000 0 96>;
 555                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 556                         clocks = <&cpg CPG_MOD 518>,
 557                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 558                                  <&scif_clk>;
 559                         clock-names = "fck", "brg_int", "scif_clk";
 560                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 561                         dma-names = "tx", "rx";
 562                         power-domains = <&cpg>;
 563                         status = "disabled";
 564                 };
 565
 566                 hscif3: serial@e66a0000 {
 567                         compatible = "renesas,hscif-r8a7795",
 568                                      "renesas,rcar-gen3-hscif",
 569                                      "renesas,hscif";
 570                         reg = <0 0xe66a0000 0 96>;
 571                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 572                         clocks = <&cpg CPG_MOD 517>,
 573                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 574                                  <&scif_clk>;
 575                         clock-names = "fck", "brg_int", "scif_clk";
 576                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 577                         dma-names = "tx", "rx";
 578                         power-domains = <&cpg>;
 579                         status = "disabled";
 580                 };
 581
 582                 hscif4: serial@e66b0000 {
 583                         compatible = "renesas,hscif-r8a7795",
 584                                      "renesas,rcar-gen3-hscif",
 585                                      "renesas,hscif";
 586                         reg = <0 0xe66b0000 0 96>;
 587                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 588                         clocks = <&cpg CPG_MOD 516>,
 589                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 590                                  <&scif_clk>;
 591                         clock-names = "fck", "brg_int", "scif_clk";
 592                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 593                         dma-names = "tx", "rx";
 594                         power-domains = <&cpg>;
 595                         status = "disabled";
 596                 };
 597
 598                 scif0: serial@e6e60000 {
 599                         compatible = "renesas,scif-r8a7795",
 600                                      "renesas,rcar-gen3-scif", "renesas,scif";
 601                         reg = <0 0xe6e60000 0 64>;
 602                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 603                         clocks = <&cpg CPG_MOD 207>,
 604                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 605                                  <&scif_clk>;
 606                         clock-names = "fck", "brg_int", "scif_clk";
 607                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 608                         dma-names = "tx", "rx";
 609                         power-domains = <&cpg>;
 610                         status = "disabled";
 611                 };
 612
 613                 scif1: serial@e6e68000 {
 614                         compatible = "renesas,scif-r8a7795",
 615                                      "renesas,rcar-gen3-scif", "renesas,scif";
 616                         reg = <0 0xe6e68000 0 64>;
 617                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 618                         clocks = <&cpg CPG_MOD 206>,
 619                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 620                                  <&scif_clk>;
 621                         clock-names = "fck", "brg_int", "scif_clk";
 622                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 623                         dma-names = "tx", "rx";
 624                         power-domains = <&cpg>;
 625                         status = "disabled";
 626                 };
 627
 628                 scif2: serial@e6e88000 {
 629                         compatible = "renesas,scif-r8a7795",
 630                                      "renesas,rcar-gen3-scif", "renesas,scif";
 631                         reg = <0 0xe6e88000 0 64>;
 632                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 633                         clocks = <&cpg CPG_MOD 310>,
 634                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 635                                  <&scif_clk>;
 636                         clock-names = "fck", "brg_int", "scif_clk";
 637                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 638                         dma-names = "tx", "rx";
 639                         power-domains = <&cpg>;
 640                         status = "disabled";
 641                 };
 642
 643                 scif3: serial@e6c50000 {
 644                         compatible = "renesas,scif-r8a7795",
 645                                      "renesas,rcar-gen3-scif", "renesas,scif";
 646                         reg = <0 0xe6c50000 0 64>;
 647                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 648                         clocks = <&cpg CPG_MOD 204>,
 649                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 650                                  <&scif_clk>;
 651                         clock-names = "fck", "brg_int", "scif_clk";
 652                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 653                         dma-names = "tx", "rx";
 654                         power-domains = <&cpg>;
 655                         status = "disabled";
 656                 };
 657
 658                 scif4: serial@e6c40000 {
 659                         compatible = "renesas,scif-r8a7795",
 660                                      "renesas,rcar-gen3-scif", "renesas,scif";
 661                         reg = <0 0xe6c40000 0 64>;
 662                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 663                         clocks = <&cpg CPG_MOD 203>,
 664                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 665                                  <&scif_clk>;
 666                         clock-names = "fck", "brg_int", "scif_clk";
 667                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 668                         dma-names = "tx", "rx";
 669                         power-domains = <&cpg>;
 670                         status = "disabled";
 671                 };
 672
 673                 scif5: serial@e6f30000 {
 674                         compatible = "renesas,scif-r8a7795",
 675                                      "renesas,rcar-gen3-scif", "renesas,scif";
 676                         reg = <0 0xe6f30000 0 64>;
 677                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 678                         clocks = <&cpg CPG_MOD 202>,
 679                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 680                                  <&scif_clk>;
 681                         clock-names = "fck", "brg_int", "scif_clk";
 682                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 683                         dma-names = "tx", "rx";
 684                         power-domains = <&cpg>;
 685                         status = "disabled";
 686                 };
 687
 688                 i2c0: i2c@e6500000 {
 689                         #address-cells = <1>;
 690                         #size-cells = <0>;
 691                         compatible = "renesas,i2c-r8a7795";
 692                         reg = <0 0xe6500000 0 0x40>;
 693                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 694                         clocks = <&cpg CPG_MOD 931>;
 695                         power-domains = <&cpg>;
 696                         i2c-scl-internal-delay-ns = <110>;
 697                         status = "disabled";
 698                 };
 699
 700                 i2c1: i2c@e6508000 {
 701                         #address-cells = <1>;
 702                         #size-cells = <0>;
 703                         compatible = "renesas,i2c-r8a7795";
 704                         reg = <0 0xe6508000 0 0x40>;
 705                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 930>;
 707                         power-domains = <&cpg>;
 708                         i2c-scl-internal-delay-ns = <6>;
 709                         status = "disabled";
 710                 };
 711
 712                 i2c2: i2c@e6510000 {
 713                         #address-cells = <1>;
 714                         #size-cells = <0>;
 715                         compatible = "renesas,i2c-r8a7795";
 716                         reg = <0 0xe6510000 0 0x40>;
 717                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 929>;
 719                         power-domains = <&cpg>;
 720                         i2c-scl-internal-delay-ns = <6>;
 721                         status = "disabled";
 722                 };
 723
 724                 i2c3: i2c@e66d0000 {
 725                         #address-cells = <1>;
 726                         #size-cells = <0>;
 727                         compatible = "renesas,i2c-r8a7795";
 728                         reg = <0 0xe66d0000 0 0x40>;
 729                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 730                         clocks = <&cpg CPG_MOD 928>;
 731                         power-domains = <&cpg>;
 732                         i2c-scl-internal-delay-ns = <110>;
 733                         status = "disabled";
 734                 };
 735
 736                 i2c4: i2c@e66d8000 {
 737                         #address-cells = <1>;
 738                         #size-cells = <0>;
 739                         compatible = "renesas,i2c-r8a7795";
 740                         reg = <0 0xe66d8000 0 0x40>;
 741                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 742                         clocks = <&cpg CPG_MOD 927>;
 743                         power-domains = <&cpg>;
 744                         i2c-scl-internal-delay-ns = <110>;
 745                         status = "disabled";
 746                 };
 747
 748                 i2c5: i2c@e66e0000 {
 749                         #address-cells = <1>;
 750                         #size-cells = <0>;
 751                         compatible = "renesas,i2c-r8a7795";
 752                         reg = <0 0xe66e0000 0 0x40>;
 753                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 754                         clocks = <&cpg CPG_MOD 919>;
 755                         power-domains = <&cpg>;
 756                         i2c-scl-internal-delay-ns = <110>;
 757                         status = "disabled";
 758                 };
 759
 760                 i2c6: i2c@e66e8000 {
 761                         #address-cells = <1>;
 762                         #size-cells = <0>;
 763                         compatible = "renesas,i2c-r8a7795";
 764                         reg = <0 0xe66e8000 0 0x40>;
 765                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 766                         clocks = <&cpg CPG_MOD 918>;
 767                         power-domains = <&cpg>;
 768                         i2c-scl-internal-delay-ns = <6>;
 769                         status = "disabled";
 770                 };
 771
 772                 rcar_sound: sound@ec500000 {
 773                         /*
 774                          * #sound-dai-cells is required
 775                          *
 776                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 777                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 778                          */
 779                         /*
 780                          * #clock-cells is required for audio_clkout0/1/2/3
 781                          *
 782                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 783                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 784                          */
 785                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 786                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 787                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 788                                 <0 0xec540000 0 0x1000>, /* SSIU */
 789                                 <0 0xec541000 0 0x280>,  /* SSI */
 790                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 791                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 792
 793                         clocks = <&cpg CPG_MOD 1005>,
 794                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 795                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 796                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 797                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 798                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 799                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 800                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 801                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 802                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 803                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 804                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 805                                  <&audio_clk_a>, <&audio_clk_b>,
 806                                  <&audio_clk_c>,
 807                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 808                         clock-names = "ssi-all",
 809                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 810                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 811                                       "ssi.1", "ssi.0",
 812                                       "src.9", "src.8", "src.7", "src.6",
 813                                       "src.5", "src.4", "src.3", "src.2",
 814                                       "src.1", "src.0",
 815                                       "dvc.0", "dvc.1",
 816                                       "clk_a", "clk_b", "clk_c", "clk_i";
 817                         power-domains = <&cpg>;
 818                         status = "disabled";
 819
 820                         rcar_sound,dvc {
 821                                 dvc0: dvc@0 {
 822                                         dmas = <&audma0 0xbc>;
 823                                         dma-names = "tx";
 824                                 };
 825                                 dvc1: dvc@1 {
 826                                         dmas = <&audma0 0xbe>;
 827                                         dma-names = "tx";
 828                                 };
 829                         };
 830
 831                         rcar_sound,src {
 832                                 src0: src@0 {
 833                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 834                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 835                                         dma-names = "rx", "tx";
 836                                 };
 837                                 src1: src@1 {
 838                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 839                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 840                                         dma-names = "rx", "tx";
 841                                 };
 842                                 src2: src@2 {
 843                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 844                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 845                                         dma-names = "rx", "tx";
 846                                 };
 847                                 src3: src@3 {
 848                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 849                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 850                                         dma-names = "rx", "tx";
 851                                 };
 852                                 src4: src@4 {
 853                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 854                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 855                                         dma-names = "rx", "tx";
 856                                 };
 857                                 src5: src@5 {
 858                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 859                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 860                                         dma-names = "rx", "tx";
 861                                 };
 862                                 src6: src@6 {
 863                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 864                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 865                                         dma-names = "rx", "tx";
 866                                 };
 867                                 src7: src@7 {
 868                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 869                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 870                                         dma-names = "rx", "tx";
 871                                 };
 872                                 src8: src@8 {
 873                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 874                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 875                                         dma-names = "rx", "tx";
 876                                 };
 877                                 src9: src@9 {
 878                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 879                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 880                                         dma-names = "rx", "tx";
 881                                 };
 882                         };
 883
 884                         rcar_sound,ssi {
 885                                 ssi0: ssi@0 {
 886                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 887                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 888                                         dma-names = "rx", "tx", "rxu", "txu";
 889                                 };
 890                                 ssi1: ssi@1 {
 891                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
 892                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
 893                                         dma-names = "rx", "tx", "rxu", "txu";
 894                                 };
 895                                 ssi2: ssi@2 {
 896                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
 897                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
 898                                         dma-names = "rx", "tx", "rxu", "txu";
 899                                 };
 900                                 ssi3: ssi@3 {
 901                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
 902                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
 903                                         dma-names = "rx", "tx", "rxu", "txu";
 904                                 };
 905                                 ssi4: ssi@4 {
 906                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
 907                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
 908                                         dma-names = "rx", "tx", "rxu", "txu";
 909                                 };
 910                                 ssi5: ssi@5 {
 911                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
 912                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
 913                                         dma-names = "rx", "tx", "rxu", "txu";
 914                                 };
 915                                 ssi6: ssi@6 {
 916                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
 917                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
 918                                         dma-names = "rx", "tx", "rxu", "txu";
 919                                 };
 920                                 ssi7: ssi@7 {
 921                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
 922                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
 923                                         dma-names = "rx", "tx", "rxu", "txu";
 924                                 };
 925                                 ssi8: ssi@8 {
 926                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
 927                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
 928                                         dma-names = "rx", "tx", "rxu", "txu";
 929                                 };
 930                                 ssi9: ssi@9 {
 931                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
 932                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
 933                                         dma-names = "rx", "tx", "rxu", "txu";
 934                                 };
 935                         };
 936                 };
 937
 938                 sata: sata@ee300000 {
 939                         compatible = "renesas,sata-r8a7795";
 940                         reg = <0 0xee300000 0 0x1fff>;
 941                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 942                         clocks = <&cpg CPG_MOD 815>;
 943                         status = "disabled";
 944                 };
 945
 946                 xhci0: usb@ee000000 {
 947                         compatible = "renesas,xhci-r8a7795";
 948                         reg = <0 0xee000000 0 0xc00>;
 949                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 950                         clocks = <&cpg CPG_MOD 328>;
 951                         power-domains = <&cpg>;
 952                         status = "disabled";
 953                 };
 954
 955                 xhci1: usb@ee0400000 {
 956                         compatible = "renesas,xhci-r8a7795";
 957                         reg = <0 0xee040000 0 0xc00>;
 958                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 959                         clocks = <&cpg CPG_MOD 327>;
 960                         power-domains = <&cpg>;
 961                         status = "disabled";
 962                 };
 963
 964                 usb_dmac0: dma-controller@e65a0000 {
 965                         compatible = "renesas,r8a7795-usb-dmac",
 966                                      "renesas,usb-dmac";
 967                         reg = <0 0xe65a0000 0 0x100>;
 968                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 969                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 970                         interrupt-names = "ch0", "ch1";
 971                         clocks = <&cpg CPG_MOD 330>;
 972                         power-domains = <&cpg>;
 973                         #dma-cells = <1>;
 974                         dma-channels = <2>;
 975                 };
 976
 977                 usb_dmac1: dma-controller@e65b0000 {
 978                         compatible = "renesas,r8a7795-usb-dmac",
 979                                      "renesas,usb-dmac";
 980                         reg = <0 0xe65b0000 0 0x100>;
 981                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 982                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 983                         interrupt-names = "ch0", "ch1";
 984                         clocks = <&cpg CPG_MOD 331>;
 985                         power-domains = <&cpg>;
 986                         #dma-cells = <1>;
 987                         dma-channels = <2>;
 988                 };
 989
 990                 sdhi0: sd@ee100000 {
 991                         compatible = "renesas,sdhi-r8a7795";
 992                         reg = <0 0xee100000 0 0x2000>;
 993                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 994                         clocks = <&cpg CPG_MOD 314>;
 995                         power-domains = <&cpg>;
 996                         status = "disabled";
 997                 };
 998
 999                 sdhi1: sd@ee120000 {
1000                         compatible = "renesas,sdhi-r8a7795";
1001                         reg = <0 0xee120000 0 0x2000>;
1002                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1003                         clocks = <&cpg CPG_MOD 313>;
1004                         power-domains = <&cpg>;
1005                         status = "disabled";
1006                 };
1007
1008                 sdhi2: sd@ee140000 {
1009                         compatible = "renesas,sdhi-r8a7795";
1010                         reg = <0 0xee140000 0 0x2000>;
1011                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1012                         clocks = <&cpg CPG_MOD 312>;
1013                         power-domains = <&cpg>;
1014                         cap-mmc-highspeed;
1015                         status = "disabled";
1016                 };
1017
1018                 sdhi3: sd@ee160000 {
1019                         compatible = "renesas,sdhi-r8a7795";
1020                         reg = <0 0xee160000 0 0x2000>;
1021                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1022                         clocks = <&cpg CPG_MOD 311>;
1023                         power-domains = <&cpg>;
1024                         cap-mmc-highspeed;
1025                         status = "disabled";
1026                 };
1027
1028                 usb2_phy0: usb-phy@ee080200 {
1029                         compatible = "renesas,usb2-phy-r8a7795";
1030                         reg = <0 0xee080200 0 0x700>;
1031                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1032                         clocks = <&cpg CPG_MOD 703>;
1033                         power-domains = <&cpg>;
1034                         #phy-cells = <0>;
1035                         status = "disabled";
1036                 };
1037
1038                 usb2_phy1: usb-phy@ee0a0200 {
1039                         compatible = "renesas,usb2-phy-r8a7795";
1040                         reg = <0 0xee0a0200 0 0x700>;
1041                         clocks = <&cpg CPG_MOD 702>;
1042                         power-domains = <&cpg>;
1043                         #phy-cells = <0>;
1044                         status = "disabled";
1045                 };
1046
1047                 usb2_phy2: usb-phy@ee0c0200 {
1048                         compatible = "renesas,usb2-phy-r8a7795";
1049                         reg = <0 0xee0c0200 0 0x700>;
1050                         clocks = <&cpg CPG_MOD 701>;
1051                         power-domains = <&cpg>;
1052                         #phy-cells = <0>;
1053                         status = "disabled";
1054                 };
1055
1056                 ehci0: usb@ee080100 {
1057                         compatible = "generic-ehci";
1058                         reg = <0 0xee080100 0 0x100>;
1059                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1060                         clocks = <&cpg CPG_MOD 703>;
1061                         phys = <&usb2_phy0>;
1062                         phy-names = "usb";
1063                         power-domains = <&cpg>;
1064                         status = "disabled";
1065                 };
1066
1067                 ehci1: usb@ee0a0100 {
1068                         compatible = "generic-ehci";
1069                         reg = <0 0xee0a0100 0 0x100>;
1070                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1071                         clocks = <&cpg CPG_MOD 702>;
1072                         phys = <&usb2_phy1>;
1073                         phy-names = "usb";
1074                         power-domains = <&cpg>;
1075                         status = "disabled";
1076                 };
1077
1078                 ehci2: usb@ee0c0100 {
1079                         compatible = "generic-ehci";
1080                         reg = <0 0xee0c0100 0 0x100>;
1081                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1082                         clocks = <&cpg CPG_MOD 701>;
1083                         phys = <&usb2_phy2>;
1084                         phy-names = "usb";
1085                         power-domains = <&cpg>;
1086                         status = "disabled";
1087                 };
1088
1089                 ohci0: usb@ee080000 {
1090                         compatible = "generic-ohci";
1091                         reg = <0 0xee080000 0 0x100>;
1092                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1093                         clocks = <&cpg CPG_MOD 703>;
1094                         phys = <&usb2_phy0>;
1095                         phy-names = "usb";
1096                         power-domains = <&cpg>;
1097                         status = "disabled";
1098                 };
1099
1100                 ohci1: usb@ee0a0000 {
1101                         compatible = "generic-ohci";
1102                         reg = <0 0xee0a0000 0 0x100>;
1103                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1104                         clocks = <&cpg CPG_MOD 702>;
1105                         phys = <&usb2_phy1>;
1106                         phy-names = "usb";
1107                         power-domains = <&cpg>;
1108                         status = "disabled";
1109                 };
1110
1111                 ohci2: usb@ee0c0000 {
1112                         compatible = "generic-ohci";
1113                         reg = <0 0xee0c0000 0 0x100>;
1114                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1115                         clocks = <&cpg CPG_MOD 701>;
1116                         phys = <&usb2_phy2>;
1117                         phy-names = "usb";
1118                         power-domains = <&cpg>;
1119                         status = "disabled";
1120                 };
1121         };
1122 };