2 * Device Tree Source for the Salvator-X board
4 * Copyright (C) 2015 Renesas Electronics Corp.
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
14 * This command is required when Playback/Capture
16 * amixer set "DVC Out" 100%
17 * amixer set "DVC In" 100%
21 * amixer set "DVC Out Mute" on
22 * amixer set "DVC In Mute" on
24 * You can use Volume Ramp
26 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
27 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
28 * amixer set "DVC Out Ramp" on
30 * amixer set "DVC Out" 80% // Volume Down
31 * amixer set "DVC Out" 100% // Volume Up
35 #include "r8a7795.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
39 model = "Renesas Salvator-X board based on r8a7795";
40 compatible = "renesas,salvator-x", "renesas,r8a7795";
49 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
50 stdout-path = "serial0:115200n8";
54 device_type = "memory";
55 /* first 128MB is reserved for secure area. */
56 reg = <0x0 0x48000000 0x0 0x38000000>;
60 compatible = "fixed-clock";
62 clock-frequency = <24576000>;
65 reg_1p8v: regulator0 {
66 compatible = "regulator-fixed";
67 regulator-name = "fixed-1.8V";
68 regulator-min-microvolt = <1800000>;
69 regulator-max-microvolt = <1800000>;
74 reg_3p3v: regulator1 {
75 compatible = "regulator-fixed";
76 regulator-name = "fixed-3.3V";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
83 vcc_sdhi0: regulator-vcc-sdhi0 {
84 compatible = "regulator-fixed";
86 regulator-name = "SDHI0 Vcc";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
90 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
94 vccq_sdhi0: regulator-vccq-sdhi0 {
95 compatible = "regulator-gpio";
97 regulator-name = "SDHI0 VccQ";
98 regulator-min-microvolt = <1800000>;
99 regulator-max-microvolt = <3300000>;
101 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
107 vcc_sdhi3: regulator-vcc-sdhi3 {
108 compatible = "regulator-fixed";
110 regulator-name = "SDHI3 Vcc";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
114 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
118 vccq_sdhi3: regulator-vccq-sdhi3 {
119 compatible = "regulator-gpio";
121 regulator-name = "SDHI3 VccQ";
122 regulator-min-microvolt = <1800000>;
123 regulator-max-microvolt = <3300000>;
125 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
131 vbus0_usb2: regulator-vbus0-usb2 {
132 compatible = "regulator-fixed";
134 regulator-name = "USB20_VBUS0";
135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
138 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
142 audio_clkout: audio_clkout {
144 * This is same as <&rcar_sound 0>
145 * but needed to avoid cs2000/rcar_sound probe dead-lock
147 compatible = "fixed-clock";
149 clock-frequency = <11289600>;
153 compatible = "simple-audio-card";
155 simple-audio-card,format = "left_j";
156 simple-audio-card,bitclock-master = <&sndcpu>;
157 simple-audio-card,frame-master = <&sndcpu>;
159 sndcpu: simple-audio-card,cpu {
160 sound-dai = <&rcar_sound>;
163 sndcodec: simple-audio-card,codec {
164 sound-dai = <&ak4613>;
169 compatible = "adi,adv7123";
172 #address-cells = <1>;
177 adv7123_in: endpoint {
178 remote-endpoint = <&du_out_rgb>;
183 adv7123_out: endpoint {
184 remote-endpoint = <&vga_in>;
191 compatible = "vga-connector";
195 remote-endpoint = <&adv7123_out>;
202 pinctrl-0 = <&du_pins>;
203 pinctrl-names = "default";
209 remote-endpoint = <&adv7123_in>;
213 lvds_connector: endpoint {
220 clock-frequency = <16666666>;
224 clock-frequency = <32768>;
228 pinctrl-0 = <&scif_clk_pins>;
229 pinctrl-names = "default";
232 groups = "scif1_data_a", "scif1_ctrl";
236 groups = "scif2_data_a";
239 scif_clk_pins: scif_clk {
240 groups = "scif_clk_a";
241 function = "scif_clk";
255 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
260 groups = "sdhi0_data4", "sdhi0_ctrl";
262 power-source = <3300>;
265 sdhi0_pins_uhs: sd0_uhs {
266 groups = "sdhi0_data4", "sdhi0_ctrl";
268 power-source = <1800>;
272 groups = "sdhi2_data8", "sdhi2_ctrl";
274 power-source = <3300>;
277 sdhi2_pins_uhs: sd2_uhs {
278 groups = "sdhi2_data8", "sdhi2_ctrl";
280 power-source = <1800>;
284 groups = "sdhi3_data4", "sdhi3_ctrl";
286 power-source = <3300>;
289 sdhi3_pins_uhs: sd3_uhs {
290 groups = "sdhi3_data4", "sdhi3_ctrl";
292 power-source = <1800>;
296 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
300 sound_clk_pins: sound_clk {
301 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
302 "audio_clkout_a", "audio_clkout3_a";
303 function = "audio_clk";
335 pinctrl-0 = <&scif1_pins>;
336 pinctrl-names = "default";
343 pinctrl-0 = <&scif2_pins>;
344 pinctrl-names = "default";
350 clock-frequency = <14745600>;
355 pinctrl-0 = <&i2c2_pins>;
356 pinctrl-names = "default";
360 clock-frequency = <100000>;
363 compatible = "asahi-kasei,ak4613";
364 #sound-dai-cells = <0>;
366 clocks = <&rcar_sound 3>;
368 asahi-kasei,in1-single-end;
369 asahi-kasei,in2-single-end;
370 asahi-kasei,out1-single-end;
371 asahi-kasei,out2-single-end;
372 asahi-kasei,out3-single-end;
373 asahi-kasei,out4-single-end;
374 asahi-kasei,out5-single-end;
375 asahi-kasei,out6-single-end;
378 cs2000: clk_multiplier@4f {
380 compatible = "cirrus,cs2000-cp";
382 clocks = <&audio_clkout>, <&x12_clk>;
383 clock-names = "clk_in", "ref_clk";
385 assigned-clocks = <&cs2000>;
386 assigned-clock-rates = <24576000>; /* 1/1 divide */
391 pinctrl-0 = <&sound_pins &sound_clk_pins>;
392 pinctrl-names = "default";
395 #sound-dai-cells = <0>;
397 /* audio_clkout0/1/2/3 */
399 clock-frequency = <11289600>;
403 /* update <audio_clk_b> to <cs2000> */
404 clocks = <&cpg CPG_MOD 1005>,
405 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
406 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
407 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
408 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
409 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
410 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
411 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
412 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
413 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
414 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
415 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
416 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
417 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
418 <&audio_clk_a>, <&cs2000>,
420 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
424 playback = <&ssi0 &src0 &dvc0>;
425 capture = <&ssi1 &src1 &dvc1>;
435 pinctrl-0 = <&sdhi0_pins>;
436 pinctrl-1 = <&sdhi0_pins_uhs>;
437 pinctrl-names = "default", "state_uhs";
439 vmmc-supply = <&vcc_sdhi0>;
440 vqmmc-supply = <&vccq_sdhi0>;
441 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
442 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
449 /* used for on-board 8bit eMMC */
450 pinctrl-0 = <&sdhi2_pins>;
451 pinctrl-1 = <&sdhi2_pins_uhs>;
452 pinctrl-names = "default", "state_uhs";
454 vmmc-supply = <®_3p3v>;
455 vqmmc-supply = <®_1p8v>;
462 pinctrl-0 = <&sdhi3_pins>;
463 pinctrl-1 = <&sdhi3_pins_uhs>;
464 pinctrl-names = "default", "state_uhs";
466 vmmc-supply = <&vcc_sdhi3>;
467 vqmmc-supply = <&vccq_sdhi3>;
468 cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
469 wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
485 clock-frequency = <22579200>;
489 pinctrl-0 = <&avb_pins>;
490 pinctrl-names = "default";
491 renesas,no-ether-link;
492 phy-handle = <&phy0>;
495 phy0: ethernet-phy@0 {
509 interrupt-parent = <&gpio2>;
510 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
519 pinctrl-0 = <&usb0_pins>;
520 pinctrl-names = "default";
522 vbus-supply = <&vbus0_usb2>;
527 pinctrl-0 = <&usb1_pins>;
528 pinctrl-names = "default";
534 pinctrl-0 = <&usb2_pins>;
535 pinctrl-names = "default";
569 clock-frequency = <100000000>;