arch/arm64/boot/dts/renesas/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/renesas-cpg-mssr.h>
  11
  12 / {
  13         compatible = "renesas,r8a774a1";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         aliases {
  18                 i2c0 = &i2c0;
  19                 i2c1 = &i2c1;
  20                 i2c2 = &i2c2;
  21                 i2c3 = &i2c3;
  22                 i2c4 = &i2c4;
  23                 i2c5 = &i2c5;
  24                 i2c6 = &i2c6;
  25                 i2c7 = &i2c_dvfs;
  26         };
  27
  28         /*
  29          * The external audio clocks are configured as 0 Hz fixed frequency
  30          * clocks by default.
  31          * Boards that provide audio clocks should override them.
  32          */
  33         audio_clk_a: audio_clk_a {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         audio_clk_b: audio_clk_b {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44
  45         audio_clk_c: audio_clk_c {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50
  51         /* External CAN clock - to be overridden by boards that provide it */
  52         can_clk: can {
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <0>;
  56         };
  57
  58         cpus {
  59                 #address-cells = <1>;
  60                 #size-cells = <0>;
  61
  62                 a57_0: cpu@0 {
  63                         compatible = "arm,cortex-a57", "arm,armv8";
  64                         reg = <0x0>;
  65                         device_type = "cpu";
  66                         power-domains = <&sysc 0>;
  67                         next-level-cache = <&L2_CA57>;
  68                         enable-method = "psci";
  69                         clocks = <&cpg CPG_CORE 0>;
  70                 };
  71
  72                 a57_1: cpu@1 {
  73                         compatible = "arm,cortex-a57", "arm,armv8";
  74                         reg = <0x1>;
  75                         device_type = "cpu";
  76                         power-domains = <&sysc 1>;
  77                         next-level-cache = <&L2_CA57>;
  78                         enable-method = "psci";
  79                         clocks = <&cpg CPG_CORE 0>;
  80                 };
  81
  82                 a53_0: cpu@100 {
  83                         compatible = "arm,cortex-a53", "arm,armv8";
  84                         reg = <0x100>;
  85                         device_type = "cpu";
  86                         power-domains = <&sysc 5>;
  87                         next-level-cache = <&L2_CA53>;
  88                         enable-method = "psci";
  89                         clocks =<&cpg CPG_CORE 1>;
  90                 };
  91
  92                 a53_1: cpu@101 {
  93                         compatible = "arm,cortex-a53", "arm,armv8";
  94                         reg = <0x101>;
  95                         device_type = "cpu";
  96                         power-domains = <&sysc 6>;
  97                         next-level-cache = <&L2_CA53>;
  98                         enable-method = "psci";
  99                         clocks =<&cpg CPG_CORE 1>;
 100                 };
 101
 102                 a53_2: cpu@102 {
 103                         compatible = "arm,cortex-a53", "arm,armv8";
 104                         reg = <0x102>;
 105                         device_type = "cpu";
 106                         power-domains = <&sysc 7>;
 107                         next-level-cache = <&L2_CA53>;
 108                         enable-method = "psci";
 109                         clocks =<&cpg CPG_CORE 1>;
 110                 };
 111
 112                 a53_3: cpu@103 {
 113                         compatible = "arm,cortex-a53", "arm,armv8";
 114                         reg = <0x103>;
 115                         device_type = "cpu";
 116                         power-domains = <&sysc 8>;
 117                         next-level-cache = <&L2_CA53>;
 118                         enable-method = "psci";
 119                         clocks =<&cpg CPG_CORE 1>;
 120                 };
 121
 122                 L2_CA57: cache-controller-0 {
 123                         compatible = "cache";
 124                         power-domains = <&sysc 12>;
 125                         cache-unified;
 126                         cache-level = <2>;
 127                 };
 128
 129                 L2_CA53: cache-controller-1 {
 130                         compatible = "cache";
 131                         power-domains = <&sysc 21>;
 132                         cache-unified;
 133                         cache-level = <2>;
 134                 };
 135         };
 136
 137         extal_clk: extal {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 /* This value must be overridden by the board */
 141                 clock-frequency = <0>;
 142         };
 143
 144         extalr_clk: extalr {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 /* This value must be overridden by the board */
 148                 clock-frequency = <0>;
 149         };
 150
 151         /* External PCIe clock - can be overridden by the board */
 152         pcie_bus_clk: pcie_bus {
 153                 compatible = "fixed-clock";
 154                 #clock-cells = <0>;
 155                 clock-frequency = <0>;
 156         };
 157
 158         pmu_a53 {
 159                 compatible = "arm,cortex-a53-pmu";
 160                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 161                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 162                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 163                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 164                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 165         };
 166
 167         pmu_a57 {
 168                 compatible = "arm,cortex-a57-pmu";
 169                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 170                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 171                 interrupt-affinity = <&a57_0>, <&a57_1>;
 172         };
 173
 174         psci {
 175                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 176                 method = "smc";
 177         };
 178
 179         /* External SCIF clock - to be overridden by boards that provide it */
 180         scif_clk: scif {
 181                 compatible = "fixed-clock";
 182                 #clock-cells = <0>;
 183                 clock-frequency = <0>;
 184         };
 185
 186         soc {
 187                 compatible = "simple-bus";
 188                 interrupt-parent = <&gic>;
 189                 #address-cells = <2>;
 190                 #size-cells = <2>;
 191                 ranges;
 192
 193                 rwdt: watchdog@e6020000 {
 194                         compatible = "renesas,r8a774a1-wdt",
 195                                      "renesas,rcar-gen3-wdt";
 196                         reg = <0 0xe6020000 0 0x0c>;
 197                         clocks = <&cpg CPG_MOD 402>;
 198                         power-domains = <&sysc 32>;
 199                         resets = <&cpg 402>;
 200                         status = "disabled";
 201                 };
 202
 203                 gpio0: gpio@e6050000 {
 204                         compatible = "renesas,gpio-r8a774a1",
 205                                      "renesas,rcar-gen3-gpio";
 206                         reg = <0 0xe6050000 0 0x50>;
 207                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 208                         #gpio-cells = <2>;
 209                         gpio-controller;
 210                         gpio-ranges = <&pfc 0 0 16>;
 211                         #interrupt-cells = <2>;
 212                         interrupt-controller;
 213                         clocks = <&cpg CPG_MOD 912>;
 214                         power-domains = <&sysc 32>;
 215                         resets = <&cpg 912>;
 216                 };
 217
 218                 gpio1: gpio@e6051000 {
 219                         compatible = "renesas,gpio-r8a774a1",
 220                                      "renesas,rcar-gen3-gpio";
 221                         reg = <0 0xe6051000 0 0x50>;
 222                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 223                         #gpio-cells = <2>;
 224                         gpio-controller;
 225                         gpio-ranges = <&pfc 0 32 29>;
 226                         #interrupt-cells = <2>;
 227                         interrupt-controller;
 228                         clocks = <&cpg CPG_MOD 911>;
 229                         power-domains = <&sysc 32>;
 230                         resets = <&cpg 911>;
 231                 };
 232
 233                 gpio2: gpio@e6052000 {
 234                         compatible = "renesas,gpio-r8a774a1",
 235                                      "renesas,rcar-gen3-gpio";
 236                         reg = <0 0xe6052000 0 0x50>;
 237                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 238                         #gpio-cells = <2>;
 239                         gpio-controller;
 240                         gpio-ranges = <&pfc 0 64 15>;
 241                         #interrupt-cells = <2>;
 242                         interrupt-controller;
 243                         clocks = <&cpg CPG_MOD 910>;
 244                         power-domains = <&sysc 32>;
 245                         resets = <&cpg 910>;
 246                 };
 247
 248                 gpio3: gpio@e6053000 {
 249                         compatible = "renesas,gpio-r8a774a1",
 250                                      "renesas,rcar-gen3-gpio";
 251                         reg = <0 0xe6053000 0 0x50>;
 252                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 253                         #gpio-cells = <2>;
 254                         gpio-controller;
 255                         gpio-ranges = <&pfc 0 96 16>;
 256                         #interrupt-cells = <2>;
 257                         interrupt-controller;
 258                         clocks = <&cpg CPG_MOD 909>;
 259                         power-domains = <&sysc 32>;
 260                         resets = <&cpg 909>;
 261                 };
 262
 263                 gpio4: gpio@e6054000 {
 264                         compatible = "renesas,gpio-r8a774a1",
 265                                      "renesas,rcar-gen3-gpio";
 266                         reg = <0 0xe6054000 0 0x50>;
 267                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 128 18>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 908>;
 274                         power-domains = <&sysc 32>;
 275                         resets = <&cpg 908>;
 276                 };
 277
 278                 gpio5: gpio@e6055000 {
 279                         compatible = "renesas,gpio-r8a774a1",
 280                                      "renesas,rcar-gen3-gpio";
 281                         reg = <0 0xe6055000 0 0x50>;
 282                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 283                         #gpio-cells = <2>;
 284                         gpio-controller;
 285                         gpio-ranges = <&pfc 0 160 26>;
 286                         #interrupt-cells = <2>;
 287                         interrupt-controller;
 288                         clocks = <&cpg CPG_MOD 907>;
 289                         power-domains = <&sysc 32>;
 290                         resets = <&cpg 907>;
 291                 };
 292
 293                 gpio6: gpio@e6055400 {
 294                         compatible = "renesas,gpio-r8a774a1",
 295                                      "renesas,rcar-gen3-gpio";
 296                         reg = <0 0xe6055400 0 0x50>;
 297                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 298                         #gpio-cells = <2>;
 299                         gpio-controller;
 300                         gpio-ranges = <&pfc 0 192 32>;
 301                         #interrupt-cells = <2>;
 302                         interrupt-controller;
 303                         clocks = <&cpg CPG_MOD 906>;
 304                         power-domains = <&sysc 32>;
 305                         resets = <&cpg 906>;
 306                 };
 307
 308                 gpio7: gpio@e6055800 {
 309                         compatible = "renesas,gpio-r8a774a1",
 310                                      "renesas,rcar-gen3-gpio";
 311                         reg = <0 0xe6055800 0 0x50>;
 312                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 313                         #gpio-cells = <2>;
 314                         gpio-controller;
 315                         gpio-ranges = <&pfc 0 224 4>;
 316                         #interrupt-cells = <2>;
 317                         interrupt-controller;
 318                         clocks = <&cpg CPG_MOD 905>;
 319                         power-domains = <&sysc 32>;
 320                         resets = <&cpg 905>;
 321                 };
 322
 323                 pfc: pin-controller@e6060000 {
 324                         compatible = "renesas,pfc-r8a774a1";
 325                         reg = <0 0xe6060000 0 0x50c>;
 326                 };
 327
 328                 cpg: clock-controller@e6150000 {
 329                         compatible = "renesas,r8a774a1-cpg-mssr";
 330                         reg = <0 0xe6150000 0 0x0bb0>;
 331                         clocks = <&extal_clk>, <&extalr_clk>;
 332                         clock-names = "extal", "extalr";
 333                         #clock-cells = <2>;
 334                         #power-domain-cells = <0>;
 335                         #reset-cells = <1>;
 336                 };
 337
 338                 rst: reset-controller@e6160000 {
 339                         compatible = "renesas,r8a774a1-rst";
 340                         reg = <0 0xe6160000 0 0x018c>;
 341                 };
 342
 343                 sysc: system-controller@e6180000 {
 344                         compatible = "renesas,r8a774a1-sysc";
 345                         reg = <0 0xe6180000 0 0x0400>;
 346                         #power-domain-cells = <1>;
 347                 };
 348
 349                 tsc: thermal@e6198000 {
 350                         compatible = "renesas,r8a774a1-thermal";
 351                         reg = <0 0xe6198000 0 0x100>,
 352                               <0 0xe61a0000 0 0x100>,
 353                               <0 0xe61a8000 0 0x100>;
 354                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 357                         clocks = <&cpg CPG_MOD 522>;
 358                         power-domains = <&sysc 32>;
 359                         resets = <&cpg 522>;
 360                         #thermal-sensor-cells = <1>;
 361                 };
 362
 363                 intc_ex: interrupt-controller@e61c0000 {
 364                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 365                         #interrupt-cells = <2>;
 366                         interrupt-controller;
 367                         reg = <0 0xe61c0000 0 0x200>;
 368                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 374                         clocks = <&cpg CPG_MOD 407>;
 375                         power-domains = <&sysc 32>;
 376                         resets = <&cpg 407>;
 377                 };
 378
 379                 i2c0: i2c@e6500000 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         compatible = "renesas,i2c-r8a774a1",
 383                                      "renesas,rcar-gen3-i2c";
 384                         reg = <0 0xe6500000 0 0x40>;
 385                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 386                         clocks = <&cpg CPG_MOD 931>;
 387                         power-domains = <&sysc 32>;
 388                         resets = <&cpg 931>;
 389                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 390                                <&dmac2 0x91>, <&dmac2 0x90>;
 391                         dma-names = "tx", "rx", "tx", "rx";
 392                         i2c-scl-internal-delay-ns = <110>;
 393                         status = "disabled";
 394                 };
 395
 396                 i2c1: i2c@e6508000 {
 397                         #address-cells = <1>;
 398                         #size-cells = <0>;
 399                         compatible = "renesas,i2c-r8a774a1",
 400                                      "renesas,rcar-gen3-i2c";
 401                         reg = <0 0xe6508000 0 0x40>;
 402                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 403                         clocks = <&cpg CPG_MOD 930>;
 404                         power-domains = <&sysc 32>;
 405                         resets = <&cpg 930>;
 406                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 407                                <&dmac2 0x93>, <&dmac2 0x92>;
 408                         dma-names = "tx", "rx", "tx", "rx";
 409                         i2c-scl-internal-delay-ns = <6>;
 410                         status = "disabled";
 411                 };
 412
 413                 i2c2: i2c@e6510000 {
 414                         #address-cells = <1>;
 415                         #size-cells = <0>;
 416                         compatible = "renesas,i2c-r8a774a1",
 417                                      "renesas,rcar-gen3-i2c";
 418                         reg = <0 0xe6510000 0 0x40>;
 419                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 929>;
 421                         power-domains = <&sysc 32>;
 422                         resets = <&cpg 929>;
 423                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 424                                <&dmac2 0x95>, <&dmac2 0x94>;
 425                         dma-names = "tx", "rx", "tx", "rx";
 426                         i2c-scl-internal-delay-ns = <6>;
 427                         status = "disabled";
 428                 };
 429
 430                 i2c3: i2c@e66d0000 {
 431                         #address-cells = <1>;
 432                         #size-cells = <0>;
 433                         compatible = "renesas,i2c-r8a774a1",
 434                                      "renesas,rcar-gen3-i2c";
 435                         reg = <0 0xe66d0000 0 0x40>;
 436                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 437                         clocks = <&cpg CPG_MOD 928>;
 438                         power-domains = <&sysc 32>;
 439                         resets = <&cpg 928>;
 440                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 441                         dma-names = "tx", "rx";
 442                         i2c-scl-internal-delay-ns = <110>;
 443                         status = "disabled";
 444                 };
 445
 446                 i2c4: i2c@e66d8000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,i2c-r8a774a1",
 450                                      "renesas,rcar-gen3-i2c";
 451                         reg = <0 0xe66d8000 0 0x40>;
 452                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 927>;
 454                         power-domains = <&sysc 32>;
 455                         resets = <&cpg 927>;
 456                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 457                         dma-names = "tx", "rx";
 458                         i2c-scl-internal-delay-ns = <110>;
 459                         status = "disabled";
 460                 };
 461
 462                 i2c5: i2c@e66e0000 {
 463                         #address-cells = <1>;
 464                         #size-cells = <0>;
 465                         compatible = "renesas,i2c-r8a774a1",
 466                                      "renesas,rcar-gen3-i2c";
 467                         reg = <0 0xe66e0000 0 0x40>;
 468                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 469                         clocks = <&cpg CPG_MOD 919>;
 470                         power-domains = <&sysc 32>;
 471                         resets = <&cpg 919>;
 472                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 473                         dma-names = "tx", "rx";
 474                         i2c-scl-internal-delay-ns = <110>;
 475                         status = "disabled";
 476                 };
 477
 478                 i2c6: i2c@e66e8000 {
 479                         #address-cells = <1>;
 480                         #size-cells = <0>;
 481                         compatible = "renesas,i2c-r8a774a1",
 482                                      "renesas,rcar-gen3-i2c";
 483                         reg = <0 0xe66e8000 0 0x40>;
 484                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 485                         clocks = <&cpg CPG_MOD 918>;
 486                         power-domains = <&sysc 32>;
 487                         resets = <&cpg 918>;
 488                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 489                         dma-names = "tx", "rx";
 490                         i2c-scl-internal-delay-ns = <6>;
 491                         status = "disabled";
 492                 };
 493
 494                 i2c_dvfs: i2c@e60b0000 {
 495                         #address-cells = <1>;
 496                         #size-cells = <0>;
 497                         compatible = "renesas,iic-r8a774a1",
 498                                      "renesas,rcar-gen3-iic",
 499                                      "renesas,rmobile-iic";
 500                         reg = <0 0xe60b0000 0 0x425>;
 501                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&cpg CPG_MOD 926>;
 503                         power-domains = <&sysc 32>;
 504                         resets = <&cpg 926>;
 505                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 506                         dma-names = "tx", "rx";
 507                         status = "disabled";
 508                 };
 509
 510                 hscif0: serial@e6540000 {
 511                         compatible = "renesas,hscif-r8a774a1",
 512                                      "renesas,rcar-gen3-hscif",
 513                                      "renesas,hscif";
 514                         reg = <0 0xe6540000 0 0x60>;
 515                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 516                         clocks = <&cpg CPG_MOD 520>,
 517                                  <&cpg CPG_CORE 19>,
 518                                  <&scif_clk>;
 519                         clock-names = "fck", "brg_int", "scif_clk";
 520                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 521                                <&dmac2 0x31>, <&dmac2 0x30>;
 522                         dma-names = "tx", "rx", "tx", "rx";
 523                         power-domains = <&sysc 32>;
 524                         resets = <&cpg 520>;
 525                         status = "disabled";
 526                 };
 527
 528                 hscif1: serial@e6550000 {
 529                         compatible = "renesas,hscif-r8a774a1",
 530                                      "renesas,rcar-gen3-hscif",
 531                                      "renesas,hscif";
 532                         reg = <0 0xe6550000 0 0x60>;
 533                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 534                         clocks = <&cpg CPG_MOD 519>,
 535                                  <&cpg CPG_CORE 19>,
 536                                  <&scif_clk>;
 537                         clock-names = "fck", "brg_int", "scif_clk";
 538                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 539                                <&dmac2 0x33>, <&dmac2 0x32>;
 540                         dma-names = "tx", "rx", "tx", "rx";
 541                         power-domains = <&sysc 32>;
 542                         resets = <&cpg 519>;
 543                         status = "disabled";
 544                 };
 545
 546                 hscif2: serial@e6560000 {
 547                         compatible = "renesas,hscif-r8a774a1",
 548                                      "renesas,rcar-gen3-hscif",
 549                                      "renesas,hscif";
 550                         reg = <0 0xe6560000 0 0x60>;
 551                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 552                         clocks = <&cpg CPG_MOD 518>,
 553                                  <&cpg CPG_CORE 19>,
 554                                  <&scif_clk>;
 555                         clock-names = "fck", "brg_int", "scif_clk";
 556                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 557                                <&dmac2 0x35>, <&dmac2 0x34>;
 558                         dma-names = "tx", "rx", "tx", "rx";
 559                         power-domains = <&sysc 32>;
 560                         resets = <&cpg 518>;
 561                         status = "disabled";
 562                 };
 563
 564                 hscif3: serial@e66a0000 {
 565                         compatible = "renesas,hscif-r8a774a1",
 566                                      "renesas,rcar-gen3-hscif",
 567                                      "renesas,hscif";
 568                         reg = <0 0xe66a0000 0 0x60>;
 569                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 570                         clocks = <&cpg CPG_MOD 517>,
 571                                  <&cpg CPG_CORE 19>,
 572                                  <&scif_clk>;
 573                         clock-names = "fck", "brg_int", "scif_clk";
 574                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 575                         dma-names = "tx", "rx";
 576                         power-domains = <&sysc 32>;
 577                         resets = <&cpg 517>;
 578                         status = "disabled";
 579                 };
 580
 581                 hscif4: serial@e66b0000 {
 582                         compatible = "renesas,hscif-r8a774a1",
 583                                      "renesas,rcar-gen3-hscif",
 584                                      "renesas,hscif";
 585                         reg = <0 0xe66b0000 0 0x60>;
 586                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 587                         clocks = <&cpg CPG_MOD 516>,
 588                                  <&cpg CPG_CORE 19>,
 589                                  <&scif_clk>;
 590                         clock-names = "fck", "brg_int", "scif_clk";
 591                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 592                         dma-names = "tx", "rx";
 593                         power-domains = <&sysc 32>;
 594                         resets = <&cpg 516>;
 595                         status = "disabled";
 596                 };
 597
 598                 hsusb: usb@e6590000 {
 599                         compatible = "renesas,usbhs-r8a774a1",
 600                                      "renesas,rcar-gen3-usbhs";
 601                         reg = <0 0xe6590000 0 0x100>;
 602                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 603                         clocks = <&cpg CPG_MOD 704>;
 604                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 605                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 606                         dma-names = "ch0", "ch1", "ch2", "ch3";
 607                         renesas,buswait = <11>;
 608                         phys = <&usb2_phy0>;
 609                         phy-names = "usb";
 610                         power-domains = <&sysc 32>;
 611                         resets = <&cpg 704>;
 612                         status = "disabled";
 613                 };
 614
 615                 usb_dmac0: dma-controller@e65a0000 {
 616                         compatible = "renesas,r8a774a1-usb-dmac",
 617                                      "renesas,usb-dmac";
 618                         reg = <0 0xe65a0000 0 0x100>;
 619                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 620                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 621                         interrupt-names = "ch0", "ch1";
 622                         clocks = <&cpg CPG_MOD 330>;
 623                         power-domains = <&sysc 32>;
 624                         resets = <&cpg 330>;
 625                         #dma-cells = <1>;
 626                         dma-channels = <2>;
 627                 };
 628
 629                 usb_dmac1: dma-controller@e65b0000 {
 630                         compatible = "renesas,r8a774a1-usb-dmac",
 631                                      "renesas,usb-dmac";
 632                         reg = <0 0xe65b0000 0 0x100>;
 633                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 634                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 635                         interrupt-names = "ch0", "ch1";
 636                         clocks = <&cpg CPG_MOD 331>;
 637                         power-domains = <&sysc 32>;
 638                         resets = <&cpg 331>;
 639                         #dma-cells = <1>;
 640                         dma-channels = <2>;
 641                 };
 642
 643                 usb3_phy0: usb-phy@e65ee000 {
 644                         compatible = "renesas,r8a774a1-usb3-phy",
 645                                      "renesas,rcar-gen3-usb3-phy";
 646                         reg = <0 0xe65ee000 0 0x90>;
 647                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 648                                  <&usb_extal_clk>;
 649                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 650                         power-domains = <&sysc 32>;
 651                         resets = <&cpg 328>;
 652                         #phy-cells = <0>;
 653                         status = "disabled";
 654                 };
 655
 656                 dmac0: dma-controller@e6700000 {
 657                         compatible = "renesas,dmac-r8a774a1",
 658                                      "renesas,rcar-dmac";
 659                         reg = <0 0xe6700000 0 0x10000>;
 660                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 661                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 663                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 664                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 665                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 666                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 667                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 668                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 669                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 670                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 671                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 672                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 673                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 674                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 675                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 676                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 677                         interrupt-names = "error",
 678                                         "ch0", "ch1", "ch2", "ch3",
 679                                         "ch4", "ch5", "ch6", "ch7",
 680                                         "ch8", "ch9", "ch10", "ch11",
 681                                         "ch12", "ch13", "ch14", "ch15";
 682                         clocks = <&cpg CPG_MOD 219>;
 683                         clock-names = "fck";
 684                         power-domains = <&sysc 32>;
 685                         resets = <&cpg 219>;
 686                         #dma-cells = <1>;
 687                         dma-channels = <16>;
 688                 };
 689
 690                 dmac1: dma-controller@e7300000 {
 691                         compatible = "renesas,dmac-r8a774a1",
 692                                      "renesas,rcar-dmac";
 693                         reg = <0 0xe7300000 0 0x10000>;
 694                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 695                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 696                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 697                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 698                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 699                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 700                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 701                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 702                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 703                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 704                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 705                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 706                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 707                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 708                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 709                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 711                         interrupt-names = "error",
 712                                         "ch0", "ch1", "ch2", "ch3",
 713                                         "ch4", "ch5", "ch6", "ch7",
 714                                         "ch8", "ch9", "ch10", "ch11",
 715                                         "ch12", "ch13", "ch14", "ch15";
 716                         clocks = <&cpg CPG_MOD 218>;
 717                         clock-names = "fck";
 718                         power-domains = <&sysc 32>;
 719                         resets = <&cpg 218>;
 720                         #dma-cells = <1>;
 721                         dma-channels = <16>;
 722                 };
 723
 724                 dmac2: dma-controller@e7310000 {
 725                         compatible = "renesas,dmac-r8a774a1",
 726                                      "renesas,rcar-dmac";
 727                         reg = <0 0xe7310000 0 0x10000>;
 728                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 729                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 730                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 731                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 732                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 733                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 734                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 735                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 736                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 745                         interrupt-names = "error",
 746                                         "ch0", "ch1", "ch2", "ch3",
 747                                         "ch4", "ch5", "ch6", "ch7",
 748                                         "ch8", "ch9", "ch10", "ch11",
 749                                         "ch12", "ch13", "ch14", "ch15";
 750                         clocks = <&cpg CPG_MOD 217>;
 751                         clock-names = "fck";
 752                         power-domains = <&sysc 32>;
 753                         resets = <&cpg 217>;
 754                         #dma-cells = <1>;
 755                         dma-channels = <16>;
 756                 };
 757
 758                 ipmmu_ds0: mmu@e6740000 {
 759                         compatible = "renesas,ipmmu-r8a774a1";
 760                         reg = <0 0xe6740000 0 0x1000>;
 761                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 762                         power-domains = <&sysc 32>;
 763                         #iommu-cells = <1>;
 764                 };
 765
 766                 ipmmu_ds1: mmu@e7740000 {
 767                         compatible = "renesas,ipmmu-r8a774a1";
 768                         reg = <0 0xe7740000 0 0x1000>;
 769                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 770                         power-domains = <&sysc 32>;
 771                         #iommu-cells = <1>;
 772                 };
 773
 774                 ipmmu_hc: mmu@e6570000 {
 775                         compatible = "renesas,ipmmu-r8a774a1";
 776                         reg = <0 0xe6570000 0 0x1000>;
 777                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 778                         power-domains = <&sysc 32>;
 779                         #iommu-cells = <1>;
 780                 };
 781
 782                 ipmmu_mm: mmu@e67b0000 {
 783                         compatible = "renesas,ipmmu-r8a774a1";
 784                         reg = <0 0xe67b0000 0 0x1000>;
 785                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 786                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 787                         power-domains = <&sysc 32>;
 788                         #iommu-cells = <1>;
 789                 };
 790
 791                 ipmmu_mp: mmu@ec670000 {
 792                         compatible = "renesas,ipmmu-r8a774a1";
 793                         reg = <0 0xec670000 0 0x1000>;
 794                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 795                         power-domains = <&sysc 32>;
 796                         #iommu-cells = <1>;
 797                 };
 798
 799                 ipmmu_pv0: mmu@fd800000 {
 800                         compatible = "renesas,ipmmu-r8a774a1";
 801                         reg = <0 0xfd800000 0 0x1000>;
 802                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 803                         power-domains = <&sysc 32>;
 804                         #iommu-cells = <1>;
 805                 };
 806
 807                 ipmmu_pv1: mmu@fd950000 {
 808                         compatible = "renesas,ipmmu-r8a774a1";
 809                         reg = <0 0xfd950000 0 0x1000>;
 810                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 811                         power-domains = <&sysc 32>;
 812                         #iommu-cells = <1>;
 813                 };
 814
 815                 ipmmu_vc0: mmu@fe6b0000 {
 816                         compatible = "renesas,ipmmu-r8a774a1";
 817                         reg = <0 0xfe6b0000 0 0x1000>;
 818                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 819                         power-domains = <&sysc 14>;
 820                         #iommu-cells = <1>;
 821                 };
 822
 823                 ipmmu_vi0: mmu@febd0000 {
 824                         compatible = "renesas,ipmmu-r8a774a1";
 825                         reg = <0 0xfebd0000 0 0x1000>;
 826                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 827                         power-domains = <&sysc 32>;
 828                         #iommu-cells = <1>;
 829                 };
 830
 831                 avb: ethernet@e6800000 {
 832                         compatible = "renesas,etheravb-r8a774a1",
 833                                      "renesas,etheravb-rcar-gen3";
 834                         reg = <0 0xe6800000 0 0x800>;
 835                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 836                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 837                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 838                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 839                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 840                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 841                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 842                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 843                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 844                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 845                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 846                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 847                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 860                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 861                                           "ch4", "ch5", "ch6", "ch7",
 862                                           "ch8", "ch9", "ch10", "ch11",
 863                                           "ch12", "ch13", "ch14", "ch15",
 864                                           "ch16", "ch17", "ch18", "ch19",
 865                                           "ch20", "ch21", "ch22", "ch23",
 866                                           "ch24";
 867                         clocks = <&cpg CPG_MOD 812>;
 868                         power-domains = <&sysc 32>;
 869                         resets = <&cpg 812>;
 870                         phy-mode = "rgmii";
 871                         #address-cells = <1>;
 872                         #size-cells = <0>;
 873                         status = "disabled";
 874                 };
 875
 876                 pwm0: pwm@e6e30000 {
 877                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 878                         reg = <0 0xe6e30000 0 0x8>;
 879                         #pwm-cells = <2>;
 880                         clocks = <&cpg CPG_MOD 523>;
 881                         resets = <&cpg 523>;
 882                         power-domains = <&sysc 32>;
 883                         status = "disabled";
 884                 };
 885
 886                 pwm1: pwm@e6e31000 {
 887                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 888                         reg = <0 0xe6e31000 0 0x8>;
 889                         #pwm-cells = <2>;
 890                         clocks = <&cpg CPG_MOD 523>;
 891                         resets = <&cpg 523>;
 892                         power-domains = <&sysc 32>;
 893                         status = "disabled";
 894                 };
 895
 896                 pwm2: pwm@e6e32000 {
 897                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 898                         reg = <0 0xe6e32000 0 0x8>;
 899                         #pwm-cells = <2>;
 900                         clocks = <&cpg CPG_MOD 523>;
 901                         resets = <&cpg 523>;
 902                         power-domains = <&sysc 32>;
 903                         status = "disabled";
 904                 };
 905
 906                 pwm3: pwm@e6e33000 {
 907                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 908                         reg = <0 0xe6e33000 0 0x8>;
 909                         #pwm-cells = <2>;
 910                         clocks = <&cpg CPG_MOD 523>;
 911                         resets = <&cpg 523>;
 912                         power-domains = <&sysc 32>;
 913                         status = "disabled";
 914                 };
 915
 916                 pwm4: pwm@e6e34000 {
 917                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 918                         reg = <0 0xe6e34000 0 0x8>;
 919                         #pwm-cells = <2>;
 920                         clocks = <&cpg CPG_MOD 523>;
 921                         resets = <&cpg 523>;
 922                         power-domains = <&sysc 32>;
 923                         status = "disabled";
 924                 };
 925
 926                 pwm5: pwm@e6e35000 {
 927                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 928                         reg = <0 0xe6e35000 0 0x8>;
 929                         #pwm-cells = <2>;
 930                         clocks = <&cpg CPG_MOD 523>;
 931                         resets = <&cpg 523>;
 932                         power-domains = <&sysc 32>;
 933                         status = "disabled";
 934                 };
 935
 936                 pwm6: pwm@e6e36000 {
 937                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 938                         reg = <0 0xe6e36000 0 0x8>;
 939                         #pwm-cells = <2>;
 940                         clocks = <&cpg CPG_MOD 523>;
 941                         resets = <&cpg 523>;
 942                         power-domains = <&sysc 32>;
 943                         status = "disabled";
 944                 };
 945
 946                 scif0: serial@e6e60000 {
 947                         compatible = "renesas,scif-r8a774a1",
 948                                      "renesas,rcar-gen3-scif", "renesas,scif";
 949                         reg = <0 0xe6e60000 0 0x40>;
 950                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 951                         clocks = <&cpg CPG_MOD 207>,
 952                                  <&cpg CPG_CORE 19>,
 953                                  <&scif_clk>;
 954                         clock-names = "fck", "brg_int", "scif_clk";
 955                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 956                                <&dmac2 0x51>, <&dmac2 0x50>;
 957                         dma-names = "tx", "rx", "tx", "rx";
 958                         power-domains = <&sysc 32>;
 959                         resets = <&cpg 207>;
 960                         status = "disabled";
 961                 };
 962
 963                 scif1: serial@e6e68000 {
 964                         compatible = "renesas,scif-r8a774a1",
 965                                      "renesas,rcar-gen3-scif", "renesas,scif";
 966                         reg = <0 0xe6e68000 0 0x40>;
 967                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 968                         clocks = <&cpg CPG_MOD 206>,
 969                                  <&cpg CPG_CORE 19>,
 970                                  <&scif_clk>;
 971                         clock-names = "fck", "brg_int", "scif_clk";
 972                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 973                                <&dmac2 0x53>, <&dmac2 0x52>;
 974                         dma-names = "tx", "rx", "tx", "rx";
 975                         power-domains = <&sysc 32>;
 976                         resets = <&cpg 206>;
 977                         status = "disabled";
 978                 };
 979
 980                 scif2: serial@e6e88000 {
 981                         compatible = "renesas,scif-r8a774a1",
 982                                      "renesas,rcar-gen3-scif", "renesas,scif";
 983                         reg = <0 0xe6e88000 0 0x40>;
 984                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 985                         clocks = <&cpg CPG_MOD 310>,
 986                                  <&cpg CPG_CORE 19>,
 987                                  <&scif_clk>;
 988                         clock-names = "fck", "brg_int", "scif_clk";
 989                         power-domains = <&sysc 32>;
 990                         resets = <&cpg 310>;
 991                         status = "disabled";
 992                 };
 993
 994                 scif3: serial@e6c50000 {
 995                         compatible = "renesas,scif-r8a774a1",
 996                                      "renesas,rcar-gen3-scif", "renesas,scif";
 997                         reg = <0 0xe6c50000 0 0x40>;
 998                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 999                         clocks = <&cpg CPG_MOD 204>,
1000                                  <&cpg CPG_CORE 19>,
1001                                  <&scif_clk>;
1002                         clock-names = "fck", "brg_int", "scif_clk";
1003                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1004                         dma-names = "tx", "rx";
1005                         power-domains = <&sysc 32>;
1006                         resets = <&cpg 204>;
1007                         status = "disabled";
1008                 };
1009
1010                 scif4: serial@e6c40000 {
1011                         compatible = "renesas,scif-r8a774a1",
1012                                      "renesas,rcar-gen3-scif", "renesas,scif";
1013                         reg = <0 0xe6c40000 0 0x40>;
1014                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1015                         clocks = <&cpg CPG_MOD 203>,
1016                                  <&cpg CPG_CORE 19>,
1017                                  <&scif_clk>;
1018                         clock-names = "fck", "brg_int", "scif_clk";
1019                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1020                         dma-names = "tx", "rx";
1021                         power-domains = <&sysc 32>;
1022                         resets = <&cpg 203>;
1023                         status = "disabled";
1024                 };
1025
1026                 scif5: serial@e6f30000 {
1027                         compatible = "renesas,scif-r8a774a1",
1028                                      "renesas,rcar-gen3-scif", "renesas,scif";
1029                         reg = <0 0xe6f30000 0 0x40>;
1030                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1031                         clocks = <&cpg CPG_MOD 202>,
1032                                  <&cpg CPG_CORE 19>,
1033                                  <&scif_clk>;
1034                         clock-names = "fck", "brg_int", "scif_clk";
1035                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1036                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1037                         dma-names = "tx", "rx", "tx", "rx";
1038                         power-domains = <&sysc 32>;
1039                         resets = <&cpg 202>;
1040                         status = "disabled";
1041                 };
1042
1043                 msiof0: spi@e6e90000 {
1044                         compatible = "renesas,msiof-r8a774a1",
1045                                      "renesas,rcar-gen3-msiof";
1046                         reg = <0 0xe6e90000 0 0x0064>;
1047                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1048                         clocks = <&cpg CPG_MOD 211>;
1049                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1050                                <&dmac2 0x41>, <&dmac2 0x40>;
1051                         dma-names = "tx", "rx", "tx", "rx";
1052                         power-domains = <&sysc 32>;
1053                         resets = <&cpg 211>;
1054                         #address-cells = <1>;
1055                         #size-cells = <0>;
1056                         status = "disabled";
1057                 };
1058
1059                 msiof1: spi@e6ea0000 {
1060                         compatible = "renesas,msiof-r8a774a1",
1061                                      "renesas,rcar-gen3-msiof";
1062                         reg = <0 0xe6ea0000 0 0x0064>;
1063                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1064                         clocks = <&cpg CPG_MOD 210>;
1065                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1066                                <&dmac2 0x43>, <&dmac2 0x42>;
1067                         dma-names = "tx", "rx", "tx", "rx";
1068                         power-domains = <&sysc 32>;
1069                         resets = <&cpg 210>;
1070                         #address-cells = <1>;
1071                         #size-cells = <0>;
1072                         status = "disabled";
1073                 };
1074
1075                 msiof2: spi@e6c00000 {
1076                         compatible = "renesas,msiof-r8a774a1",
1077                                      "renesas,rcar-gen3-msiof";
1078                         reg = <0 0xe6c00000 0 0x0064>;
1079                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1080                         clocks = <&cpg CPG_MOD 209>;
1081                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1082                         dma-names = "tx", "rx";
1083                         power-domains = <&sysc 32>;
1084                         resets = <&cpg 209>;
1085                         #address-cells = <1>;
1086                         #size-cells = <0>;
1087                         status = "disabled";
1088                 };
1089
1090                 msiof3: spi@e6c10000 {
1091                         compatible = "renesas,msiof-r8a774a1",
1092                                      "renesas,rcar-gen3-msiof";
1093                         reg = <0 0xe6c10000 0 0x0064>;
1094                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1095                         clocks = <&cpg CPG_MOD 208>;
1096                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1097                         dma-names = "tx", "rx";
1098                         power-domains = <&sysc 32>;
1099                         resets = <&cpg 208>;
1100                         #address-cells = <1>;
1101                         #size-cells = <0>;
1102                         status = "disabled";
1103                 };
1104
1105                 rcar_sound: sound@ec500000 {
1106                         /*
1107                          * #sound-dai-cells is required
1108                          *
1109                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1110                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1111                          */
1112                         /*
1113                          * #clock-cells is required for audio_clkout0/1/2/3
1114                          *
1115                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1116                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1117                          */
1118                         compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1119                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1120                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1121                                 <0 0xec540000 0 0x1000>, /* SSIU */
1122                                 <0 0xec541000 0 0x280>,  /* SSI */
1123                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1124                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1125
1126                         clocks = <&cpg CPG_MOD 1005>,
1127                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1128                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1129                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1130                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1131                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1132                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1133                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1134                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1135                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1136                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1137                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1138                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1139                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1140                                  <&audio_clk_a>, <&audio_clk_b>,
1141                                  <&audio_clk_c>,
1142                                  <&cpg CPG_CORE 10>;
1143                         clock-names = "ssi-all",
1144                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1145                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1146                                       "ssi.1", "ssi.0",
1147                                       "src.9", "src.8", "src.7", "src.6",
1148                                       "src.5", "src.4", "src.3", "src.2",
1149                                       "src.1", "src.0",
1150                                       "mix.1", "mix.0",
1151                                       "ctu.1", "ctu.0",
1152                                       "dvc.0", "dvc.1",
1153                                       "clk_a", "clk_b", "clk_c", "clk_i";
1154                         power-domains = <&sysc 32>;
1155                         resets = <&cpg 1005>,
1156                                  <&cpg 1006>, <&cpg 1007>,
1157                                  <&cpg 1008>, <&cpg 1009>,
1158                                  <&cpg 1010>, <&cpg 1011>,
1159                                  <&cpg 1012>, <&cpg 1013>,
1160                                  <&cpg 1014>, <&cpg 1015>;
1161                         reset-names = "ssi-all",
1162                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1163                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1164                                       "ssi.1", "ssi.0";
1165                         status = "disabled";
1166
1167                         rcar_sound,dvc {
1168                                 dvc0: dvc-0 {
1169                                         dmas = <&audma1 0xbc>;
1170                                         dma-names = "tx";
1171                                 };
1172                                 dvc1: dvc-1 {
1173                                         dmas = <&audma1 0xbe>;
1174                                         dma-names = "tx";
1175                                 };
1176                         };
1177
1178                         rcar_sound,mix {
1179                                 mix0: mix-0 { };
1180                                 mix1: mix-1 { };
1181                         };
1182
1183                         rcar_sound,ctu {
1184                                 ctu00: ctu-0 { };
1185                                 ctu01: ctu-1 { };
1186                                 ctu02: ctu-2 { };
1187                                 ctu03: ctu-3 { };
1188                                 ctu10: ctu-4 { };
1189                                 ctu11: ctu-5 { };
1190                                 ctu12: ctu-6 { };
1191                                 ctu13: ctu-7 { };
1192                         };
1193
1194                         rcar_sound,src {
1195                                 src0: src-0 {
1196                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1197                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1198                                         dma-names = "rx", "tx";
1199                                 };
1200                                 src1: src-1 {
1201                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1202                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1203                                         dma-names = "rx", "tx";
1204                                 };
1205                                 src2: src-2 {
1206                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1207                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1208                                         dma-names = "rx", "tx";
1209                                 };
1210                                 src3: src-3 {
1211                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1212                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1213                                         dma-names = "rx", "tx";
1214                                 };
1215                                 src4: src-4 {
1216                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1217                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1218                                         dma-names = "rx", "tx";
1219                                 };
1220                                 src5: src-5 {
1221                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1222                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1223                                         dma-names = "rx", "tx";
1224                                 };
1225                                 src6: src-6 {
1226                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1227                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1228                                         dma-names = "rx", "tx";
1229                                 };
1230                                 src7: src-7 {
1231                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1232                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1233                                         dma-names = "rx", "tx";
1234                                 };
1235                                 src8: src-8 {
1236                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1237                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1238                                         dma-names = "rx", "tx";
1239                                 };
1240                                 src9: src-9 {
1241                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1242                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1243                                         dma-names = "rx", "tx";
1244                                 };
1245                         };
1246
1247                         rcar_sound,ssi {
1248                                 ssi0: ssi-0 {
1249                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1250                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1251                                         dma-names = "rx", "tx", "rxu", "txu";
1252                                 };
1253                                 ssi1: ssi-1 {
1254                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1255                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1256                                         dma-names = "rx", "tx", "rxu", "txu";
1257                                 };
1258                                 ssi2: ssi-2 {
1259                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1260                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1261                                         dma-names = "rx", "tx", "rxu", "txu";
1262                                 };
1263                                 ssi3: ssi-3 {
1264                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1265                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1266                                         dma-names = "rx", "tx", "rxu", "txu";
1267                                 };
1268                                 ssi4: ssi-4 {
1269                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1270                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1271                                         dma-names = "rx", "tx", "rxu", "txu";
1272                                 };
1273                                 ssi5: ssi-5 {
1274                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1275                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1276                                         dma-names = "rx", "tx", "rxu", "txu";
1277                                 };
1278                                 ssi6: ssi-6 {
1279                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1280                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1281                                         dma-names = "rx", "tx", "rxu", "txu";
1282                                 };
1283                                 ssi7: ssi-7 {
1284                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1285                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1286                                         dma-names = "rx", "tx", "rxu", "txu";
1287                                 };
1288                                 ssi8: ssi-8 {
1289                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1290                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1291                                         dma-names = "rx", "tx", "rxu", "txu";
1292                                 };
1293                                 ssi9: ssi-9 {
1294                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1295                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1296                                         dma-names = "rx", "tx", "rxu", "txu";
1297                                 };
1298                         };
1299
1300                         ports {
1301                                 #address-cells = <1>;
1302                                 #size-cells = <0>;
1303                                 port@0 {
1304                                         reg = <0>;
1305                                 };
1306                                 port@1 {
1307                                         reg = <1>;
1308                                 };
1309                         };
1310                 };
1311
1312                 audma0: dma-controller@ec700000 {
1313                         compatible = "renesas,dmac-r8a774a1",
1314                                      "renesas,rcar-dmac";
1315                         reg = <0 0xec700000 0 0x10000>;
1316                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1317                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1318                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1319                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1320                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1321                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1322                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1323                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1324                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1325                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1326                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1327                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1328                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1329                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1330                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1331                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1332                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1333                         interrupt-names = "error",
1334                                         "ch0", "ch1", "ch2", "ch3",
1335                                         "ch4", "ch5", "ch6", "ch7",
1336                                         "ch8", "ch9", "ch10", "ch11",
1337                                         "ch12", "ch13", "ch14", "ch15";
1338                         clocks = <&cpg CPG_MOD 502>;
1339                         clock-names = "fck";
1340                         power-domains = <&sysc 32>;
1341                         resets = <&cpg 502>;
1342                         #dma-cells = <1>;
1343                         dma-channels = <16>;
1344                 };
1345
1346                 audma1: dma-controller@ec720000 {
1347                         compatible = "renesas,dmac-r8a774a1",
1348                                      "renesas,rcar-dmac";
1349                         reg = <0 0xec720000 0 0x10000>;
1350                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1351                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1352                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1353                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1354                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1355                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1356                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1357                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1358                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1359                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1360                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1361                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1362                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1363                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1364                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1365                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1366                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1367                         interrupt-names = "error",
1368                                         "ch0", "ch1", "ch2", "ch3",
1369                                         "ch4", "ch5", "ch6", "ch7",
1370                                         "ch8", "ch9", "ch10", "ch11",
1371                                         "ch12", "ch13", "ch14", "ch15";
1372                         clocks = <&cpg CPG_MOD 501>;
1373                         clock-names = "fck";
1374                         power-domains = <&sysc 32>;
1375                         resets = <&cpg 501>;
1376                         #dma-cells = <1>;
1377                         dma-channels = <16>;
1378                 };
1379
1380                 xhci0: usb@ee000000 {
1381                         compatible = "renesas,xhci-r8a774a1",
1382                                      "renesas,rcar-gen3-xhci";
1383                         reg = <0 0xee000000 0 0xc00>;
1384                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1385                         clocks = <&cpg CPG_MOD 328>;
1386                         power-domains = <&sysc 32>;
1387                         resets = <&cpg 328>;
1388                         status = "disabled";
1389                 };
1390
1391                 usb3_peri0: usb@ee020000 {
1392                         compatible = "renesas,r8a774a1-usb3-peri",
1393                                      "renesas,rcar-gen3-usb3-peri";
1394                         reg = <0 0xee020000 0 0x400>;
1395                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1396                         clocks = <&cpg CPG_MOD 328>;
1397                         power-domains = <&sysc 32>;
1398                         resets = <&cpg 328>;
1399                         status = "disabled";
1400                 };
1401
1402                 ohci0: usb@ee080000 {
1403                         compatible = "generic-ohci";
1404                         reg = <0 0xee080000 0 0x100>;
1405                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1406                         clocks = <&cpg CPG_MOD 703>;
1407                         phys = <&usb2_phy0>;
1408                         phy-names = "usb";
1409                         power-domains = <&sysc 32>;
1410                         resets = <&cpg 703>;
1411                         status = "disabled";
1412                 };
1413
1414                 ohci1: usb@ee0a0000 {
1415                         compatible = "generic-ohci";
1416                         reg = <0 0xee0a0000 0 0x100>;
1417                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1418                         clocks = <&cpg CPG_MOD 702>;
1419                         phys = <&usb2_phy1>;
1420                         phy-names = "usb";
1421                         power-domains = <&sysc 32>;
1422                         resets = <&cpg 702>;
1423                         status = "disabled";
1424                 };
1425
1426                 ehci0: usb@ee080100 {
1427                         compatible = "generic-ehci";
1428                         reg = <0 0xee080100 0 0x100>;
1429                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1430                         clocks = <&cpg CPG_MOD 703>;
1431                         phys = <&usb2_phy0>;
1432                         phy-names = "usb";
1433                         companion = <&ohci0>;
1434                         power-domains = <&sysc 32>;
1435                         resets = <&cpg 703>;
1436                         status = "disabled";
1437                 };
1438
1439                 ehci1: usb@ee0a0100 {
1440                         compatible = "generic-ehci";
1441                         reg = <0 0xee0a0100 0 0x100>;
1442                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1443                         clocks = <&cpg CPG_MOD 702>;
1444                         phys = <&usb2_phy1>;
1445                         phy-names = "usb";
1446                         companion = <&ohci1>;
1447                         power-domains = <&sysc 32>;
1448                         resets = <&cpg 702>;
1449                         status = "disabled";
1450                 };
1451
1452                 usb2_phy0: usb-phy@ee080200 {
1453                         compatible = "renesas,usb2-phy-r8a774a1",
1454                                      "renesas,rcar-gen3-usb2-phy";
1455                         reg = <0 0xee080200 0 0x700>;
1456                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1457                         clocks = <&cpg CPG_MOD 703>;
1458                         power-domains = <&sysc 32>;
1459                         resets = <&cpg 703>;
1460                         #phy-cells = <0>;
1461                         status = "disabled";
1462                 };
1463
1464                 usb2_phy1: usb-phy@ee0a0200 {
1465                         compatible = "renesas,usb2-phy-r8a774a1",
1466                                      "renesas,rcar-gen3-usb2-phy";
1467                         reg = <0 0xee0a0200 0 0x700>;
1468                         clocks = <&cpg CPG_MOD 702>;
1469                         power-domains = <&sysc 32>;
1470                         resets = <&cpg 702>;
1471                         #phy-cells = <0>;
1472                         status = "disabled";
1473                 };
1474
1475                 sdhi0: sd@ee100000 {
1476                         compatible = "renesas,sdhi-r8a774a1",
1477                                      "renesas,rcar-gen3-sdhi";
1478                         reg = <0 0xee100000 0 0x2000>;
1479                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1480                         clocks = <&cpg CPG_MOD 314>;
1481                         max-frequency = <200000000>;
1482                         power-domains = <&sysc 32>;
1483                         resets = <&cpg 314>;
1484                         status = "disabled";
1485                 };
1486
1487                 sdhi1: sd@ee120000 {
1488                         compatible = "renesas,sdhi-r8a774a1",
1489                                      "renesas,rcar-gen3-sdhi";
1490                         reg = <0 0xee120000 0 0x2000>;
1491                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1492                         clocks = <&cpg CPG_MOD 313>;
1493                         max-frequency = <200000000>;
1494                         power-domains = <&sysc 32>;
1495                         resets = <&cpg 313>;
1496                         status = "disabled";
1497                 };
1498
1499                 sdhi2: sd@ee140000 {
1500                         compatible = "renesas,sdhi-r8a774a1",
1501                                      "renesas,rcar-gen3-sdhi";
1502                         reg = <0 0xee140000 0 0x2000>;
1503                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1504                         clocks = <&cpg CPG_MOD 312>;
1505                         max-frequency = <200000000>;
1506                         power-domains = <&sysc 32>;
1507                         resets = <&cpg 312>;
1508                         status = "disabled";
1509                 };
1510
1511                 sdhi3: sd@ee160000 {
1512                         compatible = "renesas,sdhi-r8a774a1",
1513                                      "renesas,rcar-gen3-sdhi";
1514                         reg = <0 0xee160000 0 0x2000>;
1515                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1516                         clocks = <&cpg CPG_MOD 311>;
1517                         max-frequency = <200000000>;
1518                         power-domains = <&sysc 32>;
1519                         resets = <&cpg 311>;
1520                         status = "disabled";
1521                 };
1522
1523                 gic: interrupt-controller@f1010000 {
1524                         compatible = "arm,gic-400";
1525                         #interrupt-cells = <3>;
1526                         #address-cells = <0>;
1527                         interrupt-controller;
1528                         reg = <0x0 0xf1010000 0 0x1000>,
1529                               <0x0 0xf1020000 0 0x20000>,
1530                               <0x0 0xf1040000 0 0x20000>,
1531                               <0x0 0xf1060000 0 0x20000>;
1532                         interrupts = <GIC_PPI 9
1533                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
1534                         clocks = <&cpg CPG_MOD 408>;
1535                         clock-names = "clk";
1536                         power-domains = <&sysc 32>;
1537                         resets = <&cpg 408>;
1538                 };
1539
1540                 fcpf0: fcp@fe950000 {
1541                         compatible = "renesas,fcpf";
1542                         reg = <0 0xfe950000 0 0x200>;
1543                         clocks = <&cpg CPG_MOD 615>;
1544                         power-domains = <&sysc 14>;
1545                         resets = <&cpg 615>;
1546                 };
1547
1548                 fcpvb0: fcp@fe96f000 {
1549                         compatible = "renesas,fcpv";
1550                         reg = <0 0xfe96f000 0 0x200>;
1551                         clocks = <&cpg CPG_MOD 607>;
1552                         power-domains = <&sysc 14>;
1553                         resets = <&cpg 607>;
1554                 };
1555
1556                 fcpvd0: fcp@fea27000 {
1557                         compatible = "renesas,fcpv";
1558                         reg = <0 0xfea27000 0 0x200>;
1559                         clocks = <&cpg CPG_MOD 603>;
1560                         power-domains = <&sysc 32>;
1561                         resets = <&cpg 603>;
1562                         iommus = <&ipmmu_vi0 8>;
1563                 };
1564
1565                 fcpvd1: fcp@fea2f000 {
1566                         compatible = "renesas,fcpv";
1567                         reg = <0 0xfea2f000 0 0x200>;
1568                         clocks = <&cpg CPG_MOD 602>;
1569                         power-domains = <&sysc 32>;
1570                         resets = <&cpg 602>;
1571                         iommus = <&ipmmu_vi0 9>;
1572                 };
1573
1574                 fcpvd2: fcp@fea37000 {
1575                         compatible = "renesas,fcpv";
1576                         reg = <0 0xfea37000 0 0x200>;
1577                         clocks = <&cpg CPG_MOD 601>;
1578                         power-domains = <&sysc 32>;
1579                         resets = <&cpg 601>;
1580                         iommus = <&ipmmu_vi0 10>;
1581                 };
1582
1583                 fcpvi0: fcp@fe9af000 {
1584                         compatible = "renesas,fcpv";
1585                         reg = <0 0xfe9af000 0 0x200>;
1586                         clocks = <&cpg CPG_MOD 611>;
1587                         power-domains = <&sysc 14>;
1588                         resets = <&cpg 611>;
1589                         iommus = <&ipmmu_vc0 19>;
1590                 };
1591
1592                 prr: chipid@fff00044 {
1593                         compatible = "renesas,prr";
1594                         reg = <0 0xfff00044 0 4>;
1595                 };
1596         };
1597
1598         thermal-zones {
1599                 sensor_thermal1: sensor-thermal1 {
1600                         polling-delay-passive = <250>;
1601                         polling-delay = <1000>;
1602                         thermal-sensors = <&tsc 0>;
1603
1604                         trips {
1605                                 sensor1_crit: sensor1-crit {
1606                                         temperature = <120000>;
1607                                         hysteresis = <1000>;
1608                                         type = "critical";
1609                                 };
1610                         };
1611                 };
1612
1613                 sensor_thermal2: sensor-thermal2 {
1614                         polling-delay-passive = <250>;
1615                         polling-delay = <1000>;
1616                         thermal-sensors = <&tsc 1>;
1617
1618                         trips {
1619                                 sensor2_crit: sensor2-crit {
1620                                         temperature = <120000>;
1621                                         hysteresis = <1000>;
1622                                         type = "critical";
1623                                 };
1624                         };
1625
1626                 };
1627
1628                 sensor_thermal3: sensor-thermal3 {
1629                         polling-delay-passive = <250>;
1630                         polling-delay = <1000>;
1631                         thermal-sensors = <&tsc 2>;
1632
1633                         trips {
1634                                 sensor3_crit: sensor3-crit {
1635                                         temperature = <120000>;
1636                                         hysteresis = <1000>;
1637                                         type = "critical";
1638                                 };
1639                         };
1640                 };
1641         };
1642
1643         timer {
1644                 compatible = "arm,armv8-timer";
1645                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1646                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1647                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1648                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
1649         };
1650
1651         /* External USB clocks - can be overridden by the board */
1652         usb3s0_clk: usb3s0 {
1653                 compatible = "fixed-clock";
1654                 #clock-cells = <0>;
1655                 clock-frequency = <0>;
1656         };
1657
1658         usb_extal_clk: usb_extal {
1659                 compatible = "fixed-clock";
1660                 #clock-cells = <0>;
1661                 clock-frequency = <0>;
1662         };
1663 };