arch/arm64/boot/dts/nvidia/tegra210-smaug.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/mfd/max77620.h>
   6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
   7
   8 #include "tegra210.dtsi"
   9
  10 / {
  11         model = "Google Pixel C";
  12         compatible = "google,smaug-rev8", "google,smaug-rev7",
  13                      "google,smaug-rev6", "google,smaug-rev5",
  14                      "google,smaug-rev4", "google,smaug-rev3",
  15                      "google,smaug-rev2", "google,smaug-rev1",
  16                      "google,smaug", "nvidia,tegra210";
  17
  18         aliases {
  19                 serial0 = &uarta;
  20         };
  21
  22         chosen {
  23                 bootargs = "earlycon";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0x0 0x80000000 0x0 0xc0000000>;
  30         };
  31
  32         host1x@50000000 {
  33                 dpaux: dpaux@545c0000 {
  34                         status = "okay";
  35                 };
  36         };
  37
  38         pinmux: pinmux@700008d4 {
  39                 pinctrl-names = "boot";
  40                 pinctrl-0 = <&state_boot>;
  41
  42                 state_boot: pinmux {
  43                         pex_l0_rst_n_pa0 {
  44                                 nvidia,pins = "pex_l0_rst_n_pa0";
  45                                 nvidia,function = "rsvd1";
  46                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  47                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  48                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  49                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  50                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  51                         };
  52                         pex_l0_clkreq_n_pa1 {
  53                                 nvidia,pins = "pex_l0_clkreq_n_pa1";
  54                                 nvidia,function = "rsvd1";
  55                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  56                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  57                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  58                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  59                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  60                         };
  61                         pex_wake_n_pa2 {
  62                                 nvidia,pins = "pex_wake_n_pa2";
  63                                 nvidia,function = "rsvd1";
  64                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  65                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  66                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  67                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  68                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  69                         };
  70                         pex_l1_rst_n_pa3 {
  71                                 nvidia,pins = "pex_l1_rst_n_pa3";
  72                                 nvidia,function = "rsvd1";
  73                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  74                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  75                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  76                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  77                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  78                         };
  79                         pex_l1_clkreq_n_pa4 {
  80                                 nvidia,pins = "pex_l1_clkreq_n_pa4";
  81                                 nvidia,function = "rsvd1";
  82                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  83                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  84                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  85                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  86                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  87                         };
  88                         sata_led_active_pa5 {
  89                                 nvidia,pins = "sata_led_active_pa5";
  90                                 nvidia,function = "rsvd1";
  91                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  92                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  93                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  94                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  95                         };
  96                         pa6 {
  97                                 nvidia,pins = "pa6";
  98                                 nvidia,function = "rsvd1";
  99                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 100                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 101                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 102                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 103                         };
 104                         dap1_fs_pb0 {
 105                                 nvidia,pins = "dap1_fs_pb0";
 106                                 nvidia,function = "i2s1";
 107                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 108                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 109                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 110                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 111                         };
 112                         dap1_din_pb1 {
 113                                 nvidia,pins = "dap1_din_pb1";
 114                                 nvidia,function = "i2s1";
 115                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 116                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 117                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 118                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 119                         };
 120                         dap1_dout_pb2 {
 121                                 nvidia,pins = "dap1_dout_pb2";
 122                                 nvidia,function = "i2s1";
 123                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 125                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 126                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 127                         };
 128                         dap1_sclk_pb3 {
 129                                 nvidia,pins = "dap1_sclk_pb3";
 130                                 nvidia,function = "i2s1";
 131                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 133                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 134                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 135                         };
 136                         spi2_mosi_pb4 {
 137                                 nvidia,pins = "spi2_mosi_pb4";
 138                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 139                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 140                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 141                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 142                         };
 143                         spi2_miso_pb5 {
 144                                 nvidia,pins = "spi2_miso_pb5";
 145                                 nvidia,function = "rsvd2";
 146                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 147                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 148                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 149                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 150                         };
 151                         spi2_sck_pb6 {
 152                                 nvidia,pins = "spi2_sck_pb6";
 153                                 nvidia,function = "rsvd2";
 154                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 155                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 156                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 157                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 158                         };
 159                         spi2_cs0_pb7 {
 160                                 nvidia,pins = "spi2_cs0_pb7";
 161                                 nvidia,function = "rsvd2";
 162                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 163                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 164                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 165                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 166                         };
 167                         spi1_mosi_pc0 {
 168                                 nvidia,pins = "spi1_mosi_pc0";
 169                                 nvidia,function = "spi1";
 170                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 171                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 172                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 173                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 174                         };
 175                         spi1_miso_pc1 {
 176                                 nvidia,pins = "spi1_miso_pc1";
 177                                 nvidia,function = "spi1";
 178                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 179                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 180                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 181                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 182                         };
 183                         spi1_sck_pc2 {
 184                                 nvidia,pins = "spi1_sck_pc2";
 185                                 nvidia,function = "spi1";
 186                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 187                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 188                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 189                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 190                         };
 191                         spi1_cs0_pc3 {
 192                                 nvidia,pins = "spi1_cs0_pc3";
 193                                 nvidia,function = "spi1";
 194                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 195                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 196                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 197                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 198                         };
 199                         spi1_cs1_pc4 {
 200                                 nvidia,pins = "spi1_cs1_pc4";
 201                                 nvidia,function = "rsvd1";
 202                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 203                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 204                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 205                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 206                         };
 207                         spi4_sck_pc5 {
 208                                 nvidia,pins = "spi4_sck_pc5";
 209                                 nvidia,function = "rsvd1";
 210                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 211                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 212                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 213                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 214                         };
 215                         spi4_cs0_pc6 {
 216                                 nvidia,pins = "spi4_cs0_pc6";
 217                                 nvidia,function = "rsvd1";
 218                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 219                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 220                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 221                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 222                         };
 223                         spi4_mosi_pc7 {
 224                                 nvidia,pins = "spi4_mosi_pc7";
 225                                 nvidia,function = "rsvd1";
 226                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 227                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 228                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 229                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 230                         };
 231                         spi4_miso_pd0 {
 232                                 nvidia,pins = "spi4_miso_pd0";
 233                                 nvidia,function = "rsvd1";
 234                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 235                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 236                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 237                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 238                         };
 239                         uart3_tx_pd1 {
 240                                 nvidia,pins = "uart3_tx_pd1";
 241                                 nvidia,function = "uartc";
 242                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 243                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 244                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 245                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 246                         };
 247                         uart3_rx_pd2 {
 248                                 nvidia,pins = "uart3_rx_pd2";
 249                                 nvidia,function = "uartc";
 250                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 251                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 252                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 253                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 254                         };
 255                         uart3_rts_pd3 {
 256                                 nvidia,pins = "uart3_rts_pd3";
 257                                 nvidia,function = "uartc";
 258                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 259                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 260                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 261                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 262                         };
 263                         uart3_cts_pd4 {
 264                                 nvidia,pins = "uart3_cts_pd4";
 265                                 nvidia,function = "uartc";
 266                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 267                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 268                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 269                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 270                         };
 271                         dmic1_clk_pe0 {
 272                                 nvidia,pins = "dmic1_clk_pe0";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 274                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 275                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 276                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 277                         };
 278                         dmic1_dat_pe1 {
 279                                 nvidia,pins = "dmic1_dat_pe1";
 280                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 281                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 282                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 283                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 284                         };
 285                         dmic2_clk_pe2 {
 286                                 nvidia,pins = "dmic2_clk_pe2";
 287                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 288                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 289                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 290                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 291                         };
 292                         dmic2_dat_pe3 {
 293                                 nvidia,pins = "dmic2_dat_pe3";
 294                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 295                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 296                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 297                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 298                         };
 299                         dmic3_clk_pe4 {
 300                                 nvidia,pins = "dmic3_clk_pe4";
 301                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 302                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 303                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 304                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 305                         };
 306                         dmic3_dat_pe5 {
 307                                 nvidia,pins = "dmic3_dat_pe5";
 308                                 nvidia,function = "rsvd2";
 309                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 310                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 311                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 312                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 313                         };
 314                         pe6 {
 315                                 nvidia,pins = "pe6";
 316                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 317                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 318                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 319                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 320                         };
 321                         pe7 {
 322                                 nvidia,pins = "pe7";
 323                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 324                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 325                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 326                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 327                         };
 328                         gen3_i2c_scl_pf0 {
 329                                 nvidia,pins = "gen3_i2c_scl_pf0";
 330                                 nvidia,function = "i2c3";
 331                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 332                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 333                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 334                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 335                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 336                         };
 337                         gen3_i2c_sda_pf1 {
 338                                 nvidia,pins = "gen3_i2c_sda_pf1";
 339                                 nvidia,function = "i2c3";
 340                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 341                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 342                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 343                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 344                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 345                         };
 346                         uart2_tx_pg0 {
 347                                 nvidia,pins = "uart2_tx_pg0";
 348                                 nvidia,function = "uartb";
 349                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 350                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 351                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 352                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 353                         };
 354                         uart2_rx_pg1 {
 355                                 nvidia,pins = "uart2_rx_pg1";
 356                                 nvidia,function = "uartb";
 357                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 358                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 359                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 360                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 361                         };
 362                         uart2_rts_pg2 {
 363                                 nvidia,pins = "uart2_rts_pg2";
 364                                 nvidia,function = "rsvd2";
 365                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 366                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 367                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 368                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 369                         };
 370                         uart2_cts_pg3 {
 371                                 nvidia,pins = "uart2_cts_pg3";
 372                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 373                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 374                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 375                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 376                         };
 377                         wifi_en_ph0 {
 378                                 nvidia,pins = "wifi_en_ph0";
 379                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 381                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 382                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 383                         };
 384                         wifi_rst_ph1 {
 385                                 nvidia,pins = "wifi_rst_ph1";
 386                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 387                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 388                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 389                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 390                         };
 391                         wifi_wake_ap_ph2 {
 392                                 nvidia,pins = "wifi_wake_ap_ph2";
 393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 395                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 396                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 397                         };
 398                         ap_wake_bt_ph3 {
 399                                 nvidia,pins = "ap_wake_bt_ph3";
 400                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 401                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 402                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 403                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 404                         };
 405                         bt_rst_ph4 {
 406                                 nvidia,pins = "bt_rst_ph4";
 407                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 408                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 409                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 410                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 411                         };
 412                         bt_wake_ap_ph5 {
 413                                 nvidia,pins = "bt_wake_ap_ph5";
 414                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 415                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 416                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 417                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 418                         };
 419                         ph6 {
 420                                 nvidia,pins = "ph6";
 421                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 422                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 423                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 424                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 425                         };
 426                         ap_wake_nfc_ph7 {
 427                                 nvidia,pins = "ap_wake_nfc_ph7";
 428                                 nvidia,function = "rsvd0";
 429                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 430                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 431                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 432                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 433                         };
 434                         nfc_en_pi0 {
 435                                 nvidia,pins = "nfc_en_pi0";
 436                                 nvidia,function = "rsvd0";
 437                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 438                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 439                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 440                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 441                         };
 442                         nfc_int_pi1 {
 443                                 nvidia,pins = "nfc_int_pi1";
 444                                 nvidia,function = "rsvd0";
 445                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 446                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 447                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 448                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 449                         };
 450                         gps_en_pi2 {
 451                                 nvidia,pins = "gps_en_pi2";
 452                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 453                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 454                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 455                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 456                         };
 457                         gps_rst_pi3 {
 458                                 nvidia,pins = "gps_rst_pi3";
 459                                 nvidia,function = "rsvd0";
 460                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 461                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 462                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 463                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 464                         };
 465                         uart4_tx_pi4 {
 466                                 nvidia,pins = "uart4_tx_pi4";
 467                                 nvidia,function = "uartd";
 468                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 469                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 472                         };
 473                         uart4_rx_pi5 {
 474                                 nvidia,pins = "uart4_rx_pi5";
 475                                 nvidia,function = "uartd";
 476                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 477                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 478                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 479                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 480                         };
 481                         uart4_rts_pi6 {
 482                                 nvidia,pins = "uart4_rts_pi6";
 483                                 nvidia,function = "uartd";
 484                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 485                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 486                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 487                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 488                         };
 489                         uart4_cts_pi7 {
 490                                 nvidia,pins = "uart4_cts_pi7";
 491                                 nvidia,function = "uartd";
 492                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 493                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 494                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 495                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 496                         };
 497                         gen1_i2c_sda_pj0 {
 498                                 nvidia,pins = "gen1_i2c_sda_pj0";
 499                                 nvidia,function = "i2c1";
 500                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 501                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 502                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 503                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 504                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 505                         };
 506                         gen1_i2c_scl_pj1 {
 507                                 nvidia,pins = "gen1_i2c_scl_pj1";
 508                                 nvidia,function = "i2c1";
 509                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 510                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 511                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 512                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 513                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 514                         };
 515                         gen2_i2c_scl_pj2 {
 516                                 nvidia,pins = "gen2_i2c_scl_pj2";
 517                                 nvidia,function = "i2c2";
 518                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 519                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 520                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 521                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 522                                 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
 523                         };
 524                         gen2_i2c_sda_pj3 {
 525                                 nvidia,pins = "gen2_i2c_sda_pj3";
 526                                 nvidia,function = "i2c2";
 527                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 528                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 529                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 530                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 531                                 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
 532                         };
 533                         dap4_fs_pj4 {
 534                                 nvidia,pins = "dap4_fs_pj4";
 535                                 nvidia,function = "rsvd1";
 536                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 537                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 538                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 539                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 540                         };
 541                         dap4_din_pj5 {
 542                                 nvidia,pins = "dap4_din_pj5";
 543                                 nvidia,function = "rsvd1";
 544                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 545                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 546                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 547                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 548                         };
 549                         dap4_dout_pj6 {
 550                                 nvidia,pins = "dap4_dout_pj6";
 551                                 nvidia,function = "rsvd1";
 552                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 553                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 554                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 555                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 556                         };
 557                         dap4_sclk_pj7 {
 558                                 nvidia,pins = "dap4_sclk_pj7";
 559                                 nvidia,function = "rsvd1";
 560                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 561                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 562                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 563                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 564                         };
 565                         pk0 {
 566                                 nvidia,pins = "pk0";
 567                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 568                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 569                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 570                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 571                         };
 572                         pk1 {
 573                                 nvidia,pins = "pk1";
 574                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 575                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 576                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 577                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 578                         };
 579                         pk2 {
 580                                 nvidia,pins = "pk2";
 581                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 582                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 583                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 584                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 585                         };
 586                         pk3 {
 587                                 nvidia,pins = "pk3";
 588                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 589                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 590                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 591                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 592                         };
 593                         pk4 {
 594                                 nvidia,pins = "pk4";
 595                                 nvidia,function = "rsvd1";
 596                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 597                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 598                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 599                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 600                         };
 601                         pk5 {
 602                                 nvidia,pins = "pk5";
 603                                 nvidia,function = "rsvd1";
 604                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 605                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 606                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 607                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 608                         };
 609                         pk6 {
 610                                 nvidia,pins = "pk6";
 611                                 nvidia,function = "rsvd1";
 612                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 613                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 614                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 615                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 616                         };
 617                         pk7 {
 618                                 nvidia,pins = "pk7";
 619                                 nvidia,function = "rsvd1";
 620                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 621                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 622                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 623                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 624                         };
 625                         pl0 {
 626                                 nvidia,pins = "pl0";
 627                                 nvidia,function = "rsvd0";
 628                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 629                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 630                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 631                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 632                         };
 633                         pl1 {
 634                                 nvidia,pins = "pl1";
 635                                 nvidia,function = "rsvd1";
 636                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 637                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 638                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 639                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 640                         };
 641                         sdmmc1_clk_pm0 {
 642                                 nvidia,pins = "sdmmc1_clk_pm0";
 643                                 nvidia,function = "rsvd1";
 644                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 645                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 646                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 647                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 648                         };
 649                         sdmmc1_cmd_pm1 {
 650                                 nvidia,pins = "sdmmc1_cmd_pm1";
 651                                 nvidia,function = "rsvd2";
 652                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 653                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 654                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 655                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 656                         };
 657                         sdmmc1_dat3_pm2 {
 658                                 nvidia,pins = "sdmmc1_dat3_pm2";
 659                                 nvidia,function = "rsvd2";
 660                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 661                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 662                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 663                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 664                         };
 665                         sdmmc1_dat2_pm3 {
 666                                 nvidia,pins = "sdmmc1_dat2_pm3";
 667                                 nvidia,function = "rsvd2";
 668                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 669                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 670                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 671                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 672                         };
 673                         sdmmc1_dat1_pm4 {
 674                                 nvidia,pins = "sdmmc1_dat1_pm4";
 675                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 676                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 677                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 678                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 679                         };
 680                         sdmmc1_dat0_pm5 {
 681                                 nvidia,pins = "sdmmc1_dat0_pm5";
 682                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 683                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 684                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 685                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 686                         };
 687                         sdmmc3_clk_pp0 {
 688                                 nvidia,pins = "sdmmc3_clk_pp0";
 689                                 nvidia,function = "rsvd1";
 690                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 691                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 692                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 693                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 694                         };
 695                         sdmmc3_cmd_pp1 {
 696                                 nvidia,pins = "sdmmc3_cmd_pp1";
 697                                 nvidia,function = "rsvd1";
 698                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 699                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 700                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 701                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 702                         };
 703                         sdmmc3_dat3_pp2 {
 704                                 nvidia,pins = "sdmmc3_dat3_pp2";
 705                                 nvidia,function = "rsvd1";
 706                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 707                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 708                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 709                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 710                         };
 711                         sdmmc3_dat2_pp3 {
 712                                 nvidia,pins = "sdmmc3_dat2_pp3";
 713                                 nvidia,function = "rsvd1";
 714                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 715                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 716                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 717                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 718                         };
 719                         sdmmc3_dat1_pp4 {
 720                                 nvidia,pins = "sdmmc3_dat1_pp4";
 721                                 nvidia,function = "rsvd1";
 722                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 723                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 724                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 725                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 726                         };
 727                         sdmmc3_dat0_pp5 {
 728                                 nvidia,pins = "sdmmc3_dat0_pp5";
 729                                 nvidia,function = "rsvd1";
 730                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 731                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 732                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 733                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 734                         };
 735                         cam1_mclk_ps0 {
 736                                 nvidia,pins = "cam1_mclk_ps0";
 737                                 nvidia,function = "extperiph3";
 738                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 739                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 740                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 741                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 742                         };
 743                         cam2_mclk_ps1 {
 744                                 nvidia,pins = "cam2_mclk_ps1";
 745                                 nvidia,function = "extperiph3";
 746                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 747                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 748                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 749                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 750                         };
 751                         cam_i2c_scl_ps2 {
 752                                 nvidia,pins = "cam_i2c_scl_ps2";
 753                                 nvidia,function = "i2cvi";
 754                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 755                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 756                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 757                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 758                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 759                         };
 760                         cam_i2c_sda_ps3 {
 761                                 nvidia,pins = "cam_i2c_sda_ps3";
 762                                 nvidia,function = "i2cvi";
 763                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 764                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 765                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 766                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 767                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 768                         };
 769                         cam_rst_ps4 {
 770                                 nvidia,pins = "cam_rst_ps4";
 771                                 nvidia,function = "rsvd1";
 772                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 773                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 774                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 775                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 776                         };
 777                         cam_af_en_ps5 {
 778                                 nvidia,pins = "cam_af_en_ps5";
 779                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 780                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 781                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 782                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 783                         };
 784                         cam_flash_en_ps6 {
 785                                 nvidia,pins = "cam_flash_en_ps6";
 786                                 nvidia,function = "rsvd2";
 787                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 788                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 789                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 790                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 791                         };
 792                         cam1_pwdn_ps7 {
 793                                 nvidia,pins = "cam1_pwdn_ps7";
 794                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 795                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 796                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 797                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 798                         };
 799                         cam2_pwdn_pt0 {
 800                                 nvidia,pins = "cam2_pwdn_pt0";
 801                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 802                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 803                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 804                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 805                         };
 806                         cam1_strobe_pt1 {
 807                                 nvidia,pins = "cam1_strobe_pt1";
 808                                 nvidia,function = "rsvd1";
 809                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 810                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 811                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 812                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 813                         };
 814                         uart1_tx_pu0 {
 815                                 nvidia,pins = "uart1_tx_pu0";
 816                                 nvidia,function = "uarta";
 817                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 818                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 819                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 820                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 821                         };
 822                         uart1_rx_pu1 {
 823                                 nvidia,pins = "uart1_rx_pu1";
 824                                 nvidia,function = "uarta";
 825                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 826                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 827                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 828                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 829                         };
 830                         uart1_rts_pu2 {
 831                                 nvidia,pins = "uart1_rts_pu2";
 832                                 nvidia,function = "rsvd1";
 833                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 834                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 835                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 836                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 837                         };
 838                         uart1_cts_pu3 {
 839                                 nvidia,pins = "uart1_cts_pu3";
 840                                 nvidia,function = "rsvd1";
 841                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 842                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 843                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 844                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 845                         };
 846                         lcd_bl_pwm_pv0 {
 847                                 nvidia,pins = "lcd_bl_pwm_pv0";
 848                                 nvidia,function = "rsvd3";
 849                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 850                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 851                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 852                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 853                         };
 854                         lcd_bl_en_pv1 {
 855                                 nvidia,pins = "lcd_bl_en_pv1";
 856                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 857                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 858                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 859                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 860                         };
 861                         lcd_rst_pv2 {
 862                                 nvidia,pins = "lcd_rst_pv2";
 863                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 864                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 865                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 866                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 867                         };
 868                         lcd_gpio1_pv3 {
 869                                 nvidia,pins = "lcd_gpio1_pv3";
 870                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 871                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 872                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 873                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 874                         };
 875                         lcd_gpio2_pv4 {
 876                                 nvidia,pins = "lcd_gpio2_pv4";
 877                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 878                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 879                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 880                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 881                         };
 882                         ap_ready_pv5 {
 883                                 nvidia,pins = "ap_ready_pv5";
 884                                 nvidia,function = "rsvd0";
 885                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 886                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 887                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 888                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 889                         };
 890                         touch_rst_pv6 {
 891                                 nvidia,pins = "touch_rst_pv6";
 892                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 893                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 894                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 895                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 896                         };
 897                         touch_clk_pv7 {
 898                                 nvidia,pins = "touch_clk_pv7";
 899                                 nvidia,function = "touch";
 900                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 901                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 902                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 903                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 904                         };
 905                         modem_wake_ap_px0 {
 906                                 nvidia,pins = "modem_wake_ap_px0";
 907                                 nvidia,function = "rsvd0";
 908                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 909                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 910                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 911                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 912                         };
 913                         touch_int_px1 {
 914                                 nvidia,pins = "touch_int_px1";
 915                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 916                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 917                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 918                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 919                         };
 920                         motion_int_px2 {
 921                                 nvidia,pins = "motion_int_px2";
 922                                 nvidia,function = "rsvd0";
 923                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 924                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 925                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 926                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 927                         };
 928                         als_prox_int_px3 {
 929                                 nvidia,pins = "als_prox_int_px3";
 930                                 nvidia,function = "rsvd0";
 931                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 932                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 933                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 934                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 935                         };
 936                         temp_alert_px4 {
 937                                 nvidia,pins = "temp_alert_px4";
 938                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 939                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 940                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 941                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 942                         };
 943                         button_power_on_px5 {
 944                                 nvidia,pins = "button_power_on_px5";
 945                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 946                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 947                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 948                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 949                         };
 950                         button_vol_up_px6 {
 951                                 nvidia,pins = "button_vol_up_px6";
 952                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 953                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 954                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 955                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 956                         };
 957                         button_vol_down_px7 {
 958                                 nvidia,pins = "button_vol_down_px7";
 959                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 960                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 961                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 962                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 963                         };
 964                         button_slide_sw_py0 {
 965                                 nvidia,pins = "button_slide_sw_py0";
 966                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 967                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 968                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 969                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 970                         };
 971                         button_home_py1 {
 972                                 nvidia,pins = "button_home_py1";
 973                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 974                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 975                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 976                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 977                         };
 978                         lcd_te_py2 {
 979                                 nvidia,pins = "lcd_te_py2";
 980                                 nvidia,function = "displaya";
 981                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 982                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 983                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 984                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 985                         };
 986                         pwr_i2c_scl_py3 {
 987                                 nvidia,pins = "pwr_i2c_scl_py3";
 988                                 nvidia,function = "i2cpmu";
 989                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 990                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 991                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 992                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 993                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 994                         };
 995                         pwr_i2c_sda_py4 {
 996                                 nvidia,pins = "pwr_i2c_sda_py4";
 997                                 nvidia,function = "i2cpmu";
 998                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 999                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1000                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1001                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1002                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1003                         };
1004                         clk_32k_out_py5 {
1005                                 nvidia,pins = "clk_32k_out_py5";
1006                                 nvidia,function = "soc";
1007                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1008                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1009                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1010                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1011                         };
1012                         pz0 {
1013                                 nvidia,pins = "pz0";
1014                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1015                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1016                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1017                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1018                         };
1019                         pz1 {
1020                                 nvidia,pins = "pz1";
1021                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1022                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1023                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1024                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1025                         };
1026                         pz2 {
1027                                 nvidia,pins = "pz2";
1028                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1029                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1030                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1031                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1032                         };
1033                         pz3 {
1034                                 nvidia,pins = "pz3";
1035                                 nvidia,function = "rsvd1";
1036                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1037                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1038                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1039                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1040                         };
1041                         pz4 {
1042                                 nvidia,pins = "pz4";
1043                                 nvidia,function = "rsvd1";
1044                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1045                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1046                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1047                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1048                         };
1049                         pz5 {
1050                                 nvidia,pins = "pz5";
1051                                 nvidia,function = "soc";
1052                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1053                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1054                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1055                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1056                         };
1057                         dap2_fs_paa0 {
1058                                 nvidia,pins = "dap2_fs_paa0";
1059                                 nvidia,function = "i2s2";
1060                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1061                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1062                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1063                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1064                         };
1065                         dap2_sclk_paa1 {
1066                                 nvidia,pins = "dap2_sclk_paa1";
1067                                 nvidia,function = "i2s2";
1068                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1069                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1070                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1071                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1072                         };
1073                         dap2_din_paa2 {
1074                                 nvidia,pins = "dap2_din_paa2";
1075                                 nvidia,function = "i2s2";
1076                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1077                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1078                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1079                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1080                         };
1081                         dap2_dout_paa3 {
1082                                 nvidia,pins = "dap2_dout_paa3";
1083                                 nvidia,function = "i2s2";
1084                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1085                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1086                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1087                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1088                         };
1089                         aud_mclk_pbb0 {
1090                                 nvidia,pins = "aud_mclk_pbb0";
1091                                 nvidia,function = "aud";
1092                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1093                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1095                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1096                         };
1097                         dvfs_pwm_pbb1 {
1098                                 nvidia,pins = "dvfs_pwm_pbb1";
1099                                 nvidia,function = "rsvd0";
1100                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1101                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1103                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1104                         };
1105                         dvfs_clk_pbb2 {
1106                                 nvidia,pins = "dvfs_clk_pbb2";
1107                                 nvidia,function = "rsvd0";
1108                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1109                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1110                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1111                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1112                         };
1113                         gpio_x1_aud_pbb3 {
1114                                 nvidia,pins = "gpio_x1_aud_pbb3";
1115                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1116                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1117                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1118                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1119                         };
1120                         gpio_x3_aud_pbb4 {
1121                                 nvidia,pins = "gpio_x3_aud_pbb4";
1122                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1123                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1124                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1125                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1126                         };
1127                         hdmi_cec_pcc0 {
1128                                 nvidia,pins = "hdmi_cec_pcc0";
1129                                 nvidia,function = "rsvd1";
1130                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1131                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1132                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1133                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1134                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1135                         };
1136                         hdmi_int_dp_hpd_pcc1 {
1137                                 nvidia,pins = "hdmi_int_dp_hpd_pcc1";
1138                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1139                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1140                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1141                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1142                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1143                         };
1144                         spdif_out_pcc2 {
1145                                 nvidia,pins = "spdif_out_pcc2";
1146                                 nvidia,function = "rsvd1";
1147                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1148                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1149                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1150                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1151                         };
1152                         spdif_in_pcc3 {
1153                                 nvidia,pins = "spdif_in_pcc3";
1154                                 nvidia,function = "rsvd1";
1155                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1156                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1157                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1158                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1159                         };
1160                         usb_vbus_en0_pcc4 {
1161                                 nvidia,pins = "usb_vbus_en0_pcc4";
1162                                 nvidia,function = "rsvd1";
1163                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1164                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1165                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1166                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1167                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1168                         };
1169                         usb_vbus_en1_pcc5 {
1170                                 nvidia,pins = "usb_vbus_en1_pcc5";
1171                                 nvidia,function = "rsvd1";
1172                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1173                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1174                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1175                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1176                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1177                         };
1178                         dp_hpd0_pcc6 {
1179                                 nvidia,pins = "dp_hpd0_pcc6";
1180                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1181                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1182                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1183                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1184                         };
1185                         pcc7 {
1186                                 nvidia,pins = "pcc7";
1187                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1188                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1189                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1190                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1191                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1192                         };
1193                         spi2_cs1_pdd0 {
1194                                 nvidia,pins = "spi2_cs1_pdd0";
1195                                 nvidia,function = "rsvd1";
1196                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1197                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1198                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1199                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1200                         };
1201                         qspi_sck_pee0 {
1202                                 nvidia,pins = "qspi_sck_pee0";
1203                                 nvidia,function = "qspi";
1204                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1205                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1206                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1207                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1208                         };
1209                         qspi_cs_n_pee1 {
1210                                 nvidia,pins = "qspi_cs_n_pee1";
1211                                 nvidia,function = "qspi";
1212                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1213                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1214                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1215                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1216                         };
1217                         qspi_io0_pee2 {
1218                                 nvidia,pins = "qspi_io0_pee2";
1219                                 nvidia,function = "qspi";
1220                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1221                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1222                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1223                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1224                         };
1225                         qspi_io1_pee3 {
1226                                 nvidia,pins = "qspi_io1_pee3";
1227                                 nvidia,function = "qspi";
1228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1229                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1230                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1231                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1232                         };
1233                         qspi_io2_pee4 {
1234                                 nvidia,pins = "qspi_io2_pee4";
1235                                 nvidia,function = "rsvd1";
1236                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1237                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1238                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1239                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1240                         };
1241                         qspi_io3_pee5 {
1242                                 nvidia,pins = "qspi_io3_pee5";
1243                                 nvidia,function = "rsvd1";
1244                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1245                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1246                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1247                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1248                         };
1249                         core_pwr_req {
1250                                 nvidia,pins = "core_pwr_req";
1251                                 nvidia,function = "core";
1252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1254                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1255                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1256                         };
1257                         cpu_pwr_req {
1258                                 nvidia,pins = "cpu_pwr_req";
1259                                 nvidia,function = "cpu";
1260                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1261                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1262                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1263                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1264                         };
1265                         pwr_int_n {
1266                                 nvidia,pins = "pwr_int_n";
1267                                 nvidia,function = "pmi";
1268                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1269                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1270                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1271                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1272                         };
1273                         clk_32k_in {
1274                                 nvidia,pins = "clk_32k_in";
1275                                 nvidia,function = "clk";
1276                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1277                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1278                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1279                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1280                         };
1281                         jtag_rtck {
1282                                 nvidia,pins = "jtag_rtck";
1283                                 nvidia,function = "jtag";
1284                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1285                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1286                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1287                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1288                         };
1289                         clk_req {
1290                                 nvidia,pins = "clk_req";
1291                                 nvidia,function = "rsvd1";
1292                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1293                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1294                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1295                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1296                         };
1297                         shutdown {
1298                                 nvidia,pins = "shutdown";
1299                                 nvidia,function = "shutdown";
1300                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1301                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1302                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1303                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1304                         };
1305                 };
1306         };
1307
1308         serial@70006000 {
1309                 status = "okay";
1310         };
1311
1312         i2c@7000c400 {
1313                 status = "okay";
1314                 clock-frequency = <1000000>;
1315
1316                 ec@1e {
1317                         compatible = "google,cros-ec-i2c";
1318                         reg = <0x1e>;
1319                         interrupt-parent = <&gpio>;
1320                         interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
1321                         wakeup-source;
1322
1323                         ec_i2c_0: i2c-tunnel {
1324                                 compatible = "google,cros-ec-i2c-tunnel";
1325                                 #address-cells = <1>;
1326                                 #size-cells = <0>;
1327
1328                                 google,remote-bus = <0>;
1329
1330                                 battery: bq27742@55 {
1331                                         compatible = "ti,bq27742";
1332                                         reg = <0x55>;
1333                                         battery-name = "battery";
1334                                 };
1335                         };
1336                 };
1337         };
1338
1339         i2c@7000d000 {
1340                 status = "okay";
1341                 clock-frequency = <1000000>;
1342
1343                 max77621_cpu: max77621@1b {
1344                         compatible = "maxim,max77621";
1345                         reg = <0x1b>;
1346                         interrupt-parent = <&gpio>;
1347                         interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>;
1348                         regulator-always-on;
1349                         regulator-boot-on;
1350                         regulator-min-microvolt = <800000>;
1351                         regulator-max-microvolt = <1231250>;
1352                         regulator-name = "PPVAR_CPU";
1353                         regulator-ramp-delay = <12500>;
1354                         maxim,dvs-default-state = <1>;
1355                         maxim,enable-active-discharge;
1356                         maxim,enable-bias-control;
1357                         maxim,enable-etr;
1358                         maxim,enable-gpio = <&max77620 5 0>;
1359                         maxim,externally-enable;
1360                 };
1361
1362                 max77620: max77620@3c {
1363                         compatible = "maxim,max77620";
1364                         reg = <0x3c>;
1365                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1366
1367                         #interrupt-cells = <2>;
1368                         interrupt-controller;
1369
1370                         gpio-controller;
1371                         #gpio-cells = <2>;
1372
1373                         pinctrl-names = "default";
1374                         pinctrl-0 = <&max77620_default>;
1375
1376                         max77620_default: pinmux@0 {
1377                                 pin_gpio {
1378                                         pins = "gpio0", "gpio1", "gpio2", "gpio7";
1379                                         function = "gpio";
1380                                 };
1381
1382                                 /*
1383                                  * GPIO3 is used to en_pp3300, and it is part of power
1384                                  * sequence, So it must be sequenced up (automatically
1385                                  * set by OTP) and down properly.
1386                                  */
1387                                 pin_gpio3 {
1388                                         pins = "gpio3";
1389                                         function = "fps-out";
1390                                         drive-open-drain = <1>;
1391                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1392                                         maxim,active-fps-power-up-slot = <4>;
1393                                         maxim,active-fps-power-down-slot = <2>;
1394                                 };
1395
1396                                 pin_gpio5_6 {
1397                                         pins = "gpio5", "gpio6";
1398                                         function = "gpio";
1399                                         drive-push-pull = <1>;
1400                                 };
1401
1402                                 pin_32k {
1403                                         pins = "gpio4";
1404                                         function = "32k-out1";
1405                                 };
1406                         };
1407
1408                         fps {
1409                                 fps0 {
1410                                         maxim,shutdown-fps-time-period-us = <5120>;
1411                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1412                                 };
1413
1414                                 fps1 {
1415                                         maxim,shutdown-fps-time-period-us = <5120>;
1416                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1417                                         maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
1418                                 };
1419
1420                                 fps2 {
1421                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1422                                 };
1423                         };
1424
1425                         regulators {
1426                                 in-ldo0-1-supply = <&pp1350>;
1427                                 in-ldo2-supply = <&pp3300>;
1428                                 in-ldo3-5-supply = <&pp3300>;
1429                                 in-ldo7-8-supply = <&pp1350>;
1430
1431                                 ppvar_soc: sd0 {
1432                                         regulator-name = "PPVAR_SOC";
1433                                         regulator-min-microvolt = <825000>;
1434                                         regulator-max-microvolt = <1125000>;
1435                                         regulator-always-on;
1436                                         regulator-boot-on;
1437                                         maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1438                                         maxim,active-fps-power-up-slot = <1>;
1439                                         maxim,active-fps-power-down-slot = <7>;
1440                                 };
1441
1442                                 pp1100_sd1: sd1 {
1443                                         regulator-name = "PP1100";
1444                                         regulator-min-microvolt = <1125000>;
1445                                         regulator-max-microvolt = <1125000>;
1446                                         regulator-always-on;
1447                                         regulator-boot-on;
1448                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1449                                         maxim,active-fps-power-up-slot = <5>;
1450                                         maxim,active-fps-power-down-slot = <1>;
1451                                 };
1452
1453                                 pp1350: sd2 {
1454                                         regulator-name = "PP1350";
1455                                         regulator-min-microvolt = <1350000>;
1456                                         regulator-max-microvolt = <1350000>;
1457                                         regulator-always-on;
1458                                         regulator-boot-on;
1459                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1460                                         maxim,active-fps-power-up-slot = <2>;
1461                                         maxim,active-fps-power-down-slot = <5>;
1462                                 };
1463
1464                                 pp1800: sd3 {
1465                                         regulator-name = "PP1800";
1466                                         regulator-min-microvolt = <1800000>;
1467                                         regulator-max-microvolt = <1800000>;
1468                                         regulator-always-on;
1469                                         regulator-boot-on;
1470                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1471                                         maxim,active-fps-power-up-slot = <3>;
1472                                         maxim,active-fps-power-down-slot = <3>;
1473                                 };
1474
1475                                 pp1200_avdd: ldo0 {
1476                                         regulator-name = "PP1200_AVDD";
1477                                         regulator-min-microvolt = <1200000>;
1478                                         regulator-max-microvolt = <1200000>;
1479                                         regulator-enable-ramp-delay = <26>;
1480                                         regulator-ramp-delay = <100000>;
1481                                         regulator-boot-on;
1482                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1483                                         maxim,active-fps-power-up-slot = <0>;
1484                                         maxim,active-fps-power-down-slot = <7>;
1485                                 };
1486
1487                                 pp1200_rcam: ldo1 {
1488                                         regulator-name = "PP1200_RCAM";
1489                                         regulator-min-microvolt = <1200000>;
1490                                         regulator-max-microvolt = <1200000>;
1491                                         regulator-enable-ramp-delay = <22>;
1492                                         regulator-ramp-delay = <100000>;
1493                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1494                                         maxim,active-fps-power-up-slot = <0>;
1495                                         maxim,active-fps-power-down-slot = <7>;
1496                                 };
1497
1498                                 pp_ldo2: ldo2 {
1499                                         regulator-name = "PP_LDO2";
1500                                         regulator-min-microvolt = <1800000>;
1501                                         regulator-max-microvolt = <1800000>;
1502                                         regulator-enable-ramp-delay = <62>;
1503                                         regulator-ramp-delay = <11000>;
1504                                         regulator-always-on;
1505                                         regulator-boot-on;
1506                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1507                                         maxim,active-fps-power-up-slot = <0>;
1508                                         maxim,active-fps-power-down-slot = <7>;
1509                                 };
1510
1511                                 pp2800l_rcam: ldo3 {
1512                                         regulator-name = "PP2800L_RCAM";
1513                                         regulator-min-microvolt = <2800000>;
1514                                         regulator-max-microvolt = <2800000>;
1515                                         regulator-enable-ramp-delay = <50>;
1516                                         regulator-ramp-delay = <100000>;
1517                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1518                                         maxim,active-fps-power-up-slot = <0>;
1519                                         maxim,active-fps-power-down-slot = <7>;
1520                                 };
1521
1522                                 pp100_soc_rtc: ldo4 {
1523                                         regulator-name = "PP1100_SOC_RTC";
1524                                         regulator-min-microvolt = <850000>;
1525                                         regulator-max-microvolt = <850000>;
1526                                         regulator-enable-ramp-delay = <22>;
1527                                         regulator-ramp-delay = <100000>;
1528                                         regulator-always-on; /* Check this */
1529                                         regulator-boot-on;
1530                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1531                                         maxim,active-fps-power-up-slot = <1>;
1532                                         maxim,active-fps-power-down-slot = <7>;
1533                                 };
1534
1535                                 pp2800l_fcam: ldo5 {
1536                                         regulator-name = "PP2800L_FCAM";
1537                                         regulator-min-microvolt = <2800000>;
1538                                         regulator-max-microvolt = <2800000>;
1539                                         regulator-enable-ramp-delay = <62>;
1540                                         regulator-ramp-delay = <100000>;
1541                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1542                                         maxim,active-fps-power-up-slot = <0>;
1543                                         maxim,active-fps-power-down-slot = <7>;
1544                                 };
1545
1546                                 ldo6 {
1547                                         /* Unused. */
1548                                         regulator-name = "PP_LDO6";
1549                                         regulator-min-microvolt = <1800000>;
1550                                         regulator-max-microvolt = <1800000>;
1551                                         regulator-enable-ramp-delay = <36>;
1552                                         regulator-ramp-delay = <100000>;
1553                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1554                                         maxim,active-fps-power-up-slot = <0>;
1555                                         maxim,active-fps-power-down-slot = <7>;
1556                                 };
1557
1558                                 pp1050_avdd: ldo7 {
1559                                         regulator-name = "PP1050_AVDD";
1560                                         regulator-min-microvolt = <1050000>;
1561                                         regulator-max-microvolt = <1050000>;
1562                                         regulator-enable-ramp-delay = <24>;
1563                                         regulator-ramp-delay = <100000>;
1564                                         regulator-always-on;
1565                                         regulator-boot-on;
1566                                         maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1567                                         maxim,active-fps-power-up-slot = <3>;
1568                                         maxim,active-fps-power-down-slot = <4>;
1569                                 };
1570
1571                                 avddio_1v05: ldo8 {
1572                                         regulator-name = "AVDDIO_1V05";
1573                                         regulator-min-microvolt = <1050000>;
1574                                         regulator-max-microvolt = <1050000>;
1575                                         regulator-enable-ramp-delay = <22>;
1576                                         regulator-ramp-delay = <100000>;
1577                                         regulator-boot-on;
1578                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1579                                         maxim,active-fps-power-up-slot = <0>;
1580                                         maxim,active-fps-power-down-slot = <7>;
1581                                 };
1582                         };
1583                 };
1584         };
1585
1586         i2c@7000d100 {
1587                 status = "okay";
1588                 clock-frequency = <400000>;
1589
1590                 nau8825@1a {
1591                         compatible = "nuvoton,nau8825";
1592                         reg = <0x1a>;
1593                         interrupt-parent = <&gpio>;
1594                         interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>;
1595                         clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>;
1596                         clock-names = "mclk";
1597
1598                         nuvoton,jkdet-enable;
1599                         nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>;
1600                         nuvoton,vref-impedance = <2>;
1601                         nuvoton,micbias-voltage = <6>;
1602                         nuvoton,sar-threshold-num = <4>;
1603                         nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
1604                         nuvoton,sar-hysteresis = <1>;
1605                         nuvoton,sar-voltage = <0>;
1606                         nuvoton,sar-compare-time = <0>;
1607                         nuvoton,sar-sampling-time = <0>;
1608                         nuvoton,short-key-debounce = <2>;
1609                         nuvoton,jack-insert-debounce = <7>;
1610                         nuvoton,jack-eject-debounce = <7>;
1611                         status = "okay";
1612                 };
1613
1614                 audio-codec@2d {
1615                         compatible = "realtek,rt5677";
1616                         reg = <0x2d>;
1617                         interrupt-parent = <&gpio>;
1618                         interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>;
1619                         realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>;
1620                         gpio-controller;
1621                         #gpio-cells = <2>;
1622                         status = "okay";
1623                 };
1624         };
1625
1626         pmc@7000e400 {
1627                 nvidia,invert-interrupt;
1628                 nvidia,suspend-mode = <0>;
1629                 nvidia,cpu-pwr-good-time = <0>;
1630                 nvidia,cpu-pwr-off-time = <0>;
1631                 nvidia,core-pwr-good-time = <12000 6000>;
1632                 nvidia,core-pwr-off-time = <39053>;
1633                 nvidia,core-power-req-active-high;
1634                 nvidia,sys-clock-req-active-high;
1635                 status = "okay";
1636         };
1637
1638         usb@70090000 {
1639                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
1640                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>;
1641                 phy-names = "usb2-0", "usb3-0";
1642
1643                 dvddio-pex-supply = <&avddio_1v05>;
1644                 hvddio-pex-supply = <&pp1800>;
1645                 avdd-usb-supply = <&pp3300>;
1646                 avdd-pll-utmip-supply = <&pp1800>;
1647                 avdd-pll-uerefe-supply = <&pp1050_avdd>;
1648                 dvdd-pex-pll-supply = <&avddio_1v05>;
1649                 hvdd-pex-pll-e-supply = <&pp1800>;
1650
1651                 status = "okay";
1652         };
1653
1654         padctl@7009f000 {
1655                 status = "okay";
1656
1657                 pads {
1658                         usb2 {
1659                                 status = "okay";
1660
1661                                 lanes {
1662                                         usb2-0 {
1663                                                 nvidia,function = "xusb";
1664                                                 status = "okay";
1665                                         };
1666                                 };
1667                         };
1668
1669                         pcie {
1670                                 status = "okay";
1671
1672                                 lanes {
1673                                         pcie-6 {
1674                                                 nvidia,function = "usb3-ss";
1675                                                 status = "okay";
1676                                         };
1677                                 };
1678                         };
1679                 };
1680
1681                 ports {
1682                         usb2-0 {
1683                                 status = "okay";
1684                                 vbus-supply = <&usbc_vbus>;
1685                                 mode = "otg";
1686                         };
1687
1688                         usb3-0 {
1689                                 nvidia,usb2-companion = <0>;
1690                                 status = "okay";
1691                         };
1692                 };
1693         };
1694
1695         sdhci@700b0600 {
1696                 bus-width = <8>;
1697                 non-removable;
1698                 status = "okay";
1699         };
1700
1701         clock@70110000 {
1702                 status = "okay";
1703                 nvidia,cf = <6>;
1704                 nvidia,ci = <0>;
1705                 nvidia,cg = <2>;
1706                 nvidia,droop-ctrl = <0x00000f00>;
1707                 nvidia,force-mode = <1>;
1708                 nvidia,i2c-fs-rate = <400000>;
1709                 nvidia,sample-rate = <12500>;
1710                 vdd-cpu-supply = <&max77621_cpu>;
1711         };
1712
1713         aconnect@702c0000 {
1714                 status = "okay";
1715
1716                 dma@702e2000 {
1717                         status = "okay";
1718                 };
1719
1720                 agic@702f9000 {
1721                         status = "okay";
1722                 };
1723         };
1724
1725         clocks {
1726                 compatible = "simple-bus";
1727                 #address-cells = <1>;
1728                 #size-cells = <0>;
1729
1730                 clk32k_in: clock@0 {
1731                         compatible = "fixed-clock";
1732                         reg = <0>;
1733                         #clock-cells = <0>;
1734                         clock-frequency = <32768>;
1735                 };
1736         };
1737
1738         cpus {
1739                 cpu@0 {
1740                         enable-method = "psci";
1741                 };
1742
1743                 cpu@1 {
1744                         enable-method = "psci";
1745                 };
1746
1747                 cpu@2 {
1748                         enable-method = "psci";
1749                 };
1750
1751                 cpu@3 {
1752                         enable-method = "psci";
1753                 };
1754         };
1755
1756         gpio-keys {
1757                 compatible = "gpio-keys";
1758
1759                 power {
1760                         label = "Power";
1761                         gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
1762                         linux,code = <KEY_POWER>;
1763                         debounce-interval = <30>;
1764                         wakeup-source;
1765                 };
1766
1767                 lid {
1768                         label = "Lid";
1769                         gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
1770                         linux,input-type = <EV_SW>;
1771                         linux,code = <SW_LID>;
1772                         wakeup-source;
1773                 };
1774
1775                 tablet_mode {
1776                         label = "Tablet Mode";
1777                         gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
1778                         linux,input-type = <EV_SW>;
1779                         linux,code = <SW_TABLET_MODE>;
1780                         wakeup-source;
1781                 };
1782
1783                 volume_down {
1784                         label = "Volume Down";
1785                         gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
1786                         linux,code = <KEY_VOLUMEDOWN>;
1787                 };
1788
1789                 volume_up {
1790                         label = "Volume Up";
1791                         gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
1792                         linux,code = <KEY_VOLUMEUP>;
1793                 };
1794         };
1795
1796         max98357a {
1797                 compatible = "maxim,max98357a";
1798                 status = "okay";
1799         };
1800
1801         psci {
1802                 compatible = "arm,psci-1.0";
1803                 method = "smc";
1804         };
1805
1806         regulators {
1807                 compatible = "simple-bus";
1808                 device_type = "fixed-regulators";
1809                 #address-cells = <1>;
1810                 #size-cells = <0>;
1811
1812                 ppvar_sys: regulator@0 {
1813                         compatible = "regulator-fixed";
1814                         reg = <0>;
1815                         regulator-name = "PPVAR_SYS";
1816                         regulator-min-microvolt = <4400000>;
1817                         regulator-max-microvolt = <4400000>;
1818                         regulator-always-on;
1819                 };
1820
1821                 pplcd_vdd: regulator@1 {
1822                         compatible = "regulator-fixed";
1823                         reg = <1>;
1824                         regulator-name = "PPLCD_VDD";
1825                         regulator-min-microvolt = <4400000>;
1826                         regulator-max-microvolt = <4400000>;
1827                         gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
1828                         enable-active-high;
1829                         regulator-boot-on;
1830                 };
1831
1832                 pp3000_always: regulator@2 {
1833                         compatible = "regulator-fixed";
1834                         reg = <2>;
1835                         regulator-name = "PP3000_ALWAYS";
1836                         regulator-min-microvolt = <3000000>;
1837                         regulator-max-microvolt = <3000000>;
1838                         regulator-always-on;
1839                 };
1840
1841                 pp3300: regulator@3 {
1842                         compatible = "regulator-fixed";
1843                         reg = <3>;
1844                         regulator-name = "PP3300";
1845                         regulator-min-microvolt = <3300000>;
1846                         regulator-max-microvolt = <3300000>;
1847                         regulator-boot-on;
1848                         regulator-always-on;
1849                         enable-active-high;
1850                 };
1851
1852                 pp5000: regulator@4 {
1853                         compatible = "regulator-fixed";
1854                         reg = <4>;
1855                         regulator-name = "PP5000";
1856                         regulator-min-microvolt = <5000000>;
1857                         regulator-max-microvolt = <5000000>;
1858                         regulator-always-on;
1859                 };
1860
1861                 pp1800_lcdio: regulator@5 {
1862                         compatible = "regulator-fixed";
1863                         reg = <5>;
1864                         regulator-name = "PP1800_LCDIO";
1865                         regulator-min-microvolt = <1800000>;
1866                         regulator-max-microvolt = <1800000>;
1867                         gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
1868                         enable-active-high;
1869                         regulator-boot-on;
1870                 };
1871
1872                 pp1800_cam: regulator@6 {
1873                         compatible = "regulator-fixed";
1874                         reg= <6>;
1875                         regulator-name = "PP1800_CAM";
1876                         regulator-min-microvolt = <1800000>;
1877                         regulator-max-microvolt = <1800000>;
1878                         gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
1879                         enable-active-high;
1880                 };
1881
1882                 usbc_vbus: regulator@7 {
1883                         compatible = "regulator-fixed";
1884                         reg = <7>;
1885                         regulator-name = "USBC_VBUS";
1886                         regulator-min-microvolt = <5000000>;
1887                         regulator-max-microvolt = <5000000>;
1888                 };
1889         };
1890 };