arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi

   1 /*
   2  * dtsi file for Hisilicon Hi6220 coresight
   3  *
   4  * Copyright (C) 2017 Hisilicon Ltd.
   5  *
   6  * Author: Pengcheng Li <lipengcheng8@huawei.com>
   7  *         Leo Yan <leo.yan@linaro.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * publishhed by the Free Software Foundation.
  12  *
  13  */
  14
  15 / {
  16         soc {
  17                 funnel@f6401000 {
  18                         compatible = "arm,coresight-funnel", "arm,primecell";
  19                         reg = <0 0xf6401000 0 0x1000>;
  20                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  21                         clock-names = "apb_pclk";
  22
  23                         ports {
  24                                 #address-cells = <1>;
  25                                 #size-cells = <0>;
  26
  27                                 port@0 {
  28                                         reg = <0>;
  29                                         soc_funnel_out: endpoint {
  30                                                 remote-endpoint =
  31                                                         <&etf_in>;
  32                                         };
  33                                 };
  34
  35                                 port@1 {
  36                                         reg = <0>;
  37                                         soc_funnel_in: endpoint {
  38                                                 slave-mode;
  39                                                 remote-endpoint =
  40                                                         <&acpu_funnel_out>;
  41                                         };
  42                                 };
  43                         };
  44                 };
  45
  46                 etf@f6402000 {
  47                         compatible = "arm,coresight-tmc", "arm,primecell";
  48                         reg = <0 0xf6402000 0 0x1000>;
  49                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  50                         clock-names = "apb_pclk";
  51
  52                         ports {
  53                                 #address-cells = <1>;
  54                                 #size-cells = <0>;
  55
  56                                 port@0 {
  57                                         reg = <0>;
  58                                         etf_in: endpoint {
  59                                                 slave-mode;
  60                                                 remote-endpoint =
  61                                                         <&soc_funnel_out>;
  62                                         };
  63                                 };
  64
  65                                 port@1 {
  66                                         reg = <0>;
  67                                         etf_out: endpoint {
  68                                                 remote-endpoint =
  69                                                         <&replicator_in>;
  70                                         };
  71                                 };
  72                         };
  73                 };
  74
  75                 replicator {
  76                         compatible = "arm,coresight-replicator";
  77                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  78                         clock-names = "apb_pclk";
  79
  80                         ports {
  81                                 #address-cells = <1>;
  82                                 #size-cells = <0>;
  83
  84                                 port@0 {
  85                                         reg = <0>;
  86                                         replicator_in: endpoint {
  87                                                 slave-mode;
  88                                                 remote-endpoint =
  89                                                         <&etf_out>;
  90                                         };
  91                                 };
  92
  93                                 port@1 {
  94                                         reg = <0>;
  95                                         replicator_out0: endpoint {
  96                                                 remote-endpoint =
  97                                                         <&etr_in>;
  98                                         };
  99                                 };
 100
 101                                 port@2 {
 102                                         reg = <1>;
 103                                         replicator_out1: endpoint {
 104                                                 remote-endpoint =
 105                                                         <&tpiu_in>;
 106                                         };
 107                                 };
 108                         };
 109                 };
 110
 111                 etr@f6404000 {
 112                         compatible = "arm,coresight-tmc", "arm,primecell";
 113                         reg = <0 0xf6404000 0 0x1000>;
 114                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 115                         clock-names = "apb_pclk";
 116
 117                         ports {
 118                                 #address-cells = <1>;
 119                                 #size-cells = <0>;
 120
 121                                 port@0 {
 122                                         reg = <0>;
 123                                         etr_in: endpoint {
 124                                                 slave-mode;
 125                                                 remote-endpoint =
 126                                                         <&replicator_out0>;
 127                                         };
 128                                 };
 129                         };
 130                 };
 131
 132                 tpiu@f6405000 {
 133                         compatible = "arm,coresight-tpiu", "arm,primecell";
 134                         reg = <0 0xf6405000 0 0x1000>;
 135                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 136                         clock-names = "apb_pclk";
 137
 138                         ports {
 139                                 #address-cells = <1>;
 140                                 #size-cells = <0>;
 141
 142                                 port@0 {
 143                                         reg = <0>;
 144                                         tpiu_in: endpoint {
 145                                                 slave-mode;
 146                                                 remote-endpoint =
 147                                                         <&replicator_out1>;
 148                                         };
 149                                 };
 150                         };
 151                 };
 152
 153                 funnel@f6501000 {
 154                         compatible = "arm,coresight-funnel", "arm,primecell";
 155                         reg = <0 0xf6501000 0 0x1000>;
 156                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 157                         clock-names = "apb_pclk";
 158
 159                         ports {
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162
 163                                 port@0 {
 164                                         reg = <0>;
 165                                         acpu_funnel_out: endpoint {
 166                                                 remote-endpoint =
 167                                                         <&soc_funnel_in>;
 168                                         };
 169                                 };
 170
 171                                 port@1 {
 172                                         reg = <0>;
 173                                         acpu_funnel_in0: endpoint {
 174                                                 slave-mode;
 175                                                 remote-endpoint =
 176                                                         <&etm0_out>;
 177                                         };
 178                                 };
 179
 180                                 port@2 {
 181                                         reg = <1>;
 182                                         acpu_funnel_in1: endpoint {
 183                                                 slave-mode;
 184                                                 remote-endpoint =
 185                                                         <&etm1_out>;
 186                                         };
 187                                 };
 188
 189                                 port@3 {
 190                                         reg = <2>;
 191                                         acpu_funnel_in2: endpoint {
 192                                                 slave-mode;
 193                                                 remote-endpoint =
 194                                                         <&etm2_out>;
 195                                         };
 196                                 };
 197
 198                                 port@4 {
 199                                         reg = <3>;
 200                                         acpu_funnel_in3: endpoint {
 201                                                 slave-mode;
 202                                                 remote-endpoint =
 203                                                         <&etm3_out>;
 204                                         };
 205                                 };
 206
 207                                 port@5 {
 208                                         reg = <4>;
 209                                         acpu_funnel_in4: endpoint {
 210                                                 slave-mode;
 211                                                 remote-endpoint =
 212                                                         <&etm4_out>;
 213                                         };
 214                                 };
 215
 216                                 port@6 {
 217                                         reg = <5>;
 218                                         acpu_funnel_in5: endpoint {
 219                                                 slave-mode;
 220                                                 remote-endpoint =
 221                                                         <&etm5_out>;
 222                                         };
 223                                 };
 224
 225                                 port@7 {
 226                                         reg = <6>;
 227                                         acpu_funnel_in6: endpoint {
 228                                                 slave-mode;
 229                                                 remote-endpoint =
 230                                                         <&etm6_out>;
 231                                         };
 232                                 };
 233
 234                                 port@8 {
 235                                         reg = <7>;
 236                                         acpu_funnel_in7: endpoint {
 237                                                 slave-mode;
 238                                                 remote-endpoint =
 239                                                         <&etm7_out>;
 240                                         };
 241                                 };
 242                         };
 243                 };
 244
 245                 etm@f659c000 {
 246                         compatible = "arm,coresight-etm4x", "arm,primecell";
 247                         reg = <0 0xf659c000 0 0x1000>;
 248
 249                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 250                         clock-names = "apb_pclk";
 251
 252                         cpu = <&cpu0>;
 253
 254                         port {
 255                                 etm0_out: endpoint {
 256                                         remote-endpoint =
 257                                                 <&acpu_funnel_in0>;
 258                                 };
 259                         };
 260                 };
 261
 262                 etm@f659d000 {
 263                         compatible = "arm,coresight-etm4x", "arm,primecell";
 264                         reg = <0 0xf659d000 0 0x1000>;
 265
 266                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 267                         clock-names = "apb_pclk";
 268
 269                         cpu = <&cpu1>;
 270
 271                         port {
 272                                 etm1_out: endpoint {
 273                                         remote-endpoint =
 274                                                 <&acpu_funnel_in1>;
 275                                 };
 276                         };
 277                 };
 278
 279                 etm@f659e000 {
 280                         compatible = "arm,coresight-etm4x", "arm,primecell";
 281                         reg = <0 0xf659e000 0 0x1000>;
 282
 283                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 284                         clock-names = "apb_pclk";
 285
 286                         cpu = <&cpu2>;
 287
 288                         port {
 289                                 etm2_out: endpoint {
 290                                         remote-endpoint =
 291                                                 <&acpu_funnel_in2>;
 292                                 };
 293                         };
 294                 };
 295
 296                 etm@f659f000 {
 297                         compatible = "arm,coresight-etm4x", "arm,primecell";
 298                         reg = <0 0xf659f000 0 0x1000>;
 299
 300                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 301                         clock-names = "apb_pclk";
 302
 303                         cpu = <&cpu3>;
 304
 305                         port {
 306                                 etm3_out: endpoint {
 307                                         remote-endpoint =
 308                                                 <&acpu_funnel_in3>;
 309                                 };
 310                         };
 311                 };
 312
 313                 etm@f65dc000 {
 314                         compatible = "arm,coresight-etm4x", "arm,primecell";
 315                         reg = <0 0xf65dc000 0 0x1000>;
 316
 317                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 318                         clock-names = "apb_pclk";
 319
 320                         cpu = <&cpu4>;
 321
 322                         port {
 323                                 etm4_out: endpoint {
 324                                         remote-endpoint =
 325                                                 <&acpu_funnel_in4>;
 326                                 };
 327                         };
 328                 };
 329
 330                 etm@f65dd000 {
 331                         compatible = "arm,coresight-etm4x", "arm,primecell";
 332                         reg = <0 0xf65dd000 0 0x1000>;
 333
 334                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 335                         clock-names = "apb_pclk";
 336
 337                         cpu = <&cpu5>;
 338
 339                         port {
 340                                 etm5_out: endpoint {
 341                                         remote-endpoint =
 342                                                 <&acpu_funnel_in5>;
 343                                 };
 344                         };
 345                 };
 346
 347                 etm@f65de000 {
 348                         compatible = "arm,coresight-etm4x", "arm,primecell";
 349                         reg = <0 0xf65de000 0 0x1000>;
 350
 351                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 352                         clock-names = "apb_pclk";
 353
 354                         cpu = <&cpu6>;
 355
 356                         port {
 357                                 etm6_out: endpoint {
 358                                         remote-endpoint =
 359                                                 <&acpu_funnel_in6>;
 360                                 };
 361                         };
 362                 };
 363
 364                 etm@f65df000 {
 365                         compatible = "arm,coresight-etm4x", "arm,primecell";
 366                         reg = <0 0xf65df000 0 0x1000>;
 367
 368                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 369                         clock-names = "apb_pclk";
 370
 371                         cpu = <&cpu7>;
 372
 373                         port {
 374                                 etm7_out: endpoint {
 375                                         remote-endpoint =
 376                                                 <&acpu_funnel_in7>;
 377                                 };
 378                         };
 379                 };
 380         };
 381 };