arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi

   1 /*
   2  * dtsi file for Hisilicon Hi6220 coresight
   3  *
   4  * Copyright (C) 2017 Hisilicon Ltd.
   5  *
   6  * Author: Pengcheng Li <lipengcheng8@huawei.com>
   7  *         Leo Yan <leo.yan@linaro.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * publishhed by the Free Software Foundation.
  12  *
  13  */
  14
  15 / {
  16         soc {
  17                 funnel@f6401000 {
  18                         compatible = "arm,coresight-funnel", "arm,primecell";
  19                         reg = <0 0xf6401000 0 0x1000>;
  20                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  21                         clock-names = "apb_pclk";
  22
  23                         out-ports {
  24                                 port {
  25                                         soc_funnel_out: endpoint {
  26                                                 remote-endpoint =
  27                                                         <&etf_in>;
  28                                         };
  29                                 };
  30                         };
  31
  32                         in-ports {
  33                                 port {
  34                                         soc_funnel_in: endpoint {
  35                                                 remote-endpoint =
  36                                                         <&acpu_funnel_out>;
  37                                         };
  38                                 };
  39                         };
  40                 };
  41
  42                 etf@f6402000 {
  43                         compatible = "arm,coresight-tmc", "arm,primecell";
  44                         reg = <0 0xf6402000 0 0x1000>;
  45                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  46                         clock-names = "apb_pclk";
  47
  48                         in-ports {
  49                                 port {
  50                                         etf_in: endpoint {
  51                                                 remote-endpoint =
  52                                                         <&soc_funnel_out>;
  53                                         };
  54                                 };
  55                         };
  56
  57                         out-ports {
  58                                 port {
  59                                         etf_out: endpoint {
  60                                                 remote-endpoint =
  61                                                         <&replicator_in>;
  62                                         };
  63                                 };
  64                         };
  65                 };
  66
  67                 replicator {
  68                         compatible = "arm,coresight-replicator";
  69                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
  70                         clock-names = "apb_pclk";
  71
  72                         in-ports {
  73                                 port {
  74                                         replicator_in: endpoint {
  75                                                 remote-endpoint =
  76                                                         <&etf_out>;
  77                                         };
  78                                 };
  79                         };
  80
  81                         out-ports {
  82                                 #address-cells = <1>;
  83                                 #size-cells = <0>;
  84
  85                                 port@0 {
  86                                         reg = <0>;
  87                                         replicator_out0: endpoint {
  88                                                 remote-endpoint =
  89                                                         <&etr_in>;
  90                                         };
  91                                 };
  92
  93                                 port@1 {
  94                                         reg = <1>;
  95                                         replicator_out1: endpoint {
  96                                                 remote-endpoint =
  97                                                         <&tpiu_in>;
  98                                         };
  99                                 };
 100                         };
 101                 };
 102
 103                 etr@f6404000 {
 104                         compatible = "arm,coresight-tmc", "arm,primecell";
 105                         reg = <0 0xf6404000 0 0x1000>;
 106                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 107                         clock-names = "apb_pclk";
 108
 109                         in-ports {
 110                                 port {
 111                                         etr_in: endpoint {
 112                                                 remote-endpoint =
 113                                                         <&replicator_out0>;
 114                                         };
 115                                 };
 116                         };
 117                 };
 118
 119                 tpiu@f6405000 {
 120                         compatible = "arm,coresight-tpiu", "arm,primecell";
 121                         reg = <0 0xf6405000 0 0x1000>;
 122                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 123                         clock-names = "apb_pclk";
 124
 125                         in-ports {
 126                                 port {
 127                                         tpiu_in: endpoint {
 128                                                 remote-endpoint =
 129                                                         <&replicator_out1>;
 130                                         };
 131                                 };
 132                         };
 133                 };
 134
 135                 funnel@f6501000 {
 136                         compatible = "arm,coresight-funnel", "arm,primecell";
 137                         reg = <0 0xf6501000 0 0x1000>;
 138                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 139                         clock-names = "apb_pclk";
 140
 141                         out-ports {
 142                                 port {
 143                                         acpu_funnel_out: endpoint {
 144                                                 remote-endpoint =
 145                                                         <&soc_funnel_in>;
 146                                         };
 147                                 };
 148                         };
 149
 150                         in-ports {
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153
 154                                 port@0 {
 155                                         reg = <0>;
 156                                         acpu_funnel_in0: endpoint {
 157                                                 remote-endpoint =
 158                                                         <&etm0_out>;
 159                                         };
 160                                 };
 161
 162                                 port@1 {
 163                                         reg = <1>;
 164                                         acpu_funnel_in1: endpoint {
 165                                                 remote-endpoint =
 166                                                         <&etm1_out>;
 167                                         };
 168                                 };
 169
 170                                 port@2 {
 171                                         reg = <2>;
 172                                         acpu_funnel_in2: endpoint {
 173                                                 remote-endpoint =
 174                                                         <&etm2_out>;
 175                                         };
 176                                 };
 177
 178                                 port@3 {
 179                                         reg = <3>;
 180                                         acpu_funnel_in3: endpoint {
 181                                                 remote-endpoint =
 182                                                         <&etm3_out>;
 183                                         };
 184                                 };
 185
 186                                 port@4 {
 187                                         reg = <4>;
 188                                         acpu_funnel_in4: endpoint {
 189                                                 remote-endpoint =
 190                                                         <&etm4_out>;
 191                                         };
 192                                 };
 193
 194                                 port@5 {
 195                                         reg = <5>;
 196                                         acpu_funnel_in5: endpoint {
 197                                                 remote-endpoint =
 198                                                         <&etm5_out>;
 199                                         };
 200                                 };
 201
 202                                 port@6 {
 203                                         reg = <6>;
 204                                         acpu_funnel_in6: endpoint {
 205                                                 remote-endpoint =
 206                                                         <&etm6_out>;
 207                                         };
 208                                 };
 209
 210                                 port@7 {
 211                                         reg = <7>;
 212                                         acpu_funnel_in7: endpoint {
 213                                                 remote-endpoint =
 214                                                         <&etm7_out>;
 215                                         };
 216                                 };
 217                         };
 218                 };
 219
 220                 etm@f659c000 {
 221                         compatible = "arm,coresight-etm4x", "arm,primecell";
 222                         reg = <0 0xf659c000 0 0x1000>;
 223
 224                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 225                         clock-names = "apb_pclk";
 226
 227                         cpu = <&cpu0>;
 228
 229                         out-ports {
 230                                 port {
 231                                         etm0_out: endpoint {
 232                                                 remote-endpoint =
 233                                                         <&acpu_funnel_in0>;
 234                                         };
 235                                 };
 236                         };
 237                 };
 238
 239                 etm@f659d000 {
 240                         compatible = "arm,coresight-etm4x", "arm,primecell";
 241                         reg = <0 0xf659d000 0 0x1000>;
 242
 243                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 244                         clock-names = "apb_pclk";
 245
 246                         cpu = <&cpu1>;
 247
 248                         out-ports {
 249                                 port {
 250                                         etm1_out: endpoint {
 251                                                 remote-endpoint =
 252                                                         <&acpu_funnel_in1>;
 253                                         };
 254                                 };
 255                         };
 256                 };
 257
 258                 etm@f659e000 {
 259                         compatible = "arm,coresight-etm4x", "arm,primecell";
 260                         reg = <0 0xf659e000 0 0x1000>;
 261
 262                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 263                         clock-names = "apb_pclk";
 264
 265                         cpu = <&cpu2>;
 266
 267                         out-ports {
 268                                 port {
 269                                         etm2_out: endpoint {
 270                                                 remote-endpoint =
 271                                                         <&acpu_funnel_in2>;
 272                                         };
 273                                 };
 274                         };
 275                 };
 276
 277                 etm@f659f000 {
 278                         compatible = "arm,coresight-etm4x", "arm,primecell";
 279                         reg = <0 0xf659f000 0 0x1000>;
 280
 281                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 282                         clock-names = "apb_pclk";
 283
 284                         cpu = <&cpu3>;
 285
 286                         out-ports {
 287                                 port {
 288                                         etm3_out: endpoint {
 289                                                 remote-endpoint =
 290                                                         <&acpu_funnel_in3>;
 291                                         };
 292                                 };
 293                         };
 294                 };
 295
 296                 etm@f65dc000 {
 297                         compatible = "arm,coresight-etm4x", "arm,primecell";
 298                         reg = <0 0xf65dc000 0 0x1000>;
 299
 300                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 301                         clock-names = "apb_pclk";
 302
 303                         cpu = <&cpu4>;
 304
 305                         out-ports {
 306                                 port {
 307                                         etm4_out: endpoint {
 308                                                 remote-endpoint =
 309                                                         <&acpu_funnel_in4>;
 310                                         };
 311                                 };
 312                         };
 313                 };
 314
 315                 etm@f65dd000 {
 316                         compatible = "arm,coresight-etm4x", "arm,primecell";
 317                         reg = <0 0xf65dd000 0 0x1000>;
 318
 319                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 320                         clock-names = "apb_pclk";
 321
 322                         cpu = <&cpu5>;
 323
 324                         out-ports {
 325                                 port {
 326                                         etm5_out: endpoint {
 327                                                 remote-endpoint =
 328                                                         <&acpu_funnel_in5>;
 329                                         };
 330                                 };
 331                         };
 332                 };
 333
 334                 etm@f65de000 {
 335                         compatible = "arm,coresight-etm4x", "arm,primecell";
 336                         reg = <0 0xf65de000 0 0x1000>;
 337
 338                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 339                         clock-names = "apb_pclk";
 340
 341                         cpu = <&cpu6>;
 342
 343                         out-ports {
 344                                 port {
 345                                         etm6_out: endpoint {
 346                                                 remote-endpoint =
 347                                                         <&acpu_funnel_in6>;
 348                                         };
 349                                 };
 350                         };
 351                 };
 352
 353                 etm@f65df000 {
 354                         compatible = "arm,coresight-etm4x", "arm,primecell";
 355                         reg = <0 0xf65df000 0 0x1000>;
 356
 357                         clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
 358                         clock-names = "apb_pclk";
 359
 360                         cpu = <&cpu7>;
 361
 362                         out-ports {
 363                                 port {
 364                                         etm7_out: endpoint {
 365                                                 remote-endpoint =
 366                                                         <&acpu_funnel_in7>;
 367                                         };
 368                                 };
 369                         };
 370                 };
 371         };
 372 };