arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

   1 /*
   2  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
   3  *
   4  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   5  *
   6  * Mingkai Hu <Mingkai.hu@freescale.com>
   7  *
   8  * This file is dual-licensed: you can use it either under the terms
   9  * of the GPLv2 or the X11 license, at your option. Note that this dual
  10  * licensing only applies to this file, and not this project as a
  11  * whole.
  12  *
  13  *  a) This library is free software; you can redistribute it and/or
  14  *     modify it under the terms of the GNU General Public License as
  15  *     published by the Free Software Foundation; either version 2 of the
  16  *     License, or (at your option) any later version.
  17  *
  18  *     This library is distributed in the hope that it will be useful,
  19  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  *     GNU General Public License for more details.
  22  *
  23  * Or, alternatively,
  24  *
  25  *  b) Permission is hereby granted, free of charge, to any person
  26  *     obtaining a copy of this software and associated documentation
  27  *     files (the "Software"), to deal in the Software without
  28  *     restriction, including without limitation the rights to use,
  29  *     copy, modify, merge, publish, distribute, sublicense, and/or
  30  *     sell copies of the Software, and to permit persons to whom the
  31  *     Software is furnished to do so, subject to the following
  32  *     conditions:
  33  *
  34  *     The above copyright notice and this permission notice shall be
  35  *     included in all copies or substantial portions of the Software.
  36  *
  37  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44  *     OTHER DEALINGS IN THE SOFTWARE.
  45  */
  46
  47 #include <dt-bindings/thermal/thermal.h>
  48 #include <dt-bindings/interrupt-controller/arm-gic.h>
  49
  50 / {
  51         compatible = "fsl,ls1043a";
  52         interrupt-parent = <&gic>;
  53         #address-cells = <2>;
  54         #size-cells = <2>;
  55
  56         aliases {
  57                 fman0 = &fman0;
  58                 ethernet0 = &enet0;
  59                 ethernet1 = &enet1;
  60                 ethernet2 = &enet2;
  61                 ethernet3 = &enet3;
  62                 ethernet4 = &enet4;
  63                 ethernet5 = &enet5;
  64                 ethernet6 = &enet6;
  65         };
  66
  67         cpus {
  68                 #address-cells = <1>;
  69                 #size-cells = <0>;
  70
  71                 /*
  72                  * We expect the enable-method for cpu's to be "psci", but this
  73                  * is dependent on the SoC FW, which will fill this in.
  74                  *
  75                  * Currently supported enable-method is psci v0.2
  76                  */
  77                 cpu0: cpu@0 {
  78                         device_type = "cpu";
  79                         compatible = "arm,cortex-a53";
  80                         reg = <0x0>;
  81                         clocks = <&clockgen 1 0>;
  82                         next-level-cache = <&l2>;
  83                         #cooling-cells = <2>;
  84                 };
  85
  86                 cpu1: cpu@1 {
  87                         device_type = "cpu";
  88                         compatible = "arm,cortex-a53";
  89                         reg = <0x1>;
  90                         clocks = <&clockgen 1 0>;
  91                         next-level-cache = <&l2>;
  92                 };
  93
  94                 cpu2: cpu@2 {
  95                         device_type = "cpu";
  96                         compatible = "arm,cortex-a53";
  97                         reg = <0x2>;
  98                         clocks = <&clockgen 1 0>;
  99                         next-level-cache = <&l2>;
 100                 };
 101
 102                 cpu3: cpu@3 {
 103                         device_type = "cpu";
 104                         compatible = "arm,cortex-a53";
 105                         reg = <0x3>;
 106                         clocks = <&clockgen 1 0>;
 107                         next-level-cache = <&l2>;
 108                 };
 109
 110                 l2: l2-cache {
 111                         compatible = "cache";
 112                 };
 113         };
 114
 115         memory@80000000 {
 116                 device_type = "memory";
 117                 reg = <0x0 0x80000000 0 0x80000000>;
 118                       /* DRAM space 1, size: 2GiB DRAM */
 119         };
 120
 121         reserved-memory {
 122                 #address-cells = <2>;
 123                 #size-cells = <2>;
 124                 ranges;
 125
 126                 bman_fbpr: bman-fbpr {
 127                         compatible = "shared-dma-pool";
 128                         size = <0 0x1000000>;
 129                         alignment = <0 0x1000000>;
 130                         no-map;
 131                 };
 132
 133                 qman_fqd: qman-fqd {
 134                         compatible = "shared-dma-pool";
 135                         size = <0 0x400000>;
 136                         alignment = <0 0x400000>;
 137                         no-map;
 138                 };
 139
 140                 qman_pfdr: qman-pfdr {
 141                         compatible = "shared-dma-pool";
 142                         size = <0 0x2000000>;
 143                         alignment = <0 0x2000000>;
 144                         no-map;
 145                 };
 146         };
 147
 148         sysclk: sysclk {
 149                 compatible = "fixed-clock";
 150                 #clock-cells = <0>;
 151                 clock-frequency = <100000000>;
 152                 clock-output-names = "sysclk";
 153         };
 154
 155         reboot {
 156                 compatible ="syscon-reboot";
 157                 regmap = <&dcfg>;
 158                 offset = <0xb0>;
 159                 mask = <0x02>;
 160         };
 161
 162         timer {
 163                 compatible = "arm,armv8-timer";
 164                 interrupts = <1 13 0xf08>, /* Physical Secure PPI */
 165                              <1 14 0xf08>, /* Physical Non-Secure PPI */
 166                              <1 11 0xf08>, /* Virtual PPI */
 167                              <1 10 0xf08>; /* Hypervisor PPI */
 168                 fsl,erratum-a008585;
 169         };
 170
 171         pmu {
 172                 compatible = "arm,armv8-pmuv3";
 173                 interrupts = <0 106 0x4>,
 174                              <0 107 0x4>,
 175                              <0 95 0x4>,
 176                              <0 97 0x4>;
 177                 interrupt-affinity = <&cpu0>,
 178                                      <&cpu1>,
 179                                      <&cpu2>,
 180                                      <&cpu3>;
 181         };
 182
 183         gic: interrupt-controller@1400000 {
 184                 compatible = "arm,gic-400";
 185                 #interrupt-cells = <3>;
 186                 interrupt-controller;
 187                 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
 188                       <0x0 0x1402000 0 0x2000>, /* GICC */
 189                       <0x0 0x1404000 0 0x2000>, /* GICH */
 190                       <0x0 0x1406000 0 0x2000>; /* GICV */
 191                 interrupts = <1 9 0xf08>;
 192         };
 193
 194         soc: soc {
 195                 compatible = "simple-bus";
 196                 #address-cells = <2>;
 197                 #size-cells = <2>;
 198                 ranges;
 199
 200                 clockgen: clocking@1ee1000 {
 201                         compatible = "fsl,ls1043a-clockgen";
 202                         reg = <0x0 0x1ee1000 0x0 0x1000>;
 203                         #clock-cells = <2>;
 204                         clocks = <&sysclk>;
 205                 };
 206
 207                 scfg: scfg@1570000 {
 208                         compatible = "fsl,ls1043a-scfg", "syscon";
 209                         reg = <0x0 0x1570000 0x0 0x10000>;
 210                         big-endian;
 211                 };
 212
 213                 crypto: crypto@1700000 {
 214                         compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
 215                                      "fsl,sec-v4.0";
 216                         fsl,sec-era = <3>;
 217                         #address-cells = <1>;
 218                         #size-cells = <1>;
 219                         ranges = <0x0 0x00 0x1700000 0x100000>;
 220                         reg = <0x00 0x1700000 0x0 0x100000>;
 221                         interrupts = <0 75 0x4>;
 222
 223                         sec_jr0: jr@10000 {
 224                                 compatible = "fsl,sec-v5.4-job-ring",
 225                                              "fsl,sec-v5.0-job-ring",
 226                                              "fsl,sec-v4.0-job-ring";
 227                                 reg        = <0x10000 0x10000>;
 228                                 interrupts = <0 71 0x4>;
 229                         };
 230
 231                         sec_jr1: jr@20000 {
 232                                 compatible = "fsl,sec-v5.4-job-ring",
 233                                              "fsl,sec-v5.0-job-ring",
 234                                              "fsl,sec-v4.0-job-ring";
 235                                 reg        = <0x20000 0x10000>;
 236                                 interrupts = <0 72 0x4>;
 237                         };
 238
 239                         sec_jr2: jr@30000 {
 240                                 compatible = "fsl,sec-v5.4-job-ring",
 241                                              "fsl,sec-v5.0-job-ring",
 242                                              "fsl,sec-v4.0-job-ring";
 243                                 reg        = <0x30000 0x10000>;
 244                                 interrupts = <0 73 0x4>;
 245                         };
 246
 247                         sec_jr3: jr@40000 {
 248                                 compatible = "fsl,sec-v5.4-job-ring",
 249                                              "fsl,sec-v5.0-job-ring",
 250                                              "fsl,sec-v4.0-job-ring";
 251                                 reg        = <0x40000 0x10000>;
 252                                 interrupts = <0 74 0x4>;
 253                         };
 254                 };
 255
 256                 dcfg: dcfg@1ee0000 {
 257                         compatible = "fsl,ls1043a-dcfg", "syscon";
 258                         reg = <0x0 0x1ee0000 0x0 0x10000>;
 259                         big-endian;
 260                 };
 261
 262                 ifc: ifc@1530000 {
 263                         compatible = "fsl,ifc", "simple-bus";
 264                         reg = <0x0 0x1530000 0x0 0x10000>;
 265                         big-endian;
 266                         interrupts = <0 43 0x4>;
 267                 };
 268
 269                 qspi: quadspi@1550000 {
 270                         compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
 271                         #address-cells = <1>;
 272                         #size-cells = <0>;
 273                         reg = <0x0 0x1550000 0x0 0x10000>,
 274                                 <0x0 0x40000000 0x0 0x4000000>;
 275                         reg-names = "QuadSPI", "QuadSPI-memory";
 276                         interrupts = <0 99 0x4>;
 277                         clock-names = "qspi_en", "qspi";
 278                         clocks = <&clockgen 4 0>, <&clockgen 4 0>;
 279                         big-endian;
 280                         status = "disabled";
 281                 };
 282
 283                 esdhc: esdhc@1560000 {
 284                         compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
 285                         reg = <0x0 0x1560000 0x0 0x10000>;
 286                         interrupts = <0 62 0x4>;
 287                         clock-frequency = <0>;
 288                         voltage-ranges = <1800 1800 3300 3300>;
 289                         sdhci,auto-cmd12;
 290                         big-endian;
 291                         bus-width = <4>;
 292                 };
 293
 294                 ddr: memory-controller@1080000 {
 295                         compatible = "fsl,qoriq-memory-controller";
 296                         reg = <0x0 0x1080000 0x0 0x1000>;
 297                         interrupts = <0 144 0x4>;
 298                         big-endian;
 299                 };
 300
 301                 tmu: tmu@1f00000 {
 302                         compatible = "fsl,qoriq-tmu";
 303                         reg = <0x0 0x1f00000 0x0 0x10000>;
 304                         interrupts = <0 33 0x4>;
 305                         fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
 306                         fsl,tmu-calibration = <0x00000000 0x00000026
 307                                                0x00000001 0x0000002d
 308                                                0x00000002 0x00000032
 309                                                0x00000003 0x00000039
 310                                                0x00000004 0x0000003f
 311                                                0x00000005 0x00000046
 312                                                0x00000006 0x0000004d
 313                                                0x00000007 0x00000054
 314                                                0x00000008 0x0000005a
 315                                                0x00000009 0x00000061
 316                                                0x0000000a 0x0000006a
 317                                                0x0000000b 0x00000071
 318
 319                                                0x00010000 0x00000025
 320                                                0x00010001 0x0000002c
 321                                                0x00010002 0x00000035
 322                                                0x00010003 0x0000003d
 323                                                0x00010004 0x00000045
 324                                                0x00010005 0x0000004e
 325                                                0x00010006 0x00000057
 326                                                0x00010007 0x00000061
 327                                                0x00010008 0x0000006b
 328                                                0x00010009 0x00000076
 329
 330                                                0x00020000 0x00000029
 331                                                0x00020001 0x00000033
 332                                                0x00020002 0x0000003d
 333                                                0x00020003 0x00000049
 334                                                0x00020004 0x00000056
 335                                                0x00020005 0x00000061
 336                                                0x00020006 0x0000006d
 337
 338                                                0x00030000 0x00000021
 339                                                0x00030001 0x0000002a
 340                                                0x00030002 0x0000003c
 341                                                0x00030003 0x0000004e>;
 342                         #thermal-sensor-cells = <1>;
 343                 };
 344
 345                 thermal-zones {
 346                         cpu_thermal: cpu-thermal {
 347                                 polling-delay-passive = <1000>;
 348                                 polling-delay = <5000>;
 349
 350                                 thermal-sensors = <&tmu 3>;
 351
 352                                 trips {
 353                                         cpu_alert: cpu-alert {
 354                                                 temperature = <85000>;
 355                                                 hysteresis = <2000>;
 356                                                 type = "passive";
 357                                         };
 358                                         cpu_crit: cpu-crit {
 359                                                 temperature = <95000>;
 360                                                 hysteresis = <2000>;
 361                                                 type = "critical";
 362                                         };
 363                                 };
 364
 365                                 cooling-maps {
 366                                         map0 {
 367                                                 trip = <&cpu_alert>;
 368                                                 cooling-device =
 369                                                         <&cpu0 THERMAL_NO_LIMIT
 370                                                         THERMAL_NO_LIMIT>;
 371                                         };
 372                                 };
 373                         };
 374                 };
 375
 376                 qman: qman@1880000 {
 377                         compatible = "fsl,qman";
 378                         reg = <0x0 0x1880000 0x0 0x10000>;
 379                         interrupts = <0 45 0x4>;
 380                         memory-region = <&qman_fqd &qman_pfdr>;
 381                 };
 382
 383                 bman: bman@1890000 {
 384                         compatible = "fsl,bman";
 385                         reg = <0x0 0x1890000 0x0 0x10000>;
 386                         interrupts = <0 45 0x4>;
 387                         memory-region = <&bman_fbpr>;
 388                 };
 389
 390                 bportals: bman-portals@508000000 {
 391                         ranges = <0x0 0x5 0x08000000 0x8000000>;
 392                 };
 393
 394                 qportals: qman-portals@500000000 {
 395                         ranges = <0x0 0x5 0x00000000 0x8000000>;
 396                 };
 397
 398                 dspi0: dspi@2100000 {
 399                         compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 400                         #address-cells = <1>;
 401                         #size-cells = <0>;
 402                         reg = <0x0 0x2100000 0x0 0x10000>;
 403                         interrupts = <0 64 0x4>;
 404                         clock-names = "dspi";
 405                         clocks = <&clockgen 4 0>;
 406                         spi-num-chipselects = <5>;
 407                         big-endian;
 408                         status = "disabled";
 409                 };
 410
 411                 dspi1: dspi@2110000 {
 412                         compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 413                         #address-cells = <1>;
 414                         #size-cells = <0>;
 415                         reg = <0x0 0x2110000 0x0 0x10000>;
 416                         interrupts = <0 65 0x4>;
 417                         clock-names = "dspi";
 418                         clocks = <&clockgen 4 0>;
 419                         spi-num-chipselects = <5>;
 420                         big-endian;
 421                         status = "disabled";
 422                 };
 423
 424                 i2c0: i2c@2180000 {
 425                         compatible = "fsl,vf610-i2c";
 426                         #address-cells = <1>;
 427                         #size-cells = <0>;
 428                         reg = <0x0 0x2180000 0x0 0x10000>;
 429                         interrupts = <0 56 0x4>;
 430                         clock-names = "i2c";
 431                         clocks = <&clockgen 4 0>;
 432                         dmas = <&edma0 1 39>,
 433                                <&edma0 1 38>;
 434                         dma-names = "tx", "rx";
 435                         status = "disabled";
 436                 };
 437
 438                 i2c1: i2c@2190000 {
 439                         compatible = "fsl,vf610-i2c";
 440                         #address-cells = <1>;
 441                         #size-cells = <0>;
 442                         reg = <0x0 0x2190000 0x0 0x10000>;
 443                         interrupts = <0 57 0x4>;
 444                         clock-names = "i2c";
 445                         clocks = <&clockgen 4 0>;
 446                         status = "disabled";
 447                 };
 448
 449                 i2c2: i2c@21a0000 {
 450                         compatible = "fsl,vf610-i2c";
 451                         #address-cells = <1>;
 452                         #size-cells = <0>;
 453                         reg = <0x0 0x21a0000 0x0 0x10000>;
 454                         interrupts = <0 58 0x4>;
 455                         clock-names = "i2c";
 456                         clocks = <&clockgen 4 0>;
 457                         status = "disabled";
 458                 };
 459
 460                 i2c3: i2c@21b0000 {
 461                         compatible = "fsl,vf610-i2c";
 462                         #address-cells = <1>;
 463                         #size-cells = <0>;
 464                         reg = <0x0 0x21b0000 0x0 0x10000>;
 465                         interrupts = <0 59 0x4>;
 466                         clock-names = "i2c";
 467                         clocks = <&clockgen 4 0>;
 468                         status = "disabled";
 469                 };
 470
 471                 duart0: serial@21c0500 {
 472                         compatible = "fsl,ns16550", "ns16550a";
 473                         reg = <0x00 0x21c0500 0x0 0x100>;
 474                         interrupts = <0 54 0x4>;
 475                         clocks = <&clockgen 4 0>;
 476                 };
 477
 478                 duart1: serial@21c0600 {
 479                         compatible = "fsl,ns16550", "ns16550a";
 480                         reg = <0x00 0x21c0600 0x0 0x100>;
 481                         interrupts = <0 54 0x4>;
 482                         clocks = <&clockgen 4 0>;
 483                 };
 484
 485                 duart2: serial@21d0500 {
 486                         compatible = "fsl,ns16550", "ns16550a";
 487                         reg = <0x0 0x21d0500 0x0 0x100>;
 488                         interrupts = <0 55 0x4>;
 489                         clocks = <&clockgen 4 0>;
 490                 };
 491
 492                 duart3: serial@21d0600 {
 493                         compatible = "fsl,ns16550", "ns16550a";
 494                         reg = <0x0 0x21d0600 0x0 0x100>;
 495                         interrupts = <0 55 0x4>;
 496                         clocks = <&clockgen 4 0>;
 497                 };
 498
 499                 gpio1: gpio@2300000 {
 500                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 501                         reg = <0x0 0x2300000 0x0 0x10000>;
 502                         interrupts = <0 66 0x4>;
 503                         gpio-controller;
 504                         #gpio-cells = <2>;
 505                         interrupt-controller;
 506                         #interrupt-cells = <2>;
 507                 };
 508
 509                 gpio2: gpio@2310000 {
 510                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 511                         reg = <0x0 0x2310000 0x0 0x10000>;
 512                         interrupts = <0 67 0x4>;
 513                         gpio-controller;
 514                         #gpio-cells = <2>;
 515                         interrupt-controller;
 516                         #interrupt-cells = <2>;
 517                 };
 518
 519                 gpio3: gpio@2320000 {
 520                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 521                         reg = <0x0 0x2320000 0x0 0x10000>;
 522                         interrupts = <0 68 0x4>;
 523                         gpio-controller;
 524                         #gpio-cells = <2>;
 525                         interrupt-controller;
 526                         #interrupt-cells = <2>;
 527                 };
 528
 529                 gpio4: gpio@2330000 {
 530                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 531                         reg = <0x0 0x2330000 0x0 0x10000>;
 532                         interrupts = <0 134 0x4>;
 533                         gpio-controller;
 534                         #gpio-cells = <2>;
 535                         interrupt-controller;
 536                         #interrupt-cells = <2>;
 537                 };
 538
 539                 lpuart0: serial@2950000 {
 540                         compatible = "fsl,ls1021a-lpuart";
 541                         reg = <0x0 0x2950000 0x0 0x1000>;
 542                         interrupts = <0 48 0x4>;
 543                         clocks = <&clockgen 0 0>;
 544                         clock-names = "ipg";
 545                         status = "disabled";
 546                 };
 547
 548                 lpuart1: serial@2960000 {
 549                         compatible = "fsl,ls1021a-lpuart";
 550                         reg = <0x0 0x2960000 0x0 0x1000>;
 551                         interrupts = <0 49 0x4>;
 552                         clocks = <&clockgen 4 0>;
 553                         clock-names = "ipg";
 554                         status = "disabled";
 555                 };
 556
 557                 lpuart2: serial@2970000 {
 558                         compatible = "fsl,ls1021a-lpuart";
 559                         reg = <0x0 0x2970000 0x0 0x1000>;
 560                         interrupts = <0 50 0x4>;
 561                         clocks = <&clockgen 4 0>;
 562                         clock-names = "ipg";
 563                         status = "disabled";
 564                 };
 565
 566                 lpuart3: serial@2980000 {
 567                         compatible = "fsl,ls1021a-lpuart";
 568                         reg = <0x0 0x2980000 0x0 0x1000>;
 569                         interrupts = <0 51 0x4>;
 570                         clocks = <&clockgen 4 0>;
 571                         clock-names = "ipg";
 572                         status = "disabled";
 573                 };
 574
 575                 lpuart4: serial@2990000 {
 576                         compatible = "fsl,ls1021a-lpuart";
 577                         reg = <0x0 0x2990000 0x0 0x1000>;
 578                         interrupts = <0 52 0x4>;
 579                         clocks = <&clockgen 4 0>;
 580                         clock-names = "ipg";
 581                         status = "disabled";
 582                 };
 583
 584                 lpuart5: serial@29a0000 {
 585                         compatible = "fsl,ls1021a-lpuart";
 586                         reg = <0x0 0x29a0000 0x0 0x1000>;
 587                         interrupts = <0 53 0x4>;
 588                         clocks = <&clockgen 4 0>;
 589                         clock-names = "ipg";
 590                         status = "disabled";
 591                 };
 592
 593                 wdog0: wdog@2ad0000 {
 594                         compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
 595                         reg = <0x0 0x2ad0000 0x0 0x10000>;
 596                         interrupts = <0 83 0x4>;
 597                         clocks = <&clockgen 4 0>;
 598                         clock-names = "wdog";
 599                         big-endian;
 600                 };
 601
 602                 edma0: edma@2c00000 {
 603                         #dma-cells = <2>;
 604                         compatible = "fsl,vf610-edma";
 605                         reg = <0x0 0x2c00000 0x0 0x10000>,
 606                               <0x0 0x2c10000 0x0 0x10000>,
 607                               <0x0 0x2c20000 0x0 0x10000>;
 608                         interrupts = <0 103 0x4>,
 609                                      <0 103 0x4>;
 610                         interrupt-names = "edma-tx", "edma-err";
 611                         dma-channels = <32>;
 612                         big-endian;
 613                         clock-names = "dmamux0", "dmamux1";
 614                         clocks = <&clockgen 4 0>,
 615                                  <&clockgen 4 0>;
 616                 };
 617
 618                 usb0: usb3@2f00000 {
 619                         compatible = "snps,dwc3";
 620                         reg = <0x0 0x2f00000 0x0 0x10000>;
 621                         interrupts = <0 60 0x4>;
 622                         dr_mode = "host";
 623                         snps,quirk-frame-length-adjustment = <0x20>;
 624                         snps,dis_rxdet_inp3_quirk;
 625                 };
 626
 627                 usb1: usb3@3000000 {
 628                         compatible = "snps,dwc3";
 629                         reg = <0x0 0x3000000 0x0 0x10000>;
 630                         interrupts = <0 61 0x4>;
 631                         dr_mode = "host";
 632                         snps,quirk-frame-length-adjustment = <0x20>;
 633                         snps,dis_rxdet_inp3_quirk;
 634                 };
 635
 636                 usb2: usb3@3100000 {
 637                         compatible = "snps,dwc3";
 638                         reg = <0x0 0x3100000 0x0 0x10000>;
 639                         interrupts = <0 63 0x4>;
 640                         dr_mode = "host";
 641                         snps,quirk-frame-length-adjustment = <0x20>;
 642                         snps,dis_rxdet_inp3_quirk;
 643                 };
 644
 645                 sata: sata@3200000 {
 646                         compatible = "fsl,ls1043a-ahci";
 647                         reg = <0x0 0x3200000 0x0 0x10000>,
 648                                 <0x0 0x20140520 0x0 0x4>;
 649                         reg-names = "ahci", "sata-ecc";
 650                         interrupts = <0 69 0x4>;
 651                         clocks = <&clockgen 4 0>;
 652                         dma-coherent;
 653                 };
 654
 655                 msi1: msi-controller1@1571000 {
 656                         compatible = "fsl,ls1043a-msi";
 657                         reg = <0x0 0x1571000 0x0 0x8>;
 658                         msi-controller;
 659                         interrupts = <0 116 0x4>;
 660                 };
 661
 662                 msi2: msi-controller2@1572000 {
 663                         compatible = "fsl,ls1043a-msi";
 664                         reg = <0x0 0x1572000 0x0 0x8>;
 665                         msi-controller;
 666                         interrupts = <0 126 0x4>;
 667                 };
 668
 669                 msi3: msi-controller3@1573000 {
 670                         compatible = "fsl,ls1043a-msi";
 671                         reg = <0x0 0x1573000 0x0 0x8>;
 672                         msi-controller;
 673                         interrupts = <0 160 0x4>;
 674                 };
 675
 676                 pcie@3400000 {
 677                         compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 678                         reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 679                                0x40 0x00000000 0x0 0x00002000>; /* configuration space */
 680                         reg-names = "regs", "config";
 681                         interrupts = <0 118 0x4>, /* controller interrupt */
 682                                      <0 117 0x4>; /* PME interrupt */
 683                         interrupt-names = "intr", "pme";
 684                         #address-cells = <3>;
 685                         #size-cells = <2>;
 686                         device_type = "pci";
 687                         dma-coherent;
 688                         num-lanes = <4>;
 689                         bus-range = <0x0 0xff>;
 690                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
 691                                   0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 692                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 693                         #interrupt-cells = <1>;
 694                         interrupt-map-mask = <0 0 0 7>;
 695                         interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
 696                                         <0000 0 0 2 &gic 0 111 0x4>,
 697                                         <0000 0 0 3 &gic 0 112 0x4>,
 698                                         <0000 0 0 4 &gic 0 113 0x4>;
 699                 };
 700
 701                 pcie@3500000 {
 702                         compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 703                         reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 704                                0x48 0x00000000 0x0 0x00002000>; /* configuration space */
 705                         reg-names = "regs", "config";
 706                         interrupts = <0 128 0x4>,
 707                                      <0 127 0x4>;
 708                         interrupt-names = "intr", "pme";
 709                         #address-cells = <3>;
 710                         #size-cells = <2>;
 711                         device_type = "pci";
 712                         dma-coherent;
 713                         num-lanes = <2>;
 714                         bus-range = <0x0 0xff>;
 715                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
 716                                   0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 717                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 718                         #interrupt-cells = <1>;
 719                         interrupt-map-mask = <0 0 0 7>;
 720                         interrupt-map = <0000 0 0 1 &gic 0 120  0x4>,
 721                                         <0000 0 0 2 &gic 0 121 0x4>,
 722                                         <0000 0 0 3 &gic 0 122 0x4>,
 723                                         <0000 0 0 4 &gic 0 123 0x4>;
 724                 };
 725
 726                 pcie@3600000 {
 727                         compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
 728                         reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 729                                0x50 0x00000000 0x0 0x00002000>; /* configuration space */
 730                         reg-names = "regs", "config";
 731                         interrupts = <0 162 0x4>,
 732                                      <0 161 0x4>;
 733                         interrupt-names = "intr", "pme";
 734                         #address-cells = <3>;
 735                         #size-cells = <2>;
 736                         device_type = "pci";
 737                         dma-coherent;
 738                         num-lanes = <2>;
 739                         bus-range = <0x0 0xff>;
 740                         ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
 741                                   0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 742                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 743                         #interrupt-cells = <1>;
 744                         interrupt-map-mask = <0 0 0 7>;
 745                         interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
 746                                         <0000 0 0 2 &gic 0 155 0x4>,
 747                                         <0000 0 0 3 &gic 0 156 0x4>,
 748                                         <0000 0 0 4 &gic 0 157 0x4>;
 749                 };
 750         };
 751
 752 };
 753
 754 #include "qoriq-qman-portals.dtsi"
 755 #include "qoriq-bman-portals.dtsi"