arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
   4  *
   5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   6  * Chanwoo Choi <cw00.choi@samsung.com>
   7  */
   8
   9 &soc {
  10         bus_g2d_400: bus0 {
  11                 compatible = "samsung,exynos-bus";
  12                 clocks = <&cmu_top CLK_ACLK_G2D_400>;
  13                 clock-names = "bus";
  14                 operating-points-v2 = <&bus_g2d_400_opp_table>;
  15                 status = "disabled";
  16         };
  17
  18         bus_g2d_266: bus1 {
  19                 compatible = "samsung,exynos-bus";
  20                 clocks = <&cmu_top CLK_ACLK_G2D_266>;
  21                 clock-names = "bus";
  22                 operating-points-v2 = <&bus_g2d_266_opp_table>;
  23                 status = "disabled";
  24         };
  25
  26         bus_gscl: bus2 {
  27                 compatible = "samsung,exynos-bus";
  28                 clocks = <&cmu_top CLK_ACLK_GSCL_333>;
  29                 clock-names = "bus";
  30                 operating-points-v2 = <&bus_gscl_opp_table>;
  31                 status = "disabled";
  32         };
  33
  34         bus_hevc: bus3 {
  35                 compatible = "samsung,exynos-bus";
  36                 clocks = <&cmu_top CLK_ACLK_HEVC_400>;
  37                 clock-names = "bus";
  38                 operating-points-v2 = <&bus_hevc_opp_table>;
  39                 status = "disabled";
  40         };
  41
  42         bus_jpeg: bus4 {
  43                 compatible = "samsung,exynos-bus";
  44                 clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
  45                 clock-names = "bus";
  46                 operating-points-v2 = <&bus_g2d_400_opp_table>;
  47                 status = "disabled";
  48         };
  49
  50         bus_mfc: bus5 {
  51                 compatible = "samsung,exynos-bus";
  52                 clocks = <&cmu_top CLK_ACLK_MFC_400>;
  53                 clock-names = "bus";
  54                 operating-points-v2 = <&bus_g2d_400_opp_table>;
  55                 status = "disabled";
  56         };
  57
  58         bus_mscl: bus6 {
  59                 compatible = "samsung,exynos-bus";
  60                 clocks = <&cmu_top CLK_ACLK_MSCL_400>;
  61                 clock-names = "bus";
  62                 operating-points-v2 = <&bus_g2d_400_opp_table>;
  63                 status = "disabled";
  64         };
  65
  66         bus_noc0: bus7 {
  67                 compatible = "samsung,exynos-bus";
  68                 clocks = <&cmu_top CLK_ACLK_BUS0_400>;
  69                 clock-names = "bus";
  70                 operating-points-v2 = <&bus_hevc_opp_table>;
  71                 status = "disabled";
  72         };
  73
  74         bus_noc1: bus8 {
  75                 compatible = "samsung,exynos-bus";
  76                 clocks = <&cmu_top CLK_ACLK_BUS1_400>;
  77                 clock-names = "bus";
  78                 operating-points-v2 = <&bus_hevc_opp_table>;
  79                 status = "disabled";
  80         };
  81
  82         bus_noc2: bus9 {
  83                 compatible = "samsung,exynos-bus";
  84                 clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
  85                 clock-names = "bus";
  86                 operating-points-v2 = <&bus_noc2_opp_table>;
  87                 status = "disabled";
  88         };
  89
  90         bus_g2d_400_opp_table: opp_table2 {
  91                 compatible = "operating-points-v2";
  92                 opp-shared;
  93
  94                 opp-400000000 {
  95                         opp-hz = /bits/ 64 <400000000>;
  96                         opp-microvolt = <1075000>;
  97                 };
  98                 opp-267000000 {
  99                         opp-hz = /bits/ 64 <267000000>;
 100                         opp-microvolt = <1000000>;
 101                 };
 102                 opp-200000000 {
 103                         opp-hz = /bits/ 64 <200000000>;
 104                         opp-microvolt = <975000>;
 105                 };
 106                 opp-160000000 {
 107                         opp-hz = /bits/ 64 <160000000>;
 108                         opp-microvolt = <962500>;
 109                 };
 110                 opp-134000000 {
 111                         opp-hz = /bits/ 64 <134000000>;
 112                         opp-microvolt = <950000>;
 113                 };
 114                 opp-100000000 {
 115                         opp-hz = /bits/ 64 <100000000>;
 116                         opp-microvolt = <937500>;
 117                 };
 118         };
 119
 120         bus_g2d_266_opp_table: opp_table3 {
 121                 compatible = "operating-points-v2";
 122
 123                 opp-267000000 {
 124                         opp-hz = /bits/ 64 <267000000>;
 125                 };
 126                 opp-200000000 {
 127                         opp-hz = /bits/ 64 <200000000>;
 128                 };
 129                 opp-160000000 {
 130                         opp-hz = /bits/ 64 <160000000>;
 131                 };
 132                 opp-134000000 {
 133                         opp-hz = /bits/ 64 <134000000>;
 134                 };
 135                 opp-100000000 {
 136                         opp-hz = /bits/ 64 <100000000>;
 137                 };
 138         };
 139
 140         bus_gscl_opp_table: opp_table4 {
 141                 compatible = "operating-points-v2";
 142
 143                 opp-333000000 {
 144                         opp-hz = /bits/ 64 <333000000>;
 145                 };
 146                 opp-222000000 {
 147                         opp-hz = /bits/ 64 <222000000>;
 148                 };
 149                 opp-166500000 {
 150                         opp-hz = /bits/ 64 <166500000>;
 151                 };
 152         };
 153
 154         bus_hevc_opp_table: opp_table5 {
 155                 compatible = "operating-points-v2";
 156                 opp-shared;
 157
 158                 opp-400000000 {
 159                         opp-hz = /bits/ 64 <400000000>;
 160                 };
 161                 opp-267000000 {
 162                         opp-hz = /bits/ 64 <267000000>;
 163                 };
 164                 opp-200000000 {
 165                         opp-hz = /bits/ 64 <200000000>;
 166                 };
 167                 opp-160000000 {
 168                         opp-hz = /bits/ 64 <160000000>;
 169                 };
 170                 opp-134000000 {
 171                         opp-hz = /bits/ 64 <134000000>;
 172                 };
 173                 opp-100000000 {
 174                         opp-hz = /bits/ 64 <100000000>;
 175                 };
 176         };
 177
 178         bus_noc2_opp_table: opp_table6 {
 179                 compatible = "operating-points-v2";
 180
 181                 opp-400000000 {
 182                         opp-hz = /bits/ 64 <400000000>;
 183                 };
 184                 opp-200000000 {
 185                         opp-hz = /bits/ 64 <200000000>;
 186                 };
 187                 opp-134000000 {
 188                         opp-hz = /bits/ 64 <134000000>;
 189                 };
 190                 opp-100000000 {
 191                         opp-hz = /bits/ 64 <100000000>;
 192                 };
 193         };
 194 };