arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi

   1 /*
   2  *  BSD LICENSE
   3  *
   4  *  Copyright(c) 2016-2017 Broadcom.  All rights reserved.
   5  *
   6  *  Redistribution and use in source and binary forms, with or without
   7  *  modification, are permitted provided that the following conditions
   8  *  are met:
   9  *
  10  *    * Redistributions of source code must retain the above copyright
  11  *      notice, this list of conditions and the following disclaimer.
  12  *    * Redistributions in binary form must reproduce the above copyright
  13  *      notice, this list of conditions and the following disclaimer in
  14  *      the documentation and/or other materials provided with the
  15  *      distribution.
  16  *    * Neither the name of Broadcom nor the names of its
  17  *      contributors may be used to endorse or promote products derived
  18  *      from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include "stingray.dtsi"
  34
  35 / {
  36         chosen {
  37                 stdout-path = "serial0:115200n8";
  38         };
  39
  40         aliases {
  41                 serial0 = &uart1;
  42                 serial1 = &uart0;
  43                 serial2 = &uart2;
  44                 serial3 = &uart3;
  45         };
  46
  47         sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
  48                 compatible = "regulator-gpio";
  49                 regulator-name = "sdio0_vddo_ctrl_reg";
  50                 regulator-type = "voltage";
  51                 regulator-min-microvolt = <1800000>;
  52                 regulator-max-microvolt = <3300000>;
  53                 gpios = <&pca9505 18 0>;
  54                 states = <3300000 0x0
  55                           1800000 0x1>;
  56         };
  57
  58         sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl {
  59                 compatible = "regulator-gpio";
  60                 regulator-name = "sdio1_vddo_ctrl_reg";
  61                 regulator-type = "voltage";
  62                 regulator-min-microvolt = <1800000>;
  63                 regulator-max-microvolt = <3300000>;
  64                 gpios = <&pca9505 19 0>;
  65                 states = <3300000 0x0
  66                           1800000 0x1>;
  67         };
  68 };
  69
  70 &memory { /* Default DRAM banks */
  71         reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
  72               <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
  73 };
  74
  75 &uart1 {
  76         status = "okay";
  77 };
  78
  79 &pwm {
  80         status = "okay";
  81 };
  82
  83 &i2c0 {
  84         status = "okay";
  85
  86         pca9505: pca9505@20 {
  87                 compatible = "nxp,pca9505";
  88                 gpio-controller;
  89                 #gpio-cells = <2>;
  90                 reg = <0x20>;
  91         };
  92 };
  93
  94 &i2c1 {
  95         status = "okay";
  96
  97         pcf8574: pcf8574@20 {
  98                 compatible = "nxp,pcf8574a";
  99                 gpio-controller;
 100                 #gpio-cells = <2>;
 101                 reg = <0x27>;
 102         };
 103 };
 104
 105 &nand {
 106         status = "ok";
 107         nandcs@0 {
 108                 compatible = "brcm,nandcs";
 109                 reg = <0>;
 110                 nand-ecc-mode = "hw";
 111                 nand-ecc-strength = <8>;
 112                 nand-ecc-step-size = <512>;
 113                 nand-bus-width = <16>;
 114                 brcm,nand-oob-sector-size = <16>;
 115                 #address-cells = <1>;
 116                 #size-cells = <1>;
 117         };
 118 };
 119
 120 &sdio0 {
 121         vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
 122         non-removable;
 123         full-pwr-cycle;
 124         status = "okay";
 125 };
 126
 127 &sdio1 {
 128         vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
 129         full-pwr-cycle;
 130         status = "okay";
 131 };