arch/arm64/boot/dts/bitmain/bm1880.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2019 Linaro Ltd.
   4  * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
   5  */
   6
   7 #include <dt-bindings/interrupt-controller/arm-gic.h>
   8
   9 / {
  10         compatible = "bitmain,bm1880";
  11         interrupt-parent = <&gic>;
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu0: cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "arm,cortex-a53";
  22                         reg = <0x0>;
  23                         enable-method = "psci";
  24                 };
  25
  26                 cpu1: cpu@1 {
  27                         device_type = "cpu";
  28                         compatible = "arm,cortex-a53";
  29                         reg = <0x1>;
  30                         enable-method = "psci";
  31                 };
  32         };
  33
  34         reserved-memory {
  35                 #address-cells = <2>;
  36                 #size-cells = <2>;
  37                 ranges;
  38
  39                 secmon@100000000 {
  40                         reg = <0x1 0x00000000 0x0 0x20000>;
  41                         no-map;
  42                 };
  43
  44                 jpu@130000000 {
  45                         reg = <0x1 0x30000000 0x0 0x08000000>; // 128M
  46                         no-map;
  47                 };
  48
  49                 vpu@138000000 {
  50                         reg = <0x1 0x38000000 0x0 0x08000000>; // 128M
  51                         no-map;
  52                 };
  53         };
  54
  55         psci {
  56                 compatible = "arm,psci-0.2";
  57                 method = "smc";
  58         };
  59
  60         timer {
  61                 compatible = "arm,armv8-timer";
  62                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
  63                              <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
  64                              <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
  65                              <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
  66         };
  67
  68         soc {
  69                 compatible = "simple-bus";
  70                 #address-cells = <2>;
  71                 #size-cells = <2>;
  72                 ranges;
  73
  74                 gic: interrupt-controller@50001000 {
  75                         compatible = "arm,gic-400";
  76                         reg = <0x0 0x50001000 0x0 0x1000>,
  77                               <0x0 0x50002000 0x0 0x2000>;
  78                         interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
  79                         interrupt-controller;
  80                         #interrupt-cells = <3>;
  81                 };
  82
  83                 uart0: serial@58018000 {
  84                         compatible = "snps,dw-apb-uart";
  85                         reg = <0x0 0x58018000 0x0 0x2000>;
  86                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  87                         reg-shift = <2>;
  88                         reg-io-width = <4>;
  89                         status = "disabled";
  90                 };
  91
  92                 uart1: serial@5801A000 {
  93                         compatible = "snps,dw-apb-uart";
  94                         reg = <0x0 0x5801a000 0x0 0x2000>;
  95                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
  96                         reg-shift = <2>;
  97                         reg-io-width = <4>;
  98                         status = "disabled";
  99                 };
 100
 101                 uart2: serial@5801C000 {
 102                         compatible = "snps,dw-apb-uart";
 103                         reg = <0x0 0x5801c000 0x0 0x2000>;
 104                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 105                         reg-shift = <2>;
 106                         reg-io-width = <4>;
 107                         status = "disabled";
 108                 };
 109
 110                 uart3: serial@5801E000 {
 111                         compatible = "snps,dw-apb-uart";
 112                         reg = <0x0 0x5801e000 0x0 0x2000>;
 113                         interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 114                         reg-shift = <2>;
 115                         reg-io-width = <4>;
 116                         status = "disabled";
 117                 };
 118         };
 119 };