1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
9 #include "meson-sm1.dtsi"
10 #include "meson-khadas-vim3.dtsi"
13 compatible = "khadas,vim3l", "amlogic,sm1";
14 model = "Khadas VIM3L";
16 vddcpu: regulator-vddcpu {
18 * Silergy SY8030DEC Regulator.
20 compatible = "pwm-regulator";
22 regulator-name = "VDDCPU";
23 regulator-min-microvolt = <690000>;
24 regulator-max-microvolt = <1050000>;
26 vin-supply = <&vsys_3v3>;
28 pwms = <&pwm_AO_cd 1 1250 0>;
29 pwm-dutycycle-range = <100 0>;
37 cpu-supply = <&vddcpu>;
38 operating-points-v2 = <&cpu_opp_table>;
39 clocks = <&clkc CLKID_CPU_CLK>;
40 clock-latency = <50000>;
44 cpu-supply = <&vddcpu>;
45 operating-points-v2 = <&cpu_opp_table>;
46 clocks = <&clkc CLKID_CPU1_CLK>;
47 clock-latency = <50000>;
51 cpu-supply = <&vddcpu>;
52 operating-points-v2 = <&cpu_opp_table>;
53 clocks = <&clkc CLKID_CPU2_CLK>;
54 clock-latency = <50000>;
58 cpu-supply = <&vddcpu>;
59 operating-points-v2 = <&cpu_opp_table>;
60 clocks = <&clkc CLKID_CPU3_CLK>;
61 clock-latency = <50000>;
65 pinctrl-0 = <&pwm_ao_d_e_pins>;
66 pinctrl-names = "default";
68 clock-names = "clkin1";